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Joris Lacord
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2020 – today
- 2022
- [c7]T. Dubreuil, P. Amari, Sylvain Barraud, Joris Lacord, Eduardo Esmanhotto, Valentina Meli, S. Martin, Niccolo Castellani, Bernard Previtali, François Andrieu:
A novel 3D 1T1R RRAM architecture for memory-centric Hyperdimensional Computing. IMW 2022: 1-4 - [c6]Tadeu Mota Frutuoso, Xavier Garros, Perrine Batude, Laurent Brunet, Joris Lacord, Benoit Sklénard, V. Lapras, Claire Fenouillet-Béranger, M. Ribotta, A. Magalhaes-Lucas, J. Kanyandekwe, R. Kies, G. Romano, Edoardo Catapano, Mikaël Cassé, Jose Lugo-Alvarez, Philippe Ferrari, Fred Gaillard:
Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. VLSI Technology and Circuits 2022: 332-333 - 2021
- [c5]Tadeu Mota Frutuoso, Jose Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, Louis Gerrer, Mikaël Cassé, Edoardo Catapano, Claire Fenouillet-Béranger, François Andrieu, Fred Gaillard, Philippe Ferrari:
Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration. IRPS 2021: 1-5 - 2020
- [i1]Mona Ezzadeen, D. Bosch, Bastien Giraud, Sylvain Barraud, Jean-Philippe Noël, Didier Lattard, Joris Lacord, Jean-Michel Portal, François Andrieu:
Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications. CoRR abs/2012.00061 (2020)
2010 – 2019
- 2016
- [c4]Gerald Cibrario, Nour Ben Salem, Joris Lacord, Karim Azizi-Mourier, Olivier Rozeau, Etienne Maurin, Olivier Billoint, Sébastien Thuries, Alexandre Valentian:
From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose. 3DIC 2016: 1-5 - [c3]Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint:
Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. ESSDERC 2016: 218-221 - 2014
- [c2]Frederic Monsieur, Yvan Denis, Denis Rideau, Vincent Quenette, Gilles Gouget, Clément Tavernier, Hervé Jaouen, Gérard Ghibaudo, Joris Lacord:
The importance of the spacer region to explain short channels mobility collapse in 28nm Bulk and FDSOI technologies. ESSDERC 2014: 254-257 - 2012
- [c1]Joris Lacord, Perrine Batude, Gérard Ghibaudo, Frédéric Boeuf:
Analytical modeling of parasitics in monolithically integrated 3D inverters. ICICDT 2012: 1-4
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