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Leonardo Ecco
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2020 – today
- 2021
- [c12]Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
:
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC 2021: 35-42 - 2020
- [c11]Taha Soliman, Armin Runge, Leonardo Ecco:
Enhancing the Utilization of Dot-Product Engines in Deep Learning Accelerators. IPDPS Workshops 2020: 840-843
2010 – 2019
- 2019
- [c10]Michael J. Klaiber, Sebastian Vogel, Axel Acosta, Robert Korn, Leonardo Ecco, Kristine Back, Andre Guntoro
, Ingo Feldner:
An End-to-End HW/SW Co-Design Methodology to Design Efficient Deep Neural Network Systems using Virtual Models. INTESA 2019: 18-22 - [i1]Michael J. Klaiber, Sebastian Vogel, Axel Acosta, Robert Korn, Leonardo Ecco, Kristine Back, Andre Guntoro, Ingo Feldner:
An End-to-End HW/SW Co-Design Methodology to Design Efficient Deep Neural Network Systems using Virtual Models. CoRR abs/1910.11632 (2019) - 2017
- [j2]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Ensuring safety and efficiency in networks-on-chip. Integr. 58: 571-582 (2017) - [j1]Leonardo Ecco
, Rolf Ernst:
Tackling the Bus Turnaround Overhead in Real-Time SDRAM Controllers. IEEE Trans. Computers 66(11): 1961-1974 (2017) - [c9]Adam Kostrzewa, Sebastian Tobuschat, Leonardo Ecco, Rolf Ernst:
Adaptive load distribution in mixed-critical Networks-on-Chip. ASP-DAC 2017: 732-737 - [c8]Leonardo Ecco, Rolf Ernst:
Architecting high-speed command schedulers for open-row real-time SDRAM controllers. DATE 2017: 626-629 - 2016
- [c7]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Dynamic admission control for real-time networks-on-chips. ASP-DAC 2016: 719-724 - [c6]Leonardo Ecco, Adam Kostrzewa, Rolf Ernst:
Minimizing DRAM Rank Switching Overhead for Improved Timing Bounds and Performance. ECRTS 2016: 3-13 - 2015
- [c5]Adam Kostrzewa, Selma Saidi, Leonardo Ecco, Rolf Ernst:
Flexible TDM-based resource management in on-chip networks. RTNS 2015: 151-160 - [c4]Leonardo Ecco, Rolf Ernst:
Improved DRAM Timing Bounds for Real-Time DRAM Controllers with Read/Write Bundling. RTSS 2015: 53-64 - [c3]Leonardo Ecco, Selma Saidi, Adam Kostrzewa, Rolf Ernst:
Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs. SIES 2015: 29-38 - 2014
- [c2]Sebastian Tobuschat, Moritz Neukirchner, Leonardo Ecco, Rolf Ernst:
Workload-aware shaping of shared resource accesses in mixed-criticality systems. CODES+ISSS 2014: 35:1-35:10 - [c1]Leonardo Ecco, Sebastian Tobuschat, Selma Saidi, Rolf Ernst:
A mixed critical memory controller using bank privatization and fixed priority scheduling. RTCSA 2014: 1-10
Coauthor Index
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