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Yusuke Shirota
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Conference and Workshop Papers
- 2020
- [c7]Mayuko Koezuka, Yusuke Shirota, Satoshi Shirai, Tatsunori Kanai:
Machine Learning-Based Prefetching for SCM Main Memory System. IPDPS Workshops 2020: 769-776 - 2019
- [c6]Yusuke Shirota, Satoshi Shirai, Tatsunori Kanai:
Hybrid Access in Storage-class Memory-aware Low Power Virtual Memory System. COOL CHIPS 2019: 1-3 - [c5]Katsuhiko Hoya, Kosuke Hatsuda, Kenji Tsuchida, Yohji Watanabe, Yusuke Shirota, Tatsunori Kanai:
A perspective on NVRAM technology for future computing system. VLSI-DAT 2019: 1-2 - 2016
- [c4]Yusuke Shirota, Shiyo Yoshimura, Satoshi Shirai, Tatsunori Kanai:
Powering-off DRAM with aggressive page-out to storage-class memory in low power virtual memory system. COOL Chips 2016: 1-2 - 2015
- [c3]Yusuke Shirota, Shiyo Yoshimura, Tatsunori Kanai:
Electronic Paper Display update scheduler for extremely low power non-volatile embedded systems. COOL Chips 2015: 1-3 - 2014
- [c2]Jun'ichi Segawa, Yusuke Shirota, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai:
Aggressive use of Deep Sleep mode in low power embedded systems. COOL Chips 2014: 1-3 - 2011
- [c1]Yusuke Shirota, Jun'ichi Segawa, Masaya Tarui, Tatsunori Kanai:
Autotuning in an Array Processing Language using High-level Program Transformations. ICCS 2011: 2126-2135
Coauthor Index
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