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K. C. Yarlagadda

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1990 – 1999

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1992
[c2]
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B. Kolla, Parag K. Lala, K. C. Yarlagadda:
A concurrent checking scheme for single and multibit errors in logic circuits. VTS 1992: 160-164
1991
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Parag K. Lala, Fadi Y. Busaba, K. C. Yarlagadda:
An approach for designing self-checking logic using residue codes. VTS 1991: 166-171

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