


Остановите войну!
for scientists:
BibTeX records: Kishan Pradhan
@article{DBLP:journals/jssc/CerneaPMCLLTTN009, author = {Raul Cernea and Long Pham and Farookh Moogat and Siu Lung Chan and Binh Le and Yan Li and Shouchang Tsao and Taiyuan Tseng and Khanh Nguyen and Jason Li and Jayson Hu and Jonghak Yuh and Cynthia Hsu and Fanglin Zhang and Teruhiko Kamei and Hiroaki Nasu and Phil Kliza and Khin Htoo and Jeffrey Lutze and Yingda Dong and Masaaki Higashitani and Junhui Yang and Hung{-}Szu Lin and Vamshi Sakhamuri and Alan Li and Feng Pan and Sridhar Yadala and Subodh Taigor and Kishan Pradhan and James Lan and Jim Chan and Takumi Abe and Yasuyuki Fukuda and Hideo Mukai and Koichi Kawakami and Connie Liang and Tommy Ip and Shu{-}Fen Chang and Jaggi Lakshmipathi and Sharon Huynh and Dimitris Pantelakis and Mehrdad Mofidi and Khandker Quader}, title = {A 34 MB/s {MLC} Write Throughput 16 Gb {NAND} With All Bit Line Architecture on 56 nm Technology}, journal = {{IEEE} J. Solid State Circuits}, volume = {44}, number = {1}, pages = {186--194}, year = {2009}, url = {https://doi.org/10.1109/JSSC.2008.2007152}, doi = {10.1109/JSSC.2008.2007152}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/CerneaPMCLLTTN009.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/CerneaPMCLLTTNLHPHZKNKHLDHYLSLPYTPLCAFMKLICLHPMQ08, author = {Raul Cernea and Long Pham and Farookh Moogat and Siu Lung Chan and Binh Le and Yan Li and Shouchang Tsao and Taiyuan Tseng and Khanh Nguyen and Jason Li and Jayson Hu and Jong Park and Cynthia Hsu and Fanglin Zhang and Teruhiko Kamei and Hiroaki Nasu and Phil Kliza and Khin Htoo and Jeffery Lutze and Yingda Dong and Masaaki Higashitani and Junhui Yang and Hung{-}Szu Lin and Vamshi Sakhamuri and Alan Li and Feng Pan and Sridhar Yadala and Subodh Taigor and Kishan Pradhan and James Lan and Jim Chan and Takumi Abe and Yasuyuki Fukuda and Hideo Mukai and Koichi Kawakami and Connie Liang and Tommy Ip and Shu{-}Fen Chang and Jaggi Lakshmipathi and Sharon Huynh and Dimitris Pantelakis and Mehrdad Mofidi and Khandker Quader}, title = {A 34MB/s-Program-Throughput 16Gb {MLC} {NAND} with All-Bitline Architecture in 56nm}, booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008}, pages = {420--421}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISSCC.2008.4523236}, doi = {10.1109/ISSCC.2008.4523236}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/CerneaPMCLLTTNLHPHZKNKHLDHYLSLPYTPLCAFMKLICLHPMQ08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.