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Conference and Workshop Papers
- 2024
[c7]Kai-Cheng Cheng, Soon-Jyh Chang, Chung-Chieh Chen, Shuo-Hong Hung:
9.7 A 94.3dB SNDR 184dB FoMs 4th-Order Noise-Shaping SAR ADC with Dynamic-Amplifier-Assisted Cascaded Integrator. ISSCC 2024: 180-182- 2018
- [c6]Shuo-Hong Hung, Ina Wu, Yi-Chen Li, Cheng-Ta Li
, Charlie Chung-Ping Chen:
A Real Time EEG Analysis System for the Prediction of Clinical Antidepressant Responses. DSP 2018: 1-5 - 2015
- [c5]Shuo-Hong Hung, Wei-Hao Kao, Kuan-I Wu, Yi-Wei Huang, Min-Han Hsieh, Charlie Chung-Ping Chen:
A 160MHz-to-2GHz low jitter fast lock all-digital DLL with phase tracking technique. ISCAS 2015: 553-556 - [c4]Ai Chien, Shuo-Hong Hung, Kuan-I Wu, Chang-Yi Liu, Min-Han Hsieh, Charlie Chung-Ping Chen:
A 8.1/5.4/2.7/1.62 Gb/s receiver for DisplayPort Version 1.3 with automatic bit-rate tracking scheme. ISCAS 2015: 2393-2396 - [c3]Kuan-I Wu, Szu-Yao Hung, Shuo-Hong Hung, Charlie Chung-Ping Chen:
A fast-settling high linearity auto gain control for broadband OFDM-based PLC system. ISCAS 2015: 2852-2855 - 2014
- [c2]Kuan-I Wu, Shuo-Hong Hung, Shang-Yu Shieh, Bor-Tsang Hwang, Szu-Yao Hung, Charlie Chung-Ping Chen:
Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation. ISCAS 2014: 950-953 - 2013
- [c1]Wei-Sheng Cheng, Min-Han Hsieh, Shuo-Hong Hung, Szu-Yao Hung, Charlie Chung-Ping Chen:
A 10-bit current-steering DAC for HomePlug AV2 powerline communication system in 90nm CMOS. ISCAS 2013: 2034-2037
Coauthor Index
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