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ORCIDYuan Meng 0001
Person information
- affiliation: University of Southern California, Department of Electrical and Computer Engineering, Los Angeles, CA, USA
Other persons with the same name
- Yuan Meng (aka: Meng Yuan) — disambiguation page
- Yuan Meng 0002 — Tsinghua University, Department of Computer Science and Technology, Beijing National Research Center for Information Science and Technology (BNRist), Beijing, China
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2020 – today
- 2024
[c18]Yuan Meng
, Michael Kinsner, Deshanand P. Singh, Mahesh A. Iyer, Viktor K. Prasanna:
PEARL: Enabling Portable, Productive, and High-Performance Deep Reinforcement Learning using Heterogeneous Platforms. CF 2024- [c17]Samuel Wiggins, Yuan Meng, Mahesh A. Iyer, Viktor K. Prasanna:
A Heterogeneous Acceleration System for Attention-Based Multi-Agent Reinforcement Learning. FPL 2024: 236-242 - 2023
- [j2]Chi Zhang, Yuan Meng, Viktor K. Prasanna:
A Framework for Mapping DRL Algorithms With Prioritized Replay Buffer Onto Heterogeneous Platforms. IEEE Trans. Parallel Distributed Syst. 34(6): 1816-1829 (2023) - [c16]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Characterizing Speed Performance of Multi-Agent Reinforcement Learning. DATA 2023: 327-334 - [c15]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
A Framework for Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform via on-chip Dynamic Tree Management. FPGA 2023: 235-245 - [c14]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Multi-Agent DDPG on CPU-FPGA Heterogeneous Platform. HPEC 2023: 1-7 - [c13]Yuan Meng, Qian Wang, Tianxin Zu, Viktor K. Prasanna:
Accelerating Deep Neural Network guided MCTS using Adaptive Parallelism. SC Workshops 2023: 766-769 - [i5]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Characterizing Speed Performance of Multi-Agent Reinforcement Learning. CoRR abs/2309.07108 (2023) - [i4]Yuan Meng, Qian Wang, Tianxin Zu, Viktor K. Prasanna:
Accelerating Deep Neural Network guided MCTS using Adaptive Parallelism. CoRR abs/2310.05313 (2023) - [i3]Yuan Meng, Michael Kinsner, Deshanand P. Singh, Mahesh A. Iyer, Viktor K. Prasanna:
A Software-Hardware Co-Optimized Toolkit for Deep Reinforcement Learning on Heterogeneous Platforms. CoRR abs/2311.09445 (2023) - 2022
- [j1]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
PPOAccel: A High-Throughput Acceleration Framework for Proximal Policy Optimization. IEEE Trans. Parallel Distributed Syst. 33(9): 2066-2078 (2022) - [c12]Yuan Meng, Chi Zhang, Viktor K. Prasanna:
FPGA acceleration of deep reinforcement learning using on-chip replay management. CF 2022: 40-48 - [c11]Yuan Meng, Hongjiang Men, Viktor K. Prasanna:
Accelerating Deformable Convolution Networks. FCCM 2022: 1 - [c10]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform. FPL 2022: 176-182 - [c9]Haomei Liu, Yuan Meng, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
End to End Framework for CNN Acceleration on FPGAs with Dynamic Algorithm Mapping. IC3 2022: 696-700 - [c8]Yuan Meng, Hongjiang Men, Viktor K. Prasanna:
Accelerator Design and Exploration for Deformable Convolution Networks. SiPS 2022: 1-6 - [i2]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform. CoRR abs/2208.11208 (2022) - 2021
- [c7]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference. FPGA 2021: 183-193 - [c6]Nathaniel Peura, Yuan Meng, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
FGYM: Toolkit for Benchmarking FPGA based Reinforcement Learning Algorithms. FPL 2021: 404 - [c5]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
How to Avoid Zero-Spacing in Fractionally-Strided Convolution? A Hardware-Algorithm Co-Design Methodology. HiPC 2021: 81-90 - 2020
- [c4]Yuan Meng, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
Accelerating Proximal Policy Optimization on CPU-FPGA Heterogeneous Platforms. FCCM 2020: 19-27 - [c3]Rachit Rajat, Yuan Meng, Sanmukh R. Kuppannagari, Ajitesh Srivastava, Viktor K. Prasanna, Rajgopal Kannan:
QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators. FPGA 2020: 323 - [c2]Yuan Meng, Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
How to Efficiently Train Your AI Agent? Characterizing and Evaluating Deep Reinforcement Learning on Heterogeneous Platforms. HPEC 2020: 1-7 - [c1]Yuan Meng, Sanmukh R. Kuppannagari, Rachit Rajat, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators. IPDPS Workshops 2020: 107-114 - [i1]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference. CoRR abs/2012.00912 (2020)
Coauthor Index
aka: Sanmukh Rao Kuppannagari
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