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William John Bainbridge

William J. Bainbridge – W. J. Bainbridge

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2010 – 2019

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2012
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Wei Song, Doug A. Edwards, Jim D. Garside, William J. Bainbridge:
Area efficient asynchronous SDM routers using 2-stage Clos switches. DATE 2012: 1495-1500

2000 – 2009

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2009
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William John Bainbridge, Sean James Salisbury:
Glitch Sensitivity and Defense of Quasi Delay-Insensitive Network-on-Chip Links. ASYNC 2009: 35-44
2004
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W. J. Bainbridge, Luis A. Plana, Stephen B. Furber:
The Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip. DATE 2004: 274-279
2003
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Luis A. Plana, Peter A. Riocreux, W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Z. C. Yu:
SPA - a secure Amulet core for smartcard applications. Microprocess. Microsystems 27(9): 431-446 (2003)
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W. J. Bainbridge, William B. Toms, David A. Edwards, Stephen B. Furber:
Delay-Insensitive, Point-to-Point Interconnect Using M-of-N Codes. ASYNC 2003: 132-140
2002
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W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Peter A. Riocreux, Luis A. Plana:
SPA - A Synthesisable Amulet Core for Smartcard pplications. ASYNC 2002: 201-210
2001
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W. J. Bainbridge, Stephen B. Furber:
Delay Insensitive System-on-Chip Interconnect using 1-of-4 Data Encoding. ASYNC 2001: 118-126
2000
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W. J. Bainbridge, Stephen B. Furber:
MARBLE: an asynchronous on-chip macrocell bus. Microprocess. Microsystems 24(4): 213-222 (2000)
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Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, Siamak Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli:
AMULET3i - An Asynchronous System-on-Chip. ASYNC 2000: 162-175

1990 – 1999

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1998
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W. J. Bainbridge, Stephen B. Furber:
Asynchronous Macrocell Interconnect using MARBLE. ASYNC 1998: 122-132

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