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Teruo Tanimoto
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2020 – today
- 2024
- [j8]Yosuke Ueno
, Yuna Tomida
, Teruo Tanimoto
, Masamitsu Tanaka
, Yutaka Tabuchi
, Koji Inoue
, Hiroshi Nakamura
:
Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines. IEEE Comput. Archit. Lett. 23(1): 6-9 (2024) - [i2]Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
SFQ counter-based precomputation for large-scale cryogenic VQE machines. CoRR abs/2403.00363 (2024) - 2023
- [j7]KuanYi Ng, Aalaa M. A. Babai, Teruo Tanimoto, Satoshi Kawakami
, Koji Inoue:
Empirical Power-performance Analysis of Layer-wise CNN Inference on Single Board Computers. J. Inf. Process. 31: 478-494 (2023) - [c16]Wang Liao, Yasunari Suzuki, Teruo Tanimoto, Yosuke Ueno
, Yuuki Tokunaga:
WIT-Greedy: Hardware System Design of Weighted ITerative Greedy Decoder for Surface Code. ASP-DAC 2023: 209-215 - [c15]Yasunari Suzuki, Yosuke Ueno
, Wang Liao, Masamitsu Tanaka, Teruo Tanimoto:
Circuit designs for practical-scale fault-tolerant quantum computing. VLSI Technology and Circuits 2023: 1-2 - [i1]Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines. CoRR abs/2310.01630 (2023) - 2022
- [c14]Ilkwon Byun
, Junpyo Kim
, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka
, Koji Inoue, Jangwoo Kim:
XQsim: modeling cross-technology control processors for 10+K qubit quantum computers. ISCA 2022: 366-382 - [c13]Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka
, Satoshi Kawakami
, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue:
Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device. ISCAS 2022: 3547-3551 - [c12]Yasunari Suzuki, Takanori Sugiyama
, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto:
Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. MICRO 2022: 1110-1125 - [c11]Satoshi Matsushita, Teruo Tanimoto, Satoshi Kawakami
, Takatsugu Ono, Koji Inoue:
An Edge Autonomous Lamp Control with Camera Feedback. WF-IoT 2022: 1-7 - 2021
- [j6]Koki Ishida
, Ilkwon Byun
, Ikki Nagaoka
, Kosuke Fukumitsu, Masamitsu Tanaka
, Satoshi Kawakami
, Teruo Tanimoto
, Takatsugu Ono
, Jangwoo Kim, Koji Inoue
:
Superconductor Computing for Neural Networks. IEEE Micro 41(3): 19-26 (2021) - 2020
- [c10]Keitaro Oka, Satoshi Kawakami
, Teruo Tanimoto
, Takatsugu Ono, Koji Inoue:
Enhancing a manycore-oriented compressed cache for GPGPU. HPC Asia 2020: 22-31 - [c9]Teruo Tanimoto
, Shuhei Matsuo, Satoshi Kawakami
, Yutaka Tabuchi
, Masao Hirokawa
, Koji Inoue:
How Many Trials Do We Need for Reliable NISQ Computing? ISVLSI 2020: 288-290 - [c8]Teruo Tanimoto
, Shuhei Matsuo, Satoshi Kawakami
, Yutaka Tabuchi
, Masao Hirokawa
, Koji Inoue:
Practical Error Modeling Toward Realistic NISQ Simulation. ISVLSI 2020: 291-293 - [c7]Koki Ishida, Ilkwon Byun
, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka
, Satoshi Kawakami
, Teruo Tanimoto
, Takatsugu Ono, Jangwoo Kim, Koji Inoue:
SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices. MICRO 2020: 58-72 - [c6]Koki Ishida, Masamitsu Tanaka
, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami
, Teruo Tanimoto
, Akira Fujimaki, Koji Inoue:
32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [j5]Teruo Tanimoto
, Takatsugu Ono, Koji Inoue:
Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 102-A(6): 758-766 (2019) - 2017
- [j4]Hiroshi Sasaki
, Fang-Hsiang Su, Teruo Tanimoto
, Simha Sethumadhavan:
Heavy Tails in Program Structure. IEEE Comput. Archit. Lett. 16(1): 34-37 (2017) - [j3]Teruo Tanimoto
, Takatsugu Ono, Koji Inoue, Hiroshi Sasaki:
Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processors. IEEE Comput. Archit. Lett. 16(2): 111-114 (2017) - [j2]Teruo Tanimoto
, Takatsugu Ono, Koji Inoue:
Dependence Graph Model for Accurate Critical Path Analysis on Out-of-Order Processors. J. Inf. Process. 25: 983-992 (2017) - [c5]Teruo Tanimoto
, Takatsugu Ono, Koji Inoue:
CPCI Stack: Metric for Accurate Bottleneck Analysis on OoO Microprocessors. CANDAR 2017: 166-172 - [c4]Hiroshi Sasaki, Fang-Hsiang Su, Teruo Tanimoto
, Simha Sethumadhavan:
Why do programs have heavy tails? IISWC 2017: 135-145 - 2015
- [j1]Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto
, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka:
A Flexible Direct Attached Storage for a Data Intensive Application. IEICE Trans. Inf. Syst. 98-D(12): 2168-2177 (2015) - 2014
- [c3]Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto
, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka:
FlexDAS: A flexible direct attached storage for I/O intensive applications. IEEE BigData 2014: 147-152 - [c2]Teruo Tanimoto
, Takatsugu Ono, Kohta Nakashima, Takashi Miyoshi:
Hardware-assisted scalable flow control of shared receive queue. ICS 2014: 175 - 2012
- [c1]Hiroshi Sasaki, Teruo Tanimoto
, Koji Inoue, Hiroshi Nakamura
:
Scalability-based manycore partitioning. PACT 2012: 107-116
Coauthor Index
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last updated on 2024-05-08 21:48 CEST by the dblp team
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