BibTeX records: Jeff Sondeen

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@inproceedings{DBLP:conf/glvlsi/KangSD09,
  author    = {Young Hoon Kang and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {Multicast routing with dynamic packet fragmentation},
  booktitle = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
               Boston Area, MA, USA, May 10-12 2009},
  pages     = {113--116},
  year      = {2009},
  crossref  = {DBLP:conf/glvlsi/2009},
  url       = {https://doi.org/10.1145/1531542.1531571},
  doi       = {10.1145/1531542.1531571},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/glvlsi/KangSD09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/KwonSD08,
  author    = {Taek{-}Jun Kwon and
               Jeff Sondeen and
               Jeff Draper},
  title     = {Floating-point division and square root implementation using a Taylor-series
               expansion algorithm},
  booktitle = {15th {IEEE} International Conference on Electronics, Circuits and
               Systems, {ICECS} 2008, St. Julien's, Malta, August 31 2008-September
               3, 2008},
  pages     = {702--705},
  year      = {2008},
  crossref  = {DBLP:conf/icecsys/2008},
  url       = {https://doi.org/10.1109/ICECS.2008.4674950},
  doi       = {10.1109/ICECS.2008.4674950},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/icecsys/KwonSD08.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/BarrettMKSCSD06,
  author    = {Tim Barrett and
               Sumit D. Mediratta and
               Taek{-}Jun Kwon and
               Ravinder Singh and
               Sachit Chandra and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {A double-data rate {(DDR)} processing-in-memory {(PIM)} device with
               wideword floating-point capability},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
               May 2006, Island of Kos, Greece},
  year      = {2006},
  crossref  = {DBLP:conf/iscas/2006},
  url       = {https://doi.org/10.1109/ISCAS.2006.1692989},
  doi       = {10.1109/ISCAS.2006.1692989},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/BarrettMKSCSD06.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/DraperBSMKKD05,
  author    = {Jeffrey T. Draper and
               Tim Barrett and
               Jeff Sondeen and
               Sumit D. Mediratta and
               Chang Woo Kang and
               Ihn Kim and
               Gokhan Daglikoca},
  title     = {A Prototype Processing-In-Memory {(PIM)} Chip for the Data-Intensive
               Architecture {(DIVA)} System},
  journal   = {J. {VLSI} Signal Process.},
  volume    = {40},
  number    = {1},
  pages     = {73--84},
  year      = {2005},
  url       = {https://doi.org/10.1007/s11265-005-4939-1},
  doi       = {10.1007/s11265-005-4939-1},
  timestamp = {Wed, 20 May 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/vlsisp/DraperBSMKKD05.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MedirattaSSD05,
  author    = {Sumit D. Mediratta and
               Craig S. Steele and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {An area-efficient and protected network interface for processing-in-memory
               systems},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
               May 2005, Kobe, Japan},
  pages     = {2951--2954},
  year      = {2005},
  crossref  = {DBLP:conf/iscas/2005},
  url       = {https://doi.org/10.1109/ISCAS.2005.1465246},
  doi       = {10.1109/ISCAS.2005.1465246},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/MedirattaSSD05.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KwonSD05,
  author    = {Taek{-}Jun Kwon and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {Design trade-offs in floating-point unit implementation for embedded
               and processing-in-memory systems},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
               May 2005, Kobe, Japan},
  pages     = {3331--3334},
  year      = {2005},
  crossref  = {DBLP:conf/iscas/2005},
  url       = {https://doi.org/10.1109/ISCAS.2005.1465341},
  doi       = {10.1109/ISCAS.2005.1465341},
  timestamp = {Fri, 26 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/KwonSD05.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KwonMSD04,
  author    = {Taek{-}Jun Kwon and
               Joong{-}Seok Moon and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {A 0.18 {\(\mathrm{\mu}\)}m implementation of a floating-point unit
               for a processing-in-memory system},
  booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
               {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages     = {453--456},
  year      = {2004},
  crossref  = {DBLP:conf/iscas/2004},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/KwonMSD04.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MedirattaSD04,
  author    = {Sumit D. Mediratta and
               Jeff Sondeen and
               Jeffrey T. Draper},
  title     = {An Area-Efficient Router for the Data-Intensive Architecture {(DIVA)}
               System},
  booktitle = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
               with the 3rd International Conference on Embedded Systems Design,
               5-9 January 2004, Mumbai, India},
  pages     = {863--868},
  year      = {2004},
  crossref  = {DBLP:conf/vlsid/2004},
  url       = {https://doi.org/10.1109/ICVD.2004.1261039},
  doi       = {10.1109/ICVD.2004.1261039},
  timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsid/MedirattaSD04.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DraperSMK02,
  author    = {Jeffrey T. Draper and
               Jeff Sondeen and
               Sumit D. Mediratta and
               Ihn Kim},
  title     = {Implementation of a 32-bit {RISC} Processor for the Data-Intensive
               Architecture Processing-In-Memory Chip},
  booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
               Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
               Jose, CA, {USA}},
  pages     = {163--172},
  year      = {2002},
  crossref  = {DBLP:conf/asap/2002},
  url       = {https://doi.org/10.1109/ASAP.2002.1030716},
  doi       = {10.1109/ASAP.2002.1030716},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/asap/DraperSMK02.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2009,
  editor    = {Fabrizio Lombardi and
               Sanjukta Bhanja and
               Yehia Massoud and
               R. Iris Bahar},
  title     = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
               Boston Area, MA, USA, May 10-12 2009},
  publisher = {{ACM}},
  year      = {2009},
  url       = {https://doi.org/10.1145/1531542},
  doi       = {10.1145/1531542},
  isbn      = {978-1-60558-522-2},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/glvlsi/2009.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/icecsys/2008,
  title     = {15th {IEEE} International Conference on Electronics, Circuits and
               Systems, {ICECS} 2008, St. Julien's, Malta, August 31 2008-September
               3, 2008},
  publisher = {{IEEE}},
  year      = {2008},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/4664823/proceeding},
  isbn      = {978-1-4244-2181-7},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/icecsys/2008.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2006,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
               May 2006, Island of Kos, Greece},
  publisher = {{IEEE}},
  year      = {2006},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/11145/proceeding},
  isbn      = {0-7803-9389-9},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/2006.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2005,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
               May 2005, Kobe, Japan},
  publisher = {{IEEE}},
  year      = {2005},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/9898/proceeding},
  isbn      = {0-7803-8834-8},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/2005.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iscas/2004,
  title     = {Proceedings of the 2004 International Symposium on Circuits and Systems,
               {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  publisher = {{IEEE}},
  year      = {2004},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/9255/proceeding},
  isbn      = {0-7803-8251-X},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/2004.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2004,
  title     = {17th International Conference on {VLSI} Design {(VLSI} Design 2004),
               with the 3rd International Conference on Embedded Systems Design,
               5-9 January 2004, Mumbai, India},
  publisher = {{IEEE} Computer Society},
  year      = {2004},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/8911/proceeding},
  isbn      = {0-7695-2072-3},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsid/2004.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2002,
  title     = {13th {IEEE} International Conference on Application-Specific Systems,
               Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
               Jose, CA, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2002},
  url       = {https://ieeexplore.ieee.org/xpl/conhome/8009/proceeding},
  isbn      = {0-7695-1712-9},
  timestamp = {Tue, 19 Oct 2021 12:56:07 +0200},
  biburl    = {https://dblp.org/rec/conf/asap/2002.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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