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ORCIDZain Ul-Abdin
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2020 – today
- 2022
[j9]Nesma M. Rezk
, Tomas Nordström, Zain Ul-Abdin:
Shrink and Eliminate: A Study of Post-Training Quantization and Repeated Operations Elimination in RNN Models. Inf. 13(4): 176 (2022)- [j8]Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani:
MOHAQ: Multi-Objective Hardware-Aware Quantization of recurrent neural networks. J. Syst. Archit. 133: 102778 (2022) - 2021
- [i3]Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani:
Multi-objective Recurrent Neural Networks Optimization for the Edge - a Quantization-based Approach. CoRR abs/2108.01192 (2021) - 2020
- [j7]Nesma M. Rezk, Madhura Purnaprajna, Tomas Nordström, Zain Ul-Abdin:
Recurrent Neural Networks: An Embedded Computing Perspective. IEEE Access 8: 57967-57996 (2020) - [j6]Süleyman Savas, Zain Ul-Abdin, Tomas Nordström:
A framework to generate domain-specific manycore architectures from dataflow programs. Microprocess. Microsystems 72 (2020)
2010 – 2019
- 2019
- [c24]Süleyman Savas, Yassin Atwa, Tomas Nordström, Zain Ul-Abdin:
Using Harmonized Parabolic Synthesis to Implement a Single-Precision Floating-Point Square Root Unit. ISVLSI 2019: 621-626 - [i2]Nesma M. Rezk, Madhura Purnaprajna, Tomas Nordström, Zain Ul-Abdin:
Recurrent Neural Networks: An Embedded Computing Perspective. CoRR abs/1908.07062 (2019) - 2018
- [j5]Süleyman Savas, Zain Ul-Abdin, Tomas Nordström:
Designing Domain-Specific Heterogeneous Architectures from Dataflow Programs. Comput. 7(2): 27 (2018) - [c23]Nesma M. Rezk, Madhura Purnaprajna, Zain Ul-Abdin:
Streaming Tiles: Flexible Implementation of Convolution Neural Networks Inference on Manycore Architectures. IPDPS Workshops 2018: 867-876 - 2017
- [j4]Zain-ul-Abdin, Mingkun Yang:
A Radar Signal Processing Case Study for Dataflow Programming of Manycores. J. Signal Process. Syst. 87(1): 49-62 (2017) - [c22]Essayas Gebrewahid, Zain Ul-Abdin:
Actor fission transformations for executing dataflow programs on manycores. FDL 2017: 1-8 - [c21]Süleyman Savas, Erik Hertz, Tomas Nordström, Zain Ul-Abdin:
Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis. ISVLSI 2017: 110-115 - 2016
- [j3]Zain-ul-Abdin, Bertil Svensson:
A Retargetable Compilation Framework for Heterogeneous Reconfigurable Computing. ACM Trans. Reconfigurable Technol. Syst. 9(4): 24:1-24:22 (2016) - [c20]Süleyman Savas, Sebastian Raase, Essayas Gebrewahid, Zain-ul-Abdin, Tomas Nordström:
Dataflow Implementation of QR Decomposition on a Manycore. MES@ISCA 2016: 26-30 - [c19]Benard Xypolitidis, Rudin Shabani, Satej V. Khandeparkar, Zain-ul-Abdin, Süleyman Savas, Tomas Nordström:
Towards Architectural Design Space Exploration for Heterogeneous Manycores. PDP 2016: 805-810 - [c18]Essayas Gebrewahid, Mehmet Ali Arslan, Andreas Karlsson, Zain-ul-Abdin:
Support for data parallelism in the CAL actor language. WPMVP@PPoPP 2016: 2:1-2:8 - 2015
- [c17]Zain-ul-Abdin, Bertil Svensson:
Towards teaching embedded parallel computing: an analytical approach. WCAE 2015: 8:1-8:6 - 2014
- [c16]Andreas Olofsson, Tomas Nordström, Zain-ul-Abdin:
Kickstarting high-performance energy-efficient manycore architectures with Epiphany. ACSSC 2014: 1719-1726 - [c15]Essayas Gebrewahid, Mingkun Yang, Gustav Cedersjö, Zain-ul-Abdin, Verónica Gaspes, Jörn W. Janneck, Bertil Svensson:
Realizing Efficient Execution of Dataflow Actors on Manycores. EUC 2014: 321-328 - [c14]Zain-ul-Abdin, Mingkun Yang:
Dataflow programming of real-time radar signal processing on manycores. GlobalSIP 2014: 15-19 - [c13]Bertil Svensson, Zain-ul-Abdin, Per M. Ericsson, Anders Åhlander, Hoai Hoang Bengtsson, Jerker Bengtsson, Verónica Gaspes, Tomas Nordström:
A running leap for embedded signal processing to future parallel platforms. WISE@ASE 2014: 35-42 - [c12]Süleyman Savas, Essayas Gebrewahid, Zain-ul-Abdin, Tomas Nordström, Mingkun Yang:
An evaluation of code generation of dataflow languages on manycore architectures. RTCSA 2014: 1-9 - [i1]Andreas Olofsson, Tomas Nordström, Zain-ul-Abdin:
Kickstarting High-performance Energy-efficient Manycore Architectures with Epiphany. CoRR abs/1412.5538 (2014) - 2013
- [c11]Essayas Gebrewahid, Zain-ul-Abdin, Bertil Svensson, Verónica Gaspes, Bruno Jego, Bruno Lavigueur, Mathieu Robart:
Programming Real-Time Image Processing for Manycores in a High-Level Language. APPT 2013: 381-395 - [c10]Zain-ul-Abdin, Bertil Svensson:
An Evaluation of High-Performance Embedded Processing on MPPAs. FCCM 2013: 235 - [c9]Zain-ul-Abdin, Anders Ahlander, Bertil Svensson:
Energy-Efficient Synthetic-Aperture Radar Processing on a Manycore Architecture. ICPP 2013: 330-338 - 2012
- [j2]Zain-ul-Abdin, Bertil Svensson:
Occam-pi for Programming of Massively Parallel Reconfigurable Architectures. Int. J. Reconfigurable Comput. 2012: 504815:1-504815:17 (2012) - [c8]Zain-ul-Abdin, Essayas Gebrewahid, Bertil Svensson:
Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture. IPDPS Workshops 2012: 312-319 - [c7]Ashraful Alam, Zain-ul-Abdin, Bertil Svensson:
Parallelization of the estimation algorithm of the 3D structure tensor. ReConFig 2012: 1-6 - 2011
- [b1]Zain Ul-Abdin:
Programming of Coarse-Grained Reconfigurable Architectures. Halmstad University, Sweden, 2011 - [c6]Zain-ul-Abdin, Anders Ahlander, Bertil Svensson:
Programming Real-Time Autofocus on a Massively Parallel Reconfigurable Architecture Using Occam-pi. FCCM 2011: 194-201 - [c5]Zain-ul-Abdin, Bertil Svensson:
Occam-pi as a High-Level Language for Coarse-Grained Reconfigurable Architectures. IPDPS Workshops 2011: 236-243
2000 – 2009
- 2009
- [j1]Zain-ul-Abdin, Bertil Svensson:
Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing. Microprocess. Microsystems 33(3): 161-178 (2009) - [c4]Zain-ul-Abdin:
High-level programming of coarse-grained reconfigurable architectures. FPL 2009: 713-714 - 2008
- [c3]Zain-ul-Abdin, Bertil Svensson:
Using a CSP Based Programming Model for Reconfigurable Processor Arrays. ReConFig 2008: 343-348 - 2007
- [c2]Zain-ul-Abdin, Bertil Svensson:
A Study of Design Efficiency with a High-Level Language for FPGAs. IPDPS 2007: 1-7 - 2005
- [c1]Zain-ul-Abdin, Bertil Svensson:
Compiling Stream-Language Applications to a Reconfigurable Array Processor. ERSA 2005: 274-275
Coauthor Index
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