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J. Robert Jump
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1990 – 1999
- 1994
- [j20]Sandhya Dwarkadas
, J. Robert Jump, James B. Sinclair:
Execution-Driven Simulation of Multiprocessors: Address and Timing Analysis. ACM Trans. Model. Comput. Simul. 4(4): 314-338 (1994) - [c16]H. A. Rizvi, James B. Sinclair, J. Robert Jump, J. Carson:
Execution-Driven Simulation of a Superscalar Processor. HICSS (1) 1994: 185-194 - 1993
- [c15]Sandhya Dwarkadas, J. Robert Jump, R. Mukherjee, James B. Sinclair:
Execution-Driven Simulation of Shared-Memory Multiprocessors. MASCOTS 1993: 83-86 - [c14]J. Robert Jump, Sridhar Lakshmanamurthy:
NETSIM: A General-Purpose Interconnection Network Simulator. MASCOTS 1993: 121-125 - 1991
- [j19]Richard Covington, Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair, Sridhar Madala:
Efficient Simulation of Parallel Computer Systems. Int. J. Comput. Simul. 1(1) (1991) - 1990
- [j18]David T. Harper III, J. Robert Jump:
Evaluation of Reduced Bandwidth Multistage Networks. J. Parallel Distributed Comput. 9(3): 304-311 (1990) - [c13]W. P. Dawkins, V. Debbad, J. Robert Jump, James B. Sinclair:
Efficient Simulation of Multiprogramming. SIGMETRICS 1990: 237-238
1980 – 1989
- 1989
- [c12]Richard Covington, J. Robert Jump, James B. Sinclair:
Cross-profiling as an efficient technique in simulating parallel computer systems. COMPSAC 1989: 75-80 - [c11]Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair:
Efficient simulation of cache memories. WSC 1989: 1032-1041 - 1988
- [c10]Richard Covington, Sridhar Madala, V. Mehta, J. Robert Jump, James B. Sinclair:
The Rice Parallel Processing Testbed. SIGMETRICS 1988: 4-11 - 1987
- [j17]David T. Harper III, J. Robert Jump:
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme. IEEE Trans. Computers 36(12): 1440-1449 (1987) - [c9]David T. Harper III, J. Robert Jump:
Performance Evaluation of Reduced Bandwidth Multistage Interconnection Networks. ISCA 1987: 171-175 - 1986
- [j16]Manoj Kumar, J. Robert Jump:
Performance of Unbuffered Shuffle-Exchange Networks. IEEE Trans. Computers 35(6): 573-578 (1986) - [c8]David T. Harper III, J. Robert Jump:
Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage Scheme. ISCA 1986: 324-328 - 1985
- [j15]Manoj Kumar, Daniel M. Dias, J. Robert Jump:
Switching Strategies in Shuffle-Exchange Packet-Switched Networks. IEEE Trans. Computers 34(2): 180-186 (1985) - [c7]G. Wolf, J. Robert Jump:
Matrix Multiplication in an Interleaved Array Processing Architecture. ISCA 1985: 11-17 - 1984
- [j14]Manoj Kumar, J. Robert Jump:
Performance enhancement in buffered delta networks using crossbar switches and multiple links. J. Parallel Distributed Comput. 1(2): 81-103 (1984) - [c6]J. Robert Jump, James D. Wise, David T. Harper III:
An interleaved array-processing architecture. AFIPS National Computer Conference 1984: 93-100 - 1983
- [c5]Manoj Kumar, J. Robert Jump:
Generalized Delta Networks. ICPP 1983: 10-18 - [c4]Manoj Kumar, Daniel M. Dias, J. Robert Jump:
Switching Strategies in a Class of Packet Switching Networks. ISCA 1983: 284-300 - 1982
- [c3]Daniel M. Dias, J. Robert Jump:
Augmented and pruned n log n multistaged networks: topology and performance. ICPP 1982: 10-12 - 1981
- [j13]Daniel M. Dias, J. Robert Jump:
Packet Switching Interconnection Networks for Modular Systems. Computer 14(12): 43-53 (1981) - [j12]Daniel M. Dias, J. Robert Jump:
Analysis and Simulation of Buffered Delta Networks. IEEE Trans. Computers 30(4): 273-282 (1981)
1970 – 1979
- 1979
- [j11]N. D. Jotwani, J. Robert Jump:
Top-Down Design in the Context of Parallel Programs. Inf. Control. 40(3): 241-257 (1979) - [j10]Susan E. Conry, J. Robert Jump:
On Functional Equivalences in a Model for Parallel Computation. Inf. Control. 41(3): 247-274 (1979) - 1978
- [j9]J. Robert Jump, Sudhir Ahuja:
Effective Pipelining of Digital Systems. IEEE Trans. Computers 27(9): 855-865 (1978) - 1977
- [c2]S. R. Ahuja, J. Robert Jump:
A Modular Memory Scheme for Array Processing. ISCA 1977: 90-94 - 1975
- [j8]J. Robert Jump, P. S. Thiagarajan:
On the Interconnection of Asynchronous Control Structures. J. ACM 22(4): 596-612 (1975) - 1974
- [j7]J. Robert Jump, Jayang S. Kirtane:
On the Interconnection Structure of Cellular Networks. Inf. Control. 24(1): 74-91 (1974) - [j6]J. Robert Jump:
Asynchronous Control Arrays. IEEE Trans. Computers 23(10): 1020-1029 (1974) - 1973
- [j5]J. Robert Jump, P. S. Thiagarajan:
On the Equivalence of Asynchronous Control Structures. SIAM J. Comput. 2(2): 67-87 (1973) - 1972
- [j4]J. Robert Jump, Dennis R. Fritsche:
Microprogrammed Arrays. IEEE Trans. Computers 21(9): 974-984 (1972) - [c1]J. Robert Jump, P. S. Thiagarajan:
On the Equivalence of Asynchronous Control Structures. SWAT 1972: 212-223 - 1971
- [j3]J. Robert Jump, Shreehari Marathe:
On the Length of Feedback Shift Registers. Inf. Control. 19(4): 345-352 (1971) - 1970
- [j2]J. Robert Jump:
R70-29 Uniform Synthesis of Sequential Circuits. IEEE Trans. Computers 19(8): 765 (1970)
1960 – 1969
- 1969
- [j1]J. Robert Jump:
A Note on the Iterative Decomposition of Finite Automata. Inf. Control. 15(5): 424-435 (1969)
Coauthor Index
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