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David B. Whalley
- > Home > Persons > David B. Whalley
Publications
- 2020
- [c77]An-I Andy Wang, David B. Whalley, Zhenghao Zhang, Gary S. Tyson:
Experience of Administering Our First S-STEM Program to Broaden Participation in Computer Science. SIGCSE 2020: 535-541 - 2015
- [c71]B. Davis, Ryan Baird, Peter Gavin, Magnus Själander, Ian Finlayson, F. Rasapour, G. Cook, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
Scheduling instruction effects for a statically pipelined processor. CASES 2015: 167-176 - 2014
- [c65]An-I Andy Wang, Gary S. Tyson, David B. Whalley, Robert van Engelen, Zhenghao Zhang:
A journey toward obtaining our first NSF S-STEM (scholarship) grant. SIGCSE 2014: 427-432 - 2013
- [c62]Ian Finlayson, Brandon Davis, Peter Gavin, Gang-Ryung Uh, David B. Whalley, Magnus Själander, Gary S. Tyson:
Improving processor efficiency by statically pipelining instructions. LCTES 2013: 33-44 - 2012
- [j33]Ian Finlayson, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
An Overview of Static Pipelining. IEEE Comput. Archit. Lett. 11(1): 17-20 (2012) - [j32]Daniel Chang, Stephen Hines, Paul E. West, Gary S. Tyson, David B. Whalley:
Program Differentiation. J. Circuits Syst. Comput. 21(2) (2012) - 2011
- [c61]Ian Finlayson, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
Improving Low Power Processor Efficiency with Static Pipelining. Interaction between Compilers and Computer Architectures 2011: 17-24 - 2009
- [j30]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
Practical exhaustive optimization phase order exploration and evaluation. ACM Trans. Archit. Code Optim. 6(1): 1:1-1:36 (2009) - [c59]Stephen Roderick Hines, Yuval Peress, Peter Gavin, David B. Whalley, Gary S. Tyson:
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE). LCTES 2009: 119-128 - 2008
- [c58]David B. Whalley, Gary S. Tyson:
Enhancing the effectiveness of utilizing an instruction register file. IPDPS 2008: 1-5 - 2007
- [c57]Christopher Zimmer, Stephen Roderick Hines, Prasad A. Kulkarni, Gary S. Tyson, David B. Whalley:
Facilitating compiler optimizations through the dynamic mapping of alternate register structures. CASES 2007: 165-169 - [c56]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson:
Evaluating Heuristic Optimization Phase Order Search Algorithms. CGO 2007: 157-169 - [c54]Stephen Roderick Hines, Gary S. Tyson, David B. Whalley:
Addressing instruction fetch bottlenecks by using an instruction register file. LCTES 2007: 165-174 - [c53]Stephen Hines, David B. Whalley, Gary S. Tyson:
Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache. MICRO 2007: 433-444 - 2006
- [c51]Stephen Hines, David B. Whalley, Gary S. Tyson:
Adapting compilation techniques to enhance the packing of instructions into registers. CASES 2006: 43-53 - [c50]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
Exhaustive Optimization Phase Order Space Exploration. CGO 2006: 306-318 - [c48]William C. Kreahling, Stephen Hines, David B. Whalley, Gary S. Tyson:
Reducing the cost of conditional transfers of control by using comparison specifications. LCTES 2006: 64-71 - [c47]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
In search of near-optimal optimization phase orderings. LCTES 2006: 83-92 - 2005
- [c44]Stephen Hines, Joshua Green, Gary S. Tyson, David B. Whalley:
Improving Program Efficiency by Packing Instructions into Registers. ISCA 2005: 260-271 - [c43]Stephen Hines, Gary S. Tyson, David B. Whalley:
Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows. MICRO 2005: 19-29
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