Tsung-Yen Tsai

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yu-Huei Lee

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Publications

2013
[j4]
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Yu-Huei Lee, Shen-Yu Peng, Chao-Chang Chiu, Alex Chun-Hsien Wu, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee:
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. IEEE J. Solid State Circuits 48(4): 1018-1030 (2013)
[j3]
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  - journals/jssc/PengHLCCLLTHCY13
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Shen-Yu Peng, Tzu-Chi Huang, Yu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Tsung-Yen Tsai, Chen-Chih Huang, Long-Der Chen, Cheng-Chen Yang:
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. IEEE J. Solid State Circuits 48(11): 2649-2661 (2013)
2012
[j1]
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Yu-Huei Lee, Chao-Chang Chiu, Shen-Yu Peng, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Chen-Chih Huang, Tsung-Yen Tsai:
A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. IEEE J. Solid State Circuits 47(11): 2563-2575 (2012)
[c2]
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  - conf/esscirc/LeeHCCCLTYHL12
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Yu-Huei Lee, Tzu-Chi Huang, Kuan-Yu Chu, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Tsung-Yen Tsai, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee:
A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. ESSCIRC 2012: 161-164

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