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Anirban Sengupta
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Publications
- 2020
- [c56]Mahendra Rathor, Pallabi Sarkar, Vipul Kumar Mishra, Anirban Sengupta:
Securing IP Cores in CE Systems using Key-driven Hash-chaining based Steganography. ICCE-Berlin 2020: 1-4 - 2017
- [c38]Vipul Kumar Mishra, Anirban Sengupta:
Comprehensive Operation Chaining Based Schedule Delay Estimation During High Level Synthesis. iNIS 2017: 66-68 - 2015
- [j12]Anirban Sengupta, Vipul Kumar Mishra:
Simultaneous exploration of optimal datapath and loop based high level transformation during area-delay tradeoff in architectural synthesis using swarm intelligence. Int. J. Knowl. Based Intell. Eng. Syst. 19(1): 47-61 (2015) - 2014
- [j10]Vipul Kumar Mishra, Anirban Sengupta:
MO-PSE: Adaptive multi-objective particle swarm optimization based design space exploration in architectural synthesis for application specific processor design. Adv. Eng. Softw. 67: 111-124 (2014) - [j8]Anirban Sengupta, Vipul Kumar Mishra:
Automated exploration of datapath and unrolling factor during power-performance tradeoff in architectural synthesis using multi-dimensional PSO algorithm. Expert Syst. Appl. 41(10): 4691-4703 (2014) - [c24]Anirban Sengupta, Vipul Kumar Mishra:
Automated parallel exploration of datapath and Unrolling Factor in High Level Synthesis using hyper-dimensional particle swarm encoding. CCECE 2014: 1-5 - [c23]Anirban Sengupta, Vipul Kumar Mishra:
Time Varying vs. Fixed Acceleration Coefficient PSO Driven Exploration during High Level Synthesis: Performance and Quality Assessment. ICIT 2014: 281-286 - [c20]Vipul Kumar Mishra, Anirban Sengupta:
PSDSE: Particle Swarm Driven Design Space Exploration of Architecture and Unrolling Factors for Nested Loops in High Level Synthesis. ISED 2014: 10-14 - [c19]Anirban Sengupta, Vipul Kumar Mishra:
Integrated particle swarm optimization (i-PSO): An adaptive design space exploration framework for power-performance tradeoff in architectural synthesis. ISQED 2014: 60-67 - [c18]Anirban Sengupta, Vipul Kumar Mishra:
Swarm Intelligence Driven Simultaneous Adaptive Exploration of Datapath and Loop Unrolling Factor during Area-Performance Tradeoff. ISVLSI 2014: 106-111 - 2013
- [c14]Anirban Sengupta, Vipul Kumar Mishra:
D-logic exploration: Rapid search of Pareto fronts during architectural synthesis of custom processors. ICACCI 2013: 586-593
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