Остановите войну!
for scientists:
default search action
Bipul Chandra Paul
- > Home > Persons > Bipul Chandra Paul
Publications
- 2007
- [j10]Bipul Chandra Paul, Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy:
Negative Bias Temperature Instability: Estimation and Design for Improved Reliability of Nanoscale Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(4): 743-751 (2007) - 2006
- [j9]Bipul C. Paul, Kaushik Roy:
Impact of Body Bias on Delay Fault Testing of Sub-100 nm CMOS Circuits. J. Electron. Test. 22(2): 115-124 (2006) - [j8]Bipul Chandra Paul, Amit Agarwal, Kaushik Roy:
Low-power design techniques for scaled technologies. Integr. 39(2): 64-89 (2006) - [j7]Aditya Bansal, Bipul Chandra Paul, Kaushik Roy:
An Analytical Fringe Capacitance Model for Interconnects Using Conformal Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2765-2774 (2006) - [j6]Kunhyuk Kang, Bipul C. Paul, Kaushik Roy:
Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters. ACM Trans. Design Autom. Electr. Syst. 11(4): 848-879 (2006) - [c14]Bipul Chandra Paul, Kunhyuk Kang, Haldun Kufluoglu, Muhammad Ashraful Alam, Kaushik Roy:
Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits. DATE 2006: 780-785 - [c13]Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy:
Ultralow power computing with sub-threshold leakage: a comparative study of bulk and SOI technologies. DATE 2006: 856-861 - 2005
- [j5]Amit Agarwal, Bipul C. Paul, Saibal Mukhopadhyay, Kaushik Roy:
Process variation in embedded memories: failure analysis and variation aware architecture. IEEE J. Solid State Circuits 40(9): 1804-1814 (2005) - [j4]Amit Agarwal, Bipul Chandra Paul, Hamid Mahmoodi-Meimand, Animesh Datta, Kaushik Roy:
A process-tolerant cache architecture for improved yield in nanoscale technologies. IEEE Trans. Very Large Scale Integr. Syst. 13(1): 27-38 (2005) - [j3]Arijit Raychowdhury, Bipul Chandra Paul, Swarup Bhunia, Kaushik Roy:
Computing with subthreshold leakage: device/circuit/architecture co-design for ultralow-power subthreshold operation. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1213-1224 (2005) - [c12]Kunhyuk Kang, Bipul Chandra Paul, Kaushik Roy:
Statistical Timing Analysis using Levelized Covariance Propagation. DATE 2005: 764-769 - 2004
- [j2]Naran Sirisantana, Bipul Chandra Paul, Kaushik Roy:
Enhancing Yield at the End of the Technology Roadmap. IEEE Des. Test Comput. 21(6): 563-571 (2004) - [c11]Woopyo Jeong, Bipul Chandra Paul, Kaushik Roy:
Adaptive supply voltage technique for low swing interconnects. ASP-DAC 2004: 284-287 - [c10]Amit Agarwal, Bipul C. Paul, Kaushik Roy:
Process variation in nano-scale memories: failure analysis and process tolerant architecture. CICC 2004: 353-356 - [c9]Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy:
Novel sizing algorithm for yield improvement under process variation in nanometer technology. DAC 2004: 454-459 - [c8]Amit Agarwal, Bipul Chandra Paul, Kaushik Roy:
A Novel Fault Tolerant Cache to Improve Yield in Nanometer Technologies. IOLTS 2004: 149-154 - [c7]Bipul Chandra Paul, Arijit Raychowdhury, Kaushik Roy:
Device optimization for ultra-low power digital sub-threshold operation. ISLPED 2004: 96-101 - [c6]Bipul Chandra Paul, Cassondra Neau, Kaushik Roy:
Impact of Body Bias on Delay Fault Testing of Nanoscale CMOS Circuits. ITC 2004: 1269-1275 - 2002
- [c5]Bipul Chandra Paul, Kaushik Roy:
Testing CrossTalk Induced Delay Faults in Static CMOS Circuits Through Dynamic Timing Analysis. ITC 2002: 384-390 - [c4]Seung Hoon Choi, Bipul Chandra Paul, Kaushik Roy:
Dynamic Noise Analysis with Capacitive and Inductive Coupling. ASP-DAC/VLSI Design 2002: 65-70 - 2001
- [j1]Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul:
Robust subthreshold logic for ultra-low power operation. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 90-99 (2001) - [c3]Bipul Chandra Paul, Seung Hoon Choi, Yonghee Im, Kaushik Roy:
Design Verification and Robust Design Technique for Cross-Talk Faults. Asian Test Symposium 2001: 449- - [c2]Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul:
Sub-Domino Logic: Ultra-Low Power Dynamic Sub-Threshold Digital Logic. VLSI Design 2001: 211-214 - 2000
- [c1]Hendrawan Soeleman, Kaushik Roy, Bipul Chandra Paul:
Robust ultra-low power sub-threshold DTMOS logic. ISLPED 2000: 25-30
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from , , and to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2023-11-14 02:00 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint