Maciej J. Ciesielski

◀ ▶ joint publications with Kesava R. Talupuru

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Publications

2008
[c38]
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Kyuho Shim, Kesava R. Talupuru, Maciej J. Ciesielski, Seiyang Yang:
Simulation Acceleration with HW Re-Compilation Avoidance. VLSI Design 2008: 487-491
2005
[j16]
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  - journals/jsa/ZengTC05
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Zhihong Zeng, Kesava R. Talupuru, Maciej J. Ciesielski:
Functional test generation based on word-level SAT. J. Syst. Archit. 51(8): 488-511 (2005)

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