Mike Schlansker

◀ ▶ joint publications with Parthasarathy P. Tirumalai

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Publications

1992
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B. Ramakrishna Rau, Michael S. Schlansker, Parthasarathy P. Tirumalai:
Code generation schema for modulo scheduled loops. MICRO 1992: 158-169
[c5]
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B. Ramakrishna Rau, Meng Lee, Parthasarathy P. Tirumalai, Michael S. Schlansker:
Register Allocation for Software Pipelined Loops. PLDI 1992: 283-299
1991
[j1]
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Parthasarathy P. Tirumalai, Meng Lee, Michael S. Schlansker:
Parallelization of WHILE loops on pipelined architectures. J. Supercomput. 5(2-3): 119-136 (1991)
1990
[c4]
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Parthasarathy P. Tirumalai, Meng Lee, Michael S. Schlansker:
Parallelization of loops with exits on pipelined architectures. SC 1990: 200-212

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