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ORCIDCong-Kha Pham
- > Home > Persons > Cong-Kha Pham
Publications
- 2020
[j27]Xuan-Thuan Nguyen
, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS. Microprocess. Microsystems 73: 102970 (2020)- 2019
- [j25]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB. Microprocess. Microsystems 69: 112-117 (2019) - [j24]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 472-476 (2019) - 2018
- [j22]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation. IEEE Access 6: 16046-16059 (2018) - [j21]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Cong-Kha Pham:
A CORDIC-based QR decomposition for MIMO signal detector. IEICE Electron. Express 15(5) (2018) - [j18]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
A High-Throughput Low-Energy Arithmetic Processor. IEICE Trans. Electron. 101-C(4): 281-284 (2018) - [j17]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
A Low-Power Hybrid Adaptive CORDIC. IEEE Trans. Circuits Syst. II Express Briefs 65-II(4): 496-500 (2018) - [c40]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
An efficient fixed-point arithmetic processor using a hybrid CORDIC algorithm. ASP-DAC 2018: 327-328 - [c36]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS. ISCAS 2018: 1-4 - [c34]Katsumi Inoue, Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study. PRIME 2018: 161-164 - [i5]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation. CoRR abs/1803.11207 (2018) - [i4]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
An Efficient I/O Architecture for RAM-based Content-Addressable Memory on FPGA. CoRR abs/1804.02330 (2018) - [i3]Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 1.2-V 162.9-pJ/cycle Bitmap Index Creation Core with 0.31-pW/bit Standby Power on 65-nm SOTB. CoRR abs/1806.06902 (2018) - 2017
- [j16]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
A Low-Latency Parallel Pipeline CORDIC. IEICE Trans. Electron. 100-C(4): 391-398 (2017) - [j15]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1102-1106 (2017) - [c33]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Katsumi Inoue, Osamu Shimojo, Cong-Kha Pham:
Highly parallel bitmap-based regular expression matching for text analytics. ISCAS 2017: 1-4 - [c30]Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham:
FPGA-based frequent items counting using matrix of equality comparators. MWSCAS 2017: 285-288 - [i1]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion. CoRR abs/1712.03478 (2017) - 2016
- [j14]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
An FPGA approach for fast bitmap indexing. IEICE Electron. Express 13(4): 20160006 (2016) - [j13]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
An FPGA approach for high-performance multi-match priority encoder. IEICE Electron. Express 13(13): 20160447 (2016) - [c29]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process. ICICDT 2016: 1-4 - [c28]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Osamu Shimojo, Toshio Murayama, Kenji Tominaga, Cong-Kha Pham:
An efficient FPGA-based database processor for fast database analytics. ISCAS 2016: 1758-1761 - [c27]Trong-Thuc Hoang, Duc-Hung Le, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham:
A hybrid adaptive CORDIC in 65nm SOTB CMOS process. ISCAS 2016: 2158-2161 - 2015
- [j12]Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham:
Low-resource low-latency hybrid adaptive CORDIC with floating-point precision. IEICE Electron. Express 12(9): 20150258 (2015) - [c22]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
SAR: A Self-Adaptive and Reliable protocol for wireless multimedia sensor networks. ICUFN 2015: 760-765 - [c21]Xuan-Thuan Nguyen, Hong-Thu Nguyen, Cong-Kha Pham:
Parallel pipelining configurable multi-port memory controller for multimedia applications. ISCAS 2015: 2908-2911
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