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Jaime Jiménez
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Publications
- 2024
- [j21]Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, José Ángel Araujo, Jaime Jiménez:
AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems. IEEE Trans. Reliab. 73(1): 602-607 (2024) - 2022
- [j18]Le Sun, Leire Muguira, Jaime Jiménez, Armando Astarloa, Jesús Lázaro:
High-Performance Computing Architecture for Sample Value Processing in the Smart Grid. IEEE Access 10: 12208-12218 (2022) - [j17]Jesús Lázaro, Unai Bidarte, Leire Muguira, Armando Astarloa, Jaime Jiménez:
Embedded firewall for on-chip bus transactions. Comput. Electr. Eng. 98: 107707 (2022) - [c33]Pedro Fernández, Jaime Jiménez, Armando Astarloa, Mikel Idirin, Sergio Salas:
Accelerating Video Analytic Processing on Edge Intelligence. DCIS 2022: 1-6 - 2021
- [j16]Mikel Rodriguez, Jesús Lázaro, Unai Bidarte, Jaime Jiménez, Armando Astarloa:
A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems. IEEE Access 9: 51646-51658 (2021) - 2020
- [c29]Jesús Lázaro, Laura Burgos, Leire Muguira, Armando Astarloa, Jaime Jiménez:
Electronic control board for student Rocket. DCIS 2020: 1-5 - [c27]Armando Astarloa, Mikel Rodriguez, Francisco Durán, Jaime Jiménez, Jesús Lázaro:
Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks. DCIS 2020: 1-6 - 2018
- [c22]Mikel Rodriguez, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez:
System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS. DCIS 2018: 1-6 - 2017
- [j12]Naiara Moreira, Jesús Lázaro, Unai Bidarte, Jaime Jimenez, Armando Astarloa:
On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems. IEEE Trans. Smart Grid 8(4): 1932-1942 (2017) - 2016
- [c19]Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro:
Intelligent gateway for Industry 4.0-compliant production. IECON 2016: 4902-4907 - 2014
- [j10]Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser:
Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs. IEEE Trans. Ind. Electron. 61(5): 2493-2503 (2014) - [j9]Joaquin Perez, Jaime Jimenez, Asier Rabanal, Armando Astarloa, Jesús Lázaro:
FTL-CFree: A Fuzzy Real-Time Language for Runtime Verification. IEEE Trans. Ind. Informatics 10(3): 1670-1683 (2014) - [c16]Aitzol Zuloaga, Armando Astarloa, Jaime Jimenez, Jesús Lázaro, Jose Angel Araujo:
Cost-effective redundancy for ethernet train communications using HSR. ISIE 2014: 1117-1122 - 2012
- [c13]Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser:
Fast and accurate Single Bit Error injection into SRAM Based FPGAs. FPL 2012: 675-678 - 2011
- [j8]Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez:
I2CSec: A secure serial Chip-to-Chip communication protocol. J. Syst. Archit. 57(2): 206-213 (2011) - [c12]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Jaime Jimenez, Aitzol Zuloaga:
An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS. SoC 2011: 96-101 - [c11]Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez:
Robustness Analysis of Different AES Implementations on SRAM Based FPGAs. ReConFig 2011: 255-260 - [c10]Oscar Daniel Diaz, Armando Astarloa, Aitzol Zuloaga, Jesús Lázaro, Jaime Jimenez:
NoCmodel: An extensible framework for Network-on-Chips modeling. ReCoSoC 2011: 1-6 - 2010
- [j7]Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa:
Reconfigurable Multiprocessor Systems: A Review. Int. J. Reconfigurable Comput. 2010: 570279:1-570279:10 (2010) - 2009
- [c9]Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga:
AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications. ARC 2009: 312-317 - [c8]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez:
DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus. ICDCS Workshops 2009: 472-475 - [c7]Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez:
PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems. ReConFig 2009: 54-58 - [c6]Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa:
Overview of FPGA-Based Multiprocessor Systems. ReConFig 2009: 273-278 - 2008
- [c5]Armando Astarloa, Unai Bidarte, Jaime Jimenez, Jesús Lázaro, Iñigo Martínez de Alegría:
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes. ATC 2008: 603-614 - 2007
- [j6]Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa:
GPS-less location algorithm for wireless sensor networks. Comput. Commun. 30(14-15): 2904-2916 (2007) - [j5]Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez:
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs. J. Syst. Archit. 53(9): 629-643 (2007) - [j4]Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga:
Design of a Master Device for the Multifunction Vehicle Bus. IEEE Trans. Veh. Technol. 56(6): 3695-3708 (2007) - 2006
- [c3]Jaime Jimenez, Iker Hoyos, Jagoba Arias, Armando Astarloa, José Luis Martín:
Modifying Slots in Test Vectors to Validate Decoders of a Train Network. ICWMC 2006: 58 - 2003
- [c1]Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría:
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements. FPL 2003: 497-506
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last updated on 2024-03-24 02:37 CET by the dblp team
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