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Yu Cao 0001

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Min Chen 0024

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Publications

2013
[c61]
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  dblp key:
  - conf/essderc/ChenRKOC13
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  persistent URL:
  - https://dblp.org/rec/conf/essderc/ChenRKOC13
Min Chen, Vijay Reddy, Srikanth Krishnan, Jay Ondrusek, Yu Cao:
ACE: A robust variability and aging sensor for high-k/metal gate SoC. ESSDERC 2013: 182-185
2012
[j30]
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  dblp key:
  - journals/dt/ChenRKSC12
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  - https://dblp.org/rec/journals/dt/ChenRKSC12
Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao:
Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors. IEEE Des. Test Comput. 29(5): 18-26 (2012)
2011
[j22]
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  dblp key:
  - journals/tvlsi/YeLCNC11
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  - https://dblp.org/rec/journals/tvlsi/YeLCNC11
Yun Ye, Frank Liu, Min Chen, Sani R. Nassif, Yu Cao:
Statistical Modeling and Simulation of Threshold Variation Under Random Dopant Fluctuations and Line-Edge Roughness. IEEE Trans. Very Large Scale Integr. Syst. 19(6): 987-996 (2011)
2010
[c45]
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  dblp key:
  - conf/dac/ChellappaNYHVCCC10
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  - https://dblp.org/rec/conf/dac/ChellappaNYHVCCC10
Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark:
In-situ characterization and extraction of SRAM variability. DAC 2010: 711-716
2009
[j14]
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  dblp key:
  - journals/tvlsi/ChenZLC09
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  - https://dblp.org/rec/journals/tvlsi/ChenZLC09
Min Chen, Wei Zhao, Frank Liu, Yu Cao:
Finite-Point-Based Transistor Model: A New Approach to Fast Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. 17(10): 1470-1480 (2009)
[c35]
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  - conf/dac/YeLCC09
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  - https://dblp.org/rec/conf/dac/YeLCC09
Yun Ye, Frank Liu, Min Chen, Yu Cao:
Variability analysis under layout pattern-dependent rapid-thermal annealing process. DAC 2009: 551-556
[c33]
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  dblp key:
  - conf/iccad/WangZLCC09
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  - https://dblp.org/rec/conf/iccad/WangZLCC09
Chi-Chao Wang, Wei Zhao, Frank Liu, Min Chen, Yu Cao:
Modeling of layout-dependent stress effect in CMOS design. ICCAD 2009: 513-520
2007
[c21]
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  - electronic edition @ acm.org
  - no references & citations available
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  dblp key:
  - conf/date/ChenZLC07
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  - https://dblp.org/rec/conf/date/ChenZLC07
Min Chen, Wei Zhao, Frank Liu, Yu Cao:
Fast statistical circuit analysis with finite-point based transistor model. DATE 2007: 1391-1396
2006
[c11]
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  dblp key:
  - conf/isqed/ChenC06
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  - https://dblp.org/rec/conf/isqed/ChenC06
Min Chen, Yu Cao:
Analysis of Pulse Signaling for Low-Power On-Chip Global Bus Design. ISQED 2006: 401-406

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