Ya-Ping Wu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hao-I Yang

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Publications

2012
[j2]
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Chien-Yu Lu, Ming-Hsien Tu, Hao-I Yang, Ya-Ping Wu, Huan-Shun Huang, Yuh-Jiun Lin, Kuen-Di Lee, Yung-Shin Kao, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang:
A 0.33-V, 500-kHz, 3.94-µW 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 863-867 (2012)
[c5]
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  dblp key:
  - conf/iscas/YangLHLCCCHJLLLSWLH12
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Hao-I Yang, Yi-Wei Lin, Mao-Chih Hsia, Geng-Cing Lin, Chi-Shin Chang, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
High-performance 0.6V VMIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder. ISCAS 2012: 1831-1834
[c4]
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  - conf/socc/LinYHLCCHLLSWLH12
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Yung-Wei Lin, Hao-I Yang, Mao-Chih Hsia, Yi-Wei Lin, Chien-Hen Chen, Ching-Te Chuang, Wei Hwang, Nan-Chun Lien, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist. SoCC 2012: 218-223
2011
[c3]
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  - conf/socc/YangYHLLCCLCCHJLLLSWLH11
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Hao-I Yang, Shih-Chi Yang, Mao-Chih Hsia, Yung-Wei Lin, Yi-Wei Lin, Chien-Hen Chen, Chi-Shin Chang, Geng-Cing Lin, Yin-Nien Chen, Ching-Te Chuang, Wei Hwang, Shyh-Jye Jou, Nan-Chun Lien, Hung-Yu Li, Kuen-Di Lee, Wei-Chiang Shih, Ya-Ping Wu, Wen-Ta Lee, Chih-Chiang Hsu:
A high-performance low VMIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control. SoCC 2011: 197-200

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