Junlin Lu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Dong Tong 0001

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Publications

2017
[c8]
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Yangguo Liu, Junlin Lu, Dong Tong, Xu Cheng:
A Staged Memory Resource Management Method for CMP systems. ASAP 2017: 91-98
[c7]
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Yangguo Liu, Junlin Lu, Dong Tong, Xu Cheng:
Locality-aware bank partitioning for shared DRAM MPSoCs. ASP-DAC 2017: 770-775
2012
[j2]
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Zhen-Hao Zhang, Xiaoyin Wang, Dong Tong, Jiangfang Yi, Junlin Lu, Keyi Wang:
Active Store Window: Enabling Far Store-Load Forwarding with Scalability and Complexity-Efficiency. J. Comput. Sci. Technol. 27(4): 769-780 (2012)
[c4]
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  - conf/IEEEpact/LiTXLC12
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Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng:
Optimal bypass monitor for high performance last-level caches. PACT 2012: 315-324
[c3]
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Xianglei Dang, Xiaoyin Wang, Dong Tong, Junlin Lu, Jiangfang Yi, Keyi Wang:
S/DC: A storage and energy efficient data prefetcher. DATE 2012: 461-466
[c2]
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  - conf/iccd/LiTXLC12
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Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng:
Improving inclusive cache performance with two-level eviction priority. ICCD 2012: 387-392
2010
[j1]
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  - journals/jcst/ChengWLYTGLLYF10
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Xu Cheng, Xiaoyin Wang, Junlin Lu, Jiangfang Yi, Dong Tong, Xuetao Guan, Feng Liu, Xianhua Liu, Chun Yang, Yi Feng:
Research Progress of UniCore CPUs and PKUnity SoCs. J. Comput. Sci. Technol. 25(2): 200-213 (2010)
[c1]
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  - conf/fpga/HuangLPZLTC10
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Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong, Xu Cheng:
FPGA prototyping of an amba-based windows-compatible SoC. FPGA 2010: 13-22

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