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ORCIDAmit Agarwal 0001
- > Home > Persons > Amit Agarwal 0001
Publications
- 2021
[j22]Phil C. Knag
, Gregory K. Chen, Huseyin Ekin Sumbul, Raghavan Kumar, Steven K. Hsu, Amit Agarwal, Monodeep Kar, Seongjong Kim, Mark A. Anders, Himanshu Kaul, Ram K. Krishnamurthy:
A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS. IEEE J. Solid State Circuits 56(4): 1082-1092 (2021)- 2020
- [j20]Raghavan Kumar, Vikram B. Suresh, Monodeep Kar, Sudhir Satpathy, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory K. Chen, Ram K. Krishnamurthy, Vivek De, Sanu K. Mathew:
A 4900- $\mu$ m2 839-Mb/s Side-Channel Attack- Resistant AES-128 in 14-nm CMOS With Heterogeneous Sboxes, Linear Masked MixColumns, and Dual-Rail Key Addition. IEEE J. Solid State Circuits 55(4): 945-955 (2020) - [c59]Amit Agarwal, Steven Hsu, Simeon Realov, Mark A. Anders, Gregory K. Chen, Monodeep Kar, Raghavan Kumar, Huseyin Sumbul, Phil C. Knag, Himanshu Kaul, Sanu Mathew, Mahesh Kumashikar, Ram Krishnamurthy, Vivek De:
25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS. ISSCC 2020: 392-394 - [c58]Mark A. Anders, Himanshu Kaul, Seongjong Kim, Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil C. Knag, Monodeep Kar, Steven K. Hsu, Amit Agarwal, Vikram B. Suresh, Sanu K. Mathew, Ram K. Krishnamurthy, Vivek De:
25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range. ISSCC 2020: 396-398 - [c57]Steven Hsu, Amit Agarwal, Simeon Realov, Mark A. Anders, Gregory K. Chen, Monodeep Kar, Raghavan Kumar, Huseyin Sumbul, Phil C. Knag, Himanshu Kaul, Vikram B. Suresh, Sanu Mathew, Iqbal Rajwani, Satish Damaraju, Ram Krishnamurthy, Vivek De:
Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOS. VLSI Circuits 2020: 1-2 - [c56]Monodeep Kar, Amit Agarwal, Steven Hsu, David Moloney, Gregory K. Chen, Raghavan Kumar, Huseyin Sumbul, Phil C. Knag, Mark A. Anders, Himanshu Kaul, Jonathan Byrne, Luca Sarti, Ram Krishnamurthy, Vivek De:
A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications. VLSI Circuits 2020: 1-2 - [c55]Phil C. Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Raghavan Kumar, Mark A. Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal, Monodeep Kar, Seongjong Kim, Ram K. Krishnamurthy:
A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS. VLSI Circuits 2020: 1-2 - 2019
- [c54]Amit Agarwal, Steven Hsu, Monodeep Kar, Mark A. Anders, Himanshu Kaul, Raghavan Kumar, Vikram B. Suresh, Sanu Mathew, Ram Krishnamurthy, Vivek De:
A 54% Power-Saving Static Fully-Interruptible Single-Phase-Clocked Shared-Keeper Flip-Flop in 14nm CMOS. A-SSCC 2019: 137-140 - [c50]Steven Hsu, Amit Agarwal, Monodeep Kar, Mark A. Anders, Himanshu Kaul, Raghavan Kumar, Sudhir Satpathy, Vikram B. Suresh, Sanu Mathew, Ram Krishnamurthy, Vivek De:
A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS. VLSI Circuits 2019: 50- - [c49]Raghavan Kumar, Vikram B. Suresh, Monodeep Kar, Sudhir Satpathy, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory K. Chen, Ram Krishnamurthy, Vivek De, Sanu Mathew:
A 4900×m2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition. VLSI Circuits 2019: 234-
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