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Alper Buyuktosunoglu
- > Home > Persons > Alper Buyuktosunoglu
Publications
- 2023
- [c80]Karthik Swaminathan, Ramon Bertran, Doug Balazich, Alper Buyuktosunoglu, Arvind Haran, Sean M. Carey, Karl Anderson, Hans M. Jacobson, Matthias Pflanz, Pradip Bose:
Characterization and Exploration of Latch Checkers for Efficient RAS Protection. DSN-S 2023: 63-69 - 2021
- [c74]Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose:
Energy Efficiency Boost in the AI-Infused POWER10 Processor. ISCA 2021: 29-42 - 2017
- [c54]Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler:
Very Low Voltage (VLV) Design. ICCD 2017: 601-604 - 2014
- [c39]Hans M. Jacobson, Arun Joseph, Dharmesh Parikh, Pradip Bose, Alper Buyuktosunoglu:
Empirically derived abstractions in uncore power modeling for a server-class processor chip. ISLPED 2014: 147-152 - 2013
- [j15]Ramon Bertran, Yutaka Sugawara, Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose:
Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems. IBM J. Res. Dev. 57(1/2): 4 (2013) - 2012
- [c33]Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger:
Power management of multi-core chips: Challenges and pitfalls. DATE 2012: 977-982 - 2011
- [c28]Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer:
Abstraction and microarchitecture scaling in early-stage power modeling. HPCA 2011: 394-405 - 2010
- [c26]Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban:
Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI 2010: 299-304 - 2005
- [c12]Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler:
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. HPCA 2005: 238-242 - 2004
- [c10]Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose:
Microarchitectural techniques for power gating of execution units. ISLPED 2004: 32-37 - 2002
- [c5]Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas:
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17 - 2000
- [j1]David M. Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook:
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro 20(6): 26-44 (2000)
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