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Andreas L. Symeonidis

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Loukas Petrou

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Publications

2022
[j44]
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  - journals/jirs/FilotheouTTDSSP22
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  - https://dblp.org/rec/journals/jirs/FilotheouTTDSSP22
Alexandros Filotheou, Anastasios Tzitzis, Emmanouil G. Tsardoulias, Antonis G. Dimitriou, Andreas L. Symeonidis, George Sergiadis, Loukas Petrou:
Passive Global Localisation of Mobile Robot via 2D Fourier-Mellin Invariant Matching. J. Intell. Robotic Syst. 104(2): 26 (2022)
2020
[j36]
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Alexandros Filotheou, Emmanouil G. Tsardoulias, Antonis G. Dimitriou, Andreas L. Symeonidis, Loukas Petrou:
Quantitative and Qualitative Evaluation of ROS-Enabled Local and Global Planners in 2D Static Environments. J. Intell. Robotic Syst. 98(3): 567-601 (2020)
[j35]
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Emmanouil G. Tsardoulias, Marios Protopapas, Andreas L. Symeonidis, Loukas Petrou:
A Comparative Analysis of Pattern Matching Techniques Towards OGM Evaluation. J. Intell. Robotic Syst. 98(3): 733-758 (2020)
[j34]
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  - journals/jirs/FilotheouTDSP20a
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Alexandros Filotheou, Emmanouil G. Tsardoulias, Antonis G. Dimitriou, Andreas L. Symeonidis, Loukas Petrou:
Pose Selection and Feedback Methods in Tandem Combinations of Particle Filters with Scan-Matching for 2D Mobile Robot Localisation. J. Intell. Robotic Syst. 100(3): 925-944 (2020)
2018
[c52]
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  - conf/mocast/MousouliotisPTP18
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Panagiotis G. Mousouliotis, Konstantinos L. Panayiotou, Emmanouil G. Tsardoulias, Loukas P. Petrou, Andreas L. Symeonidis:
Expanding a robot's life: Low power object recognition via FPGA-based DCNN deployment. MOCAST 2018: 1-4
[i4]
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  - electronic edition @ arxiv.org (open access)
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  - journals/corr/abs-1804-00512
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Panagiotis G. Mousouliotis, Konstantinos L. Panayiotou, Emmanouil G. Tsardoulias, Loukas P. Petrou, Andreas L. Symeonidis:
Expanding a robot's life: Low power object recognition via FPGA-based DCNN deployment. CoRR abs/1804.00512 (2018)

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