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Yasuhiro Sugimoto
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Publications
- 2007
- [j8]Hiroki Sakurai, Yasuhiro Sugimoto:
The Realization of an Area-Efficient CMOS Bandgap Reference Circuit with Less than 1.25 V of Output Voltage Using a Fractional VBE Amplification Scheme. IEICE Trans. Electron. 90-C(2): 499-506 (2007) - [j6]Hiroki Sakurai, Shigeto Tanaka, Yasuhiro Sugimoto:
A Digitally Assisted Gain and Offset Error Cancellation Technique for a CMOS Pipelined ADC with a 1.5-bit Bit-Block Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(10): 2272-2279 (2007) - [c8]Kiyokazu Umimura, Hiroki Sakurai, Yasuhiro Sugimoto:
A CMOS Current-mode DC-DC converter with input and output voltage-independent stability and frequency characteristics utilizing a quadratic slope compensation scheme. ESSCIRC 2007: 178-181 - 2006
- [j5]Yasuhiro Sugimoto, Yuji Gohda, Shigeto Tanaka:
A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications. IEICE Trans. Electron. 89-C(6): 811-813 (2006) - 2005
- [j4]Hiroki Sakurai, Yasuhiro Sugimoto:
Analysis and Design of a Current-Mode PWM Buck Converter Adopting the Output-Voltage Independent Second-Order Slope Compensation Scheme. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(2): 490-497 (2005) - [c6]Shigeto Tanaka, Yuji Gohda, Yasuhiro Sugimoto:
The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC. ISCAS (6) 2005: 6194-6197
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