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2010 – 2019
- 2019
[j80]Gurgen Harutyunyan
, Samvel K. Shoukourian, Yervant Zorian:
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism. IEEE Trans. on CAD of Integrated Circuits and Systems 38(3): 562-575 (2019)- [c156]S. Bandyopadhyay, J. Mekkoth, M. Hutner, H. Grigoryan, A. Kumar S. Shoukourian, G. Tshagharyan, Yervant Zorian, G. Boschi, D. Lazzarotti, D. Luongo, H. Shaheen, Gurgen Harutyunyan:
Innovative Practices on In-System Test and Reliability of Memories. VTS 2019: 1 - 2018
- [j79]Hans-Joachim Wunderlich, Yervant Zorian:
Guest Editor's Introduction. IEEE Design & Test 35(3): 5-6 (2018) - [j78]Yervant Zorian:
The 10th China Test Conference. IEEE Design & Test 35(6): 96-97 (2018) - [c155]H. Grigoryan, Samvel K. Shoukourian, Gurgen Harutyunyan, Yervant Zorian, Costas Argyrides:
Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs. ITC 2018: 1-6 - [c154]T. Kogan, Y. Abotbol, G. Boschi, Gurgen Harutyunyan, N. Martirosyan, Yervant Zorian:
Advanced Uniformed Test Approach For Automotive SoCs. ITC 2018: 1-10 - [c153]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, G. Tshagharyan, H. Grigoryan, Gurgen Harutyunyan, Yervant Zorian:
Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM. ITC 2018: 1-10 - [c152]G. Tshagharyan, Gurgen Harutyunyan, Yervant Zorian, Anteneh Gebregiorgis, Mohammad Saber Golanbari, Rajendra Bishnoi, Mehdi Baradaran Tahoori:
Modeling and Testing of Aging Faults in FinFET Memories for Automotive Applications. ITC 2018: 1-10 - [c151]Art Schaldenbrand, Yervant Zorian, Stephen Sunter, Peter Sarson:
IP session on ISO26262 EDA. VTS 2018: 1 - 2017
- [j77]Erik Jan Marinissen, Yervant Zorian:
Guest Editors' Introduction: Design & Test of a High-Volume 3-D Stacked Graphics Processor With High-Bandwidth Memory. IEEE Design & Test 34(1): 6-7 (2017) - [c150]S. Martirosyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
An efficient testing methodology for embedded flash memories. EWDTS 2017: 1-4 - [c149]D. Sargsyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
Automated flow for test pattern creation for IPs in SoC. EWDTS 2017: 1-4 - [c148]G. Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
Experimental study on Hamming and Hsiao codes in the context of embedded applications. EWDTS 2017: 1-4 - [c147]Christophe Eychenne, Yervant Zorian:
An effective functional safety infrastructure for system-on-chips. IOLTS 2017: 63-66 - [c146]H. Shaheen, G. Boschi, Gurgen Harutyunyan, Yervant Zorian:
Advanced ECC solution for automotive SoCs. IOLTS 2017: 71-73 - [c145]T. Kogan, Y. Abotbol, G. Boschi, Gurgen Harutyunyan, I. Kroul, H. Shaheen, Yervant Zorian:
Advanced functional safety mechanisms for embedded memories and IPs in automotive SoCs. ITC 2017: 1-6 - [c144]G. Tshagharyan, Gurgen Harutyunyan, Yervant Zorian:
An effective functional safety solution for automotive systems-on-chip. ITC 2017: 1-10 - [c143]Yervant Zorian:
Tutorial I: Topic: Automotive test strategies. ITC-Asia 2017: ix-xi - [c142]Yervant Zorian:
Keynotes: Robustness challenges in the internet of things. VLSI-SoC 2017: 1-5 - 2016
- [c141]Erik Jan Marinissen, Yervant Zorian, Mario Konijnenburg, Chih-Tsun Huang, Ping-Hsuan Hsieh, Peter Cockburn, Jeroen Delvaux, Vladimir Rozic, Bohan Yang, Dave Singelée, Ingrid Verbauwhede, Cedric Mayor, Robert Van Rijsinge, Cocoy Reyes:
IoT: Source of test challenges. ETS 2016: 1-10 - [c140]G. Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
Securing test infrastructure of system-on-chips. EWDTS 2016: 1-4 - [c139]Mohamed Abid, Yervant Zorian:
Welcome to the IDT 2016. IDT 2016: x - 2015
- [c138]L. Martirosyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
A power based memory BIST grouping methodology. EWDTS 2015: 1-4 - [c137]Vrezh Sargsyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Avetik Yessayan:
An efficient approach for memory repair by reducing the number of spares. EWDTS 2015: 1-4 - [c136]G. Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian:
Overview study on fault modeling and test methodology development for FinFET-based memories. EWDTS 2015: 1-4 - [c135]Yervant Zorian:
Keynote 3: "Ensuring robustness in today's IoT era". IDT 2015: 1 - [c134]Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian:
The future of fault tolerant computing. IOLTS 2015: 108-109 - [c133]Gurgen Harutunyan, Yervant Zorian:
An effective embedded test & diagnosis solution for external memories. IOLTS 2015: 168-170 - [c132]Víctor H. Champac, Yervant Zorian, Letícia Maria Bolzani Pöhls, Vishwani D. Agrawal:
Message from the LATS2015 Chairs. LATS 2015: 1 - [c131]Gurgen Harutyunyan, G. Tshagharyan, Yervant Zorian:
Impact of parameter variations on FinFET faults. VTS 2015: 1-4 - [e3]Nelson Baloian, Yervant Zorian, Perouz Taslakian, Samvel K. Shoukourian:
Collaboration and Technology - 21st International Conference, CRIWG 2015, Yerevan, Armenia, September 22-25, 2015, Proceedings. Lecture Notes in Computer Science 9334, Springer 2015, ISBN 978-3-319-22746-7 [contents] - 2014
- [j76]Yervant Zorian, Soha Hassoun:
Guest Editors' Introduction: Highlights of the 50th DAC. IEEE Design & Test 31(2): 6-8 (2014) - [c130]Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
Extending fault periodicity table for testing faults in memories under 20nm. EWDTS 2014: 1-4 - [c129]Yervant Zorian:
Design, test & repair methodology for FinFET-based memories. ITC 2014: 1 - [c128]Gurgen Harutyunyan, G. Tshagharyan, Valery A. Vardanian, Yervant Zorian:
Fault modeling and test algorithm creation strategy for FinFET-based memories. VTS 2014: 1-6 - [c127]Alodeep Sanyal, Yanjing Li, Yervant Zorian:
Special session 12C: Young professionals in test - Town meeting. VTS 2014: 1 - 2013
- [c126]K. Amirkhanyan, A. Davtyan, Gurgen Harutyunyan, T. Melkumyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
Application of defect injection flow for fault validation in memories. EWDTS 2013: 1-4 - [c125]Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
Impact of process variations on read failures in SRAMs. EWDTS 2013: 1-4 - [c124]T. Melkumyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
An efficient fault diagnosis and localization algorithm for Successive-Approximation Analog to Digital Converters. EWDTS 2013: 1-4 - [c123]W. Prates, Letícia Maria Veiras Bolzani, Gurgen Harutyunyan, A. Davtyan, Fabian Vargas, Yervant Zorian:
Integrating embedded test infrastructure in SRAM cores to detect aging. IOLTS 2013: 25-30 - [c122]Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
An effective solution for building memory BIST infrastructure based on fault periodicity. VTS 2013: 1-6 - [c121]Alodeep Sanyal, Yervant Zorian:
Special session 12C: Town-hall meeting "young professionals in test". VTS 2013: 1 - 2012
- [j75]P. Glenn Gulak, Rajesh Gupta, Gianluca Setti, Yervant Zorian:
Message From the Steering Committee. IEEE Design & Test of Computers 29(1): 5 (2012) - [j74]Erik Jan Marinissen, Yervant Zorian:
Guest Editorial: Special Issue on Testing of 3D Stacked Integrated Circuits. J. Electronic Testing 28(1): 13-14 (2012) - [j73]Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
A New Method for March Test Algorithm Generation and Its Application for Fault Detection in RAMs. IEEE Trans. on CAD of Integrated Circuits and Systems 31(6): 941-949 (2012) - [c120]Yervant Zorian:
Addressing Test Challenges in Advanced Technology Nodes. Asian Test Symposium 2012: 6 - [c119]Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep Kulkarni, Vivek De, Dimiter Avresky:
Design for test and reliability in ultimate CMOS. DATE 2012: 677-682 - 2011
- [j72]Gurgen Harutunyan, Aram Hakhumyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
Symmetry Measure for Memory Test and Its Application in BIST Optimization. J. Electronic Testing 27(6): 753-766 (2011) - [j71]Víctor H. Champac, Fernanda Gusmão de Lima Kastensmidt, Letícia Maria Veiras Bolzani Poehls, Fabian Vargas, Yervant Zorian:
12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011. J. Low Power Electronics 7(4): 529-530 (2011) - [c118]K. Darbinyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
A Robust Solution for Embedded Memory Test and Repair. Asian Test Symposium 2011: 461-462 - [c117]H. Grigoryan, Gurgen Harutunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
Generic BIST architecture for testing of content addressable memories. IOLTS 2011: 86-91 - [e2]Vladimir Hahanov, Yervant Zorian:
9th East-West Design & Test Symposium, EWDTS 2011, Sevastopol, Ukraine, September 9-12, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-1957-8 [contents] - 2010
- [c116]H. Avetisyan, Gurgen Harutyunyan, Valery A. Vardanian, Yervant Zorian:
An efficient March test for detection of all two-operation dynamic faults from subclass Sav. EWDTS 2010: 310-313 - [c115]Yervant Zorian:
Test and reliability concerns for 3D-ICs. IOLTS 2010: 219 - [e1]Yervant Zorian, Imtinan Elahi, André Ivanov, Ashraf Salem:
5th International Design and Test Workshop, IDT 2010, Abu Dhabi, UAE, 14-15 December 2010. IEEE 2010, ISBN 978-1-61284-291-2 [contents]
2000 – 2009
- 2009
- [j70]Erik Jan Marinissen, Yervant Zorian:
Guest Editors' Introduction: The Status of IEEE Std 1500. IEEE Design & Test of Computers 26(1): 6-7 (2009) - [j69]Erik Jan Marinissen, Yervant Zorian:
IEEE Std 1500 Enables Modular SoC Testing. IEEE Design & Test of Computers 26(1): 8-17 (2009) - [j68]Yervant Zorian:
Guest Editor's Introduction: Examples of Management Decision Criteria. IEEE Design & Test of Computers 26(2): 6-7 (2009) - [j67]Erik Jan Marinissen, Yervant Zorian:
Guest Editors' Introduction: The Status of IEEE Std 1500 - Part 2. IEEE Design & Test of Computers 26(3): 4 (2009) - [c114]Mark Redford, Joseph Sawicki, Prasad Subramaniam, Cliff Hou, Yervant Zorian, Kimon Michaels:
DFM: don't care or competitive weapon? DAC 2009: 296-297 - [c113]Yervant Zorian:
Panel Session - Vertical integration versus disaggregation. DATE 2009: 602 - [c112]Erik Jan Marinissen, Yervant Zorian:
Testing 3D chips containing through-silicon vias. ITC 2009: 1-11 - 2008
- [j66]Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian:
IEEE Standard 1500 Compliance Verification for Embedded Cores. IEEE Trans. VLSI Syst. 16(4): 397-407 (2008) - [c111]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
An Efficient March-Based Three-Phase Fault Location and Full Diagnosis Algorithm for Realistic Two-Operation Dynamic Faults in Random Access Memories. VTS 2008: 95-100 - 2007
- [j65]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March Tests for Detection of Dynamic Faults in Random Access Memories. J. Electronic Testing 23(1): 55-74 (2007) - [c110]Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian:
Making Manufacturing Work For You. DAC 2007: 107-108 - [c109]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
A March-based Fault Location Algorithm with Partial and Full Diagnosis for All Simple Static Faults in Random Access Memories. DDECS 2007: 145-148 - 2006
- [j64]Bruce C. Kim, Yervant Zorian:
Guest Editors' Introduction: Big Innovations in Small Packages. IEEE Design & Test of Computers 23(3): 186-187 (2006) - [c108]Ron Wilson, Yervant Zorian:
Decision-making for complex SoCs in consumer electronic products. DAC 2006: 173 - [c107]Nic Mokhoff, Yervant Zorian:
Tradeoffs and choices for emerging SoCs in high-end applications. DAC 2006: 273 - [c106]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March-Based Fault Location Algorithm with Partial Diagnosis for all Static Faults in Random Access Memories. DDECS 2006: 262-267 - [c105]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March Tests for Dynamic Faults in Random Access Memories. European Test Symposium 2006: 43-48 - [c104]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories. VTS 2006: 120-127 - [c103]Yervant Zorian, Dennis Wassung:
Session Abstract. VTS 2006: 154-155 - [c102]Yervant Zorian, Bruce C. Kim:
Session Abstract. VTS 2006: 334-335 - 2005
- [j63]Yervant Zorian:
Nanoscale Design & Test Challenges. IEEE Computer 38(2): 36-39 (2005) - [j62]Juan Antonio Carballo, Yervant Zorian, Raul Camposano, Andrzej J. Strojwas, John Kibarian, Dennis Wassung, Alex Alexanian, Steve Wigley, Neil Kelly:
Guest Editors' Introduction: DFM Drives Changes in Design Flow. IEEE Design & Test of Computers 22(3): 200-205 (2005) - [c101]Yervant Zorian, Juan Antonio Carballo:
T1: Design for Manufacturability. Asian Test Symposium 2005 - [c100]Dennis Wassung, Yervant Zorian, Magdy S. Abadir, Mark Bapst, Colin Harris:
Choosing flows and methodologies for SoC design. DAC 2005: 167 - [c99]Nic Mokhoff, Yervant Zorian, Kamalesh N. Ruparel, Hao Nham, Francesco Pessolano, Kee Sup Kim:
How to determine the necessity for emerging solutions. DAC 2005: 274-275 - [c98]Yervant Zorian, Bill Frerichs, Dennis Wassung, Jim Ensel, Guri Stark, Mike Gianfagna, Kamalesh N. Ruparel:
Semiconductor Industry Disaggregation vs Reaggregation: Who Will be the Shark? DATE 2005: 572 - [c97]Erik Jan Marinissen, Betty Prince, Doris Keitel-Schulz, Yervant Zorian:
Challenges in Embedded Memory Design and Test. DATE 2005: 722-727 - [c96]Yervant Zorian, Valery A. Vardanian, K. Aleksanyan, K. Amirkhanyan:
Impact of Soft Error Challenge on SoC Design. IOLTS 2005: 63-68 - [c95]Régis Leveugle, Yervant Zorian, Luca Breveglieri, André K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert:
On-Line Testing for Secure Implementations: Design and Validation. IOLTS 2005: 211 - [c94]Yervant Zorian:
Today's SOC test challenges. ITC 2005: 2 - [c93]Yervant Zorian, Avetik Yessayan:
IEEE 1500 utilization in SOC design and test. ITC 2005: 10 - [c92]Yervant Zorian:
Optimizing SoC Manufacturability. VLSI Design 2005: 37-38 - [c91]Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
Minimal March Tests for Unlinked Static Faults in Random Access Memories. VTS 2005: 53-59 - [c90]Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian:
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. VTS 2005: 66-71 - 2004
- [j61]Don Edenfeld, Andrew B. Kahng, Mike Rodgers, Yervant Zorian:
2003 Technology Roadmap for Semiconductors. IEEE Computer 37(1): 47-56 (2004) - [j60]Yervant Zorian, Dimitris Gizopoulos, Cary Vandenberg, Philippe Magarshack:
Guest Editors' Introduction: Design for Yield and Reliability. IEEE Design & Test of Computers 21(3): 177-182 (2004) - [j59]Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
SoC Yield Optimization via an Embedded-Memory Test and Repair Infrastructure. IEEE Design & Test of Computers 21(3): 200-207 (2004) - [j58]Debesh K. Das, Hideo Fujiwara, Yungang Li, Yinghua Min, Shiyi Xu, Yervant Zorian:
Design & Test Education in Asia. IEEE Design & Test of Computers 21(4): 331-338 (2004) - [j57]Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian:
Distributed Diagnosis of Interconnections in SoC and MCM Designs. J. Electronic Testing 20(3): 291-307 (2004) - [j56]Irith Pomeranz, Yervant Zorian:
Fault isolation for nonisolated blocks. IEEE Trans. VLSI Syst. 12(12): 1385-1388 (2004) - [c89]Yervant Zorian:
Investment vs. Yield Relationship for Memories in SOC. ITC 2004: 1444 - [c88]N. Derhacobian, Valery A. Vardanian, Yervant Zorian:
Embedded Memory Reliability: The SER Challenge. MTDT 2004: 104-110 - [c87]Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian:
Reducing Embedded SRAM Test Time under Redundancy Constraints. VTS 2004: 237-242 - [c86]Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian:
A Methodology for Design and Evaluation of Redundancy Allocation Algorithms. VTS 2004: 249-260 - 2003
- [j55]Yervant Zorian:
Guest Editor's Introduction: Advances in Infrastructure IP. IEEE Design & Test of Computers 20(3): 49- (2003) - [j54]Yervant Zorian, Samvel K. Shoukourian:
Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield. IEEE Design & Test of Computers 20(3): 58-66 (2003) - [j53]Yervant Zorian:
IEEE CASS becomes D&T Copublisher. IEEE Design & Test of Computers 20(3): 108- (2003) - [j52]Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian:
A Hierarchical Infrastructure for SoC Test Management. IEEE Design & Test of Computers 20(4): 32-39 (2003) - [j51]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. J. Electronic Testing 19(2): 103-112 (2003) - [j50]Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian:
Easily Testable Cellular Carry Lookahead Adders. J. Electronic Testing 19(3): 285-298 (2003) - [c85]Yervant Zorian:
Leveraging Infrastructure IP for SoC Yield. Asian Test Symposium 2003: 3-5 - [c84]Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian:
Low-Cost Software-Based Self-Testing of RISC Processor Cores. DATE 2003: 10714-10719 - [c83]Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. ITC 2003: 431-440 - [c82]Francisco DaSilva, Yervant Zorian, Lee Whetsel, Karim Arabi, Rohit Kapur:
Overview of the IEEE P1500 Standard. ITC 2003: 988-997 - [c81]Yervant Zorian:
Yield Threats and Inadequacy of One-time Test. ITC 2003: 1284 - [c80]Irith Pomeranz, Sudhakar M. Reddy, Yervant Zorian:
A Test Interface for Built-In Test of Non-Isolated Scanned Cores. VTS 2003: 371-378 - 2002
- [j49]Alan Allan, Don Edenfeld, William H. Joyner Jr., Andrew B. Kahng, Mike Rodgers, Yervant Zorian:
2001 Technology Roadmap for Semiconductors. IEEE Computer 35(1): 42-53 (2002) - [j48]Erik Jan Marinissen, Rohit Kapur, Maurice Lousberg, Teresa L. McLaurin, Mike Ricchetti, Yervant Zorian:
On IEEE P1500's Standard for Embedded Core Test. J. Electronic Testing 18(4-5): 365-383 (2002) - [c79]Yervant Zorian:
Embedding infrastructure IP for SOC yield improvement. DAC 2002: 709-712 - [c78]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Effective Software Self-Test Methodology for Processor Cores. DATE 2002: 592-597 - [c77]Irith Pomeranz, Yervant Zorian:
Fault Isolation Using Tests for Non-Isolated Blocks. DATE 2002: 1123 - [c76]Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian:
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. DELTA 2002: 297-301 - [c75]Valery A. Vardanian, Yervant Zorian:
A March-Based Fault Location Algorithm for Static Random Access Memories. IOLTW 2002: 256-261 - [c74]Yervant Zorian:
Embedded Memory Test and Repair: Infrastructure IP for SOC Yield. ITC 2002: 340-349 - [c73]Valery A. Vardanian, Yervant Zorian:
A March-Based Fault Location Algorithm for Static Random Access Memories. MTDT 2002: 62-67 - [c72]Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian:
Instruction-Based Self-Testing of Processor Cores. VTS 2002: 223-228 - 2001
- [j47]Yervant Zorian:
Huge Storage Capacity. IEEE Design & Test of Computers 18(3): 1- (2001) - [j46]Yervant Zorian:
Error-Free Products. IEEE Design & Test of Computers 18(4): 2- (2001) - [j45]