Jian Wang 0036
Person information
- affiliation: Fudan University, State Key Library of ASIC and System, Shanghai, China
Other persons with the same name
- Jian Wang
- Jian Wang 0001
— Huawei Technologies, Shenzhen, China (and 1 more)
- Jian Wang 0002
— University of Leuven, Department of Managerial Economics, Strategy and Innovation, Belgium (and 1 more)
- Jian Wang 0003
— Jilin University, College of Computer Science and Technology / MoE Key Laboratory of Symbolic Computation and Knowledge Engineering, Changchun, China
- Jian Wang 0004
— Ritsumeikan University, Kusatsu, Japan
- Jian Wang 0005
— Key Laboratory for Urban Geomatics of National Administration of Surveying, Mapping and Geoinformation, Beijing, China (and 1 more)
- Jian Wang 0006
— Chongqing University, State Key Laboratory of Power Transmission Equipment and System Security and New Technology, China
- Jian Wang 0007
— National University of Defense Technology, School of Electronic Science and Engineering, Changsha, China (and 1 more)
- Jian Wang 0008
— Huzhou University, Zhejiang, China
- Jian Wang 0009
— University of Erlangen-Nuremberg, Pattern Recognition Lab, Erlangen, Germany
- Jian Wang 0010
— University of Petroleum, College of Science, Qingdao, China (and 2 more)
- Jian Wang 0011 — National University of Defense Technology, Institute of Automation, Changsha, China
- Jian Wang 0012 — Xi'an Air Force Military Representative Office, China
- Jian Wang 0013
— Jiangsu University, School of Electrical and Information Engineering, Zhenjiang, China
- Jian Wang 0014
— PLA University of Science and Technology, College of Communications Engineering, Nanjing, China
- Jian Wang 0015
— Beijing Jiaotong University, School of Computer and Information Technology, Beijing, China (and 1 more)
- Jian Wang 0016
— Fudan University, School of Data Science, Shanghai, China (and 5 more)
- Jian Wang 0017
— Nanjing Institute of Technology, School of Automation, China (and 2 more)
- Jian Wang 0018
— Wuhan University, School of Computer Science, State Key Laboratory of Software Engineering, China
- Jian Wang 0019
— Shenyang Pharmaceutical University, Key Laboratory of Structure-Based Drug Design & Discovery, China
- Jian Wang 0020
— National University of Defense Technology, College of Electronic Science and Engineering, Changsha, China
- Jian Wang 0021 — Dalian University of Technology, College of Computer Science and Technology, China
- Jian Wang 0022 — Beijing Engineering Research Center of EMC and GNSS Technology for Rail Transportation, China (and 1 more)
- Jian Wang 0023 — Beijing University of Posts and Telecommunications, School of Information and Communication Engineering, China
- Jian Wang 0024
— University of Electronic Science and Technology of China, Chengdu, China
- Jian Wang 0025 — Nanjing University, School of Electronic Science and Engineering, China
- Jian Wang 0026 — Hangzhou Dianzi University, Management School, China
- Jian Wang 0027 — Hangzhou Dianzi University, School of Automation, China
- Jian Wang 0028 — Shanghai Second Polytechnic University, Department of Network Engineering, School of Computer and Information Engineering, China
- Jian Wang 0029 — Chinese Academy of Sciences, Institute of Automation, High-tech Innovation Center, Beijing, China
- Jian Wang 0030
— Tsinghua University, Department of Electronic Engineering, Beijing, China
- Jian Wang 0031
— Southeast University, MOE Key Laboratory of Micro-Inertial Instrument and Advanced Navigation Technology, Nanjing, China
- Jian Wang 0032 — Chinese Academy of Sciences, Cold and Arid Region Environmental and Engineering Research Institute, Lanzhou, China
- Jian Wang 0033
— Chinese Academy of Agricultural Sciences, Agricultural Information Institute, Beijing, China
- Jian Wang 0034
— Beihang University, School of Transportation Science and Engineering, Beijing Advanced Innovation Center for Big Data and Brain Computing, China
- Jian Wang 0035 — Linköping University, Sweden
- Jian Wang 0037 — Chinese Academy of Sciences, Institute of Policy and Management, Beijing, China
- Jian Wang 0038
— Nanjing University of Aeronautics and Astronautics, College of Computer Science and Technology, China (and 2 more)
- Jian Wang 0039
— Harbin University of Science and Technology, School of Computer Science and Technology, China
- Jian Wang 0040
— Southwest Jiaotong University, School of Civil Engineering / MOE Key Laboratory of High-speed Railway Engineering, Chengdu, China
- Jian Wang 0041
— Chongqing University, State Key Laboratory of Power Transmission Equipment and System Security and New Technology, China
- Jian Wang 0042
— Chinese Academy of Sciences, Institute of Software, State Key Laboratory of Computer Science, Beijing, China
- Jian Wang 0043
— Beihang University, School of Automation Science and Electrical Engineering, Beijing, China
- Jian Wang 0044
— National Institute of Metrology, Division of Mechanics and Acoustics, Beijing, China
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2010 – today
- 2019
- [c19]Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Jian Wang, Jinmei Lai:
Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits. FPGA 2019: 121 - [c18]Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Chengyu Hu, Jian Wang, Jinmei Lai:
An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization. ACM Great Lakes Symposium on VLSI 2019: 93-98 - [c17]Chengyu Hu, Qinghua Duan, Liran Hu, Peng Lu, Zhengjie Li, Meng Yang, Jian Wang, Jinmei Lai:
An Analytical-based Hybrid Algorithm for FPGA Placement. ACM Great Lakes Symposium on VLSI 2019: 351-354 - 2018
- [j5]Hanyang Xu, Jian Wang, Jinmei Lai:
Design of a power efficient self-adaptive LVDS driver. IEICE Electronic Express 15(5): 20171276 (2018) - [j4]Chengyu Hu, Peng Lu, Meng Yang, Jian Wang, Jinmei Lai:
A SA-based parallel method for FPGA placement. IEICE Electronic Express 15(24): 20180943 (2018) - 2017
- [c16]Chuanliang Kang, Pei Yang, Jian Wang, Jinmei Lai:
A deep research on the chip verification platform based on network. ASICON 2017: 323-326 - [c15]Jiaqi Gu, Ruoyao Wang, Jian Wang, Jinmei Lai, Qinghua Duan:
Remote embedded simulation system for SW/HW co-design based on dynamic partial reconfiguration. ASICON 2017: 402-405 - [c14]Yuchen Yao, Zhiqian Zhang, Zhen Yang, Jian Wang, Jinmei Lai:
FPGA-based convolution neural network for traffic sign recognition. ASICON 2017: 891-894 - 2016
- [j3]Hanyang Xu, Jian Wang, Jinmei Lai:
Prototyping design of a flexible DSP block with pipeline structure for FPGA. IEICE Electronic Express 13(17): 20160676 (2016) - [j2]Yuanlong Xiao, Jian Wang, Jinmei Lai:
A universal automatic on-chip measurement of FPGA's internal setup and hold times. IEICE Electronic Express 13(23): 20160810 (2016) - [c13]Zhen Yang, Jian Wang, Meng Yang, Jinmei Lai:
Testing FPGA Local Interconnects Based on Repeatable Configuration Modules (Abstract Only). FPGA 2016: 280 - 2015
- [j1]Zhen Yang, Chuanzeng Liang, Jian Wang, Jinmei Lai:
A new automatic method for testing interconnect resources in FPGAs based on general routing matrix. IEICE Electronic Express 12(20): 20150747 (2015) - [c12]Yuanpei Gao, Haijiang Ye, Jian Wang, Jinmei Lai:
FPGA bitstream compression and decompression based on LZ77 algorithm and BMC technique. ASICON 2015: 1-4 - [c11]Yuanlong Xiao, Jian Wang, Jinmei Lai:
A power efficient current-mode differential driver for FPGAs. ASICON 2015: 1-4 - 2014
- [c10]Hanyang Xu, Jian Wang, Meilai Jin:
A FPGA prototype design emphasis on low power technique. FPGA 2014: 147-150 - [c9]Lei Li, Jian Wang, Jinmei Lai:
Novel FPGA clock network with low latency and skew (abstract only). FPGA 2014: 252 - 2013
- [c8]Huagang Li, Jian Wang, Jinmei Lai:
Weight-based FPGA placement algorithm with wire effect considered. ASICON 2013: 1-4 - [c7]Lei Li, Jian Wang, Jinmei Lai:
Improved unified interconnect unit for high speed and scalable FPGA. ASICON 2013: 1-4 - [c6]Xinrui Zhang, Jian Wang, Dan Chen, Jinmei Lai, Lichun Bao, Xueling Liu:
The timing control design of 65nm block RAM in FPGA. ASICON 2013: 1-4 - [c5]Chun Zhu, Qiuli Li, Jian Wang, Jinmei Lai:
A novel multithread routing method for FPGAs (abstract only). FPGA 2013: 269 - [c4]Chun Zhu, Jian Wang, Jinmei Lai:
A novel net-partition-based multithread FPGA routing method. FPL 2013: 1-4 - 2011
- [c3]Lei Li, Jian Wang, Yuan Wang, Jinmei Lai:
Research on design method of scalable Configurable IP Core. AHS 2011: 50-57 - [c2]Xiangzhi Meng, Liguang Chen, Hao Zhou, Jian Wang, Meng Yang, Jinmei Lai:
FPGA interconnect timing library based on the statistical method. ASICON 2011: 393-396 - [c1]Xinrui Zhang, Liguang Chen, Liyun Wang, Jian Wang, Jinmei Lai:
The design and verification of SEU-hardened configurable DFF. ASICON 2011: 937-940
Coauthor Index

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