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ORCIDK. Sridharan 0001
Person information
- affiliation: Indian Institute of Technology Madras, Chennai, India
- affiliation (1996 - 2001): Indian Institute of Technology Guwahati, India
- affiliation (PhD 1995): Rensselaer Polytechnic Institute, Troy, NY USA
Other persons with the same name
- K. Sridharan 0002 — Intel Architecture Lab., Santa Clara, CA, USA (and 1 more)
- K. Sridharan 0003
![[0000-0003-4336-3592]](https://dblp1.uni-trier.de/img/orcid-mark.12x12.png "0000-0003-4336-3592")
— Panimalar Engineering College, Chennai, India - K. Sridharan 0004 (aka: Sridharan Kannan) — Anna University, Chennai, India
- K. Sridharan 0005 — Indian Institute of Information Technology, Design and Manufacturing Kancheepuram, Chennai, India
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2020 – today
- 2024
[j39]Debasrita Kar, Boby George, K. Sridharan:
Design and Implementation of a Magnetic Coupling Based Segmented Bend Angle Sensor for a Soft Robotic Gripper. IEEE Trans. Instrum. Meas. 73: 1-10 (2024)- 2022
- [c13]Debasrita Kar, Boby George, K. Sridharan:
A Bending Angle Sensor Based on Magnetic Coupling Suitable for Soft Robotic Finger. SAS 2022: 1-5 - 2021
- [j38]Yashrajsinh Parmar, K. Sridharan:
A High-Performance VLSI Architecture for a Self-Feedback Convolutional Neural Network. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 456-460 (2021) - 2020
- [j37]Pranjal Vyas, Leena Vachhani, K. Sridharan:
Interval Analysis Technique for Versatile and Parallel Multi-Agent Collision Detection and Avoidance. J. Intell. Robotic Syst. 98(3): 705-720 (2020) - [j36]Yashrajsinh Parmar, K. Sridharan:
A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 370-374 (2020) - [j35]Bhaskar Vundurthy, K. Sridharan:
Protecting an Autonomous Delivery Agent Against a Vision-Guided Adversary: Algorithms and Experimental Results. IEEE Trans. Ind. Informatics 16(9): 5667-5679 (2020)
2010 – 2019
- 2019
- [j34]Bhaskar Vundurthy, K. Sridharan:
Multiagent Gathering With Collision Avoidance and a Minimax Distance Criterion - Efficient Algorithms and Hardware Realization. IEEE Trans. Ind. Informatics 15(2): 699-709 (2019) - [c12]Sharad Kumar Singh, Puduru Viswanadha Reddy, K. Sridharan:
Analysing interactions between a trio of differential drive robots via a differential game formulation. ACC 2019: 4274-4279 - 2018
- [j33]Yashrajsinh Parmar, Krishnamurthy Sridharan:
Precomputation-based radix-4 CORDIC for approximate rotations and Hough transform. IET Circuits Devices Syst. 12(4): 413-423 (2018) - [c11]Bhaskar Vundurthy, K. Sridharan:
Time Optimal Rendezvous for Multi-Agent Systems Amidst Obstacles - Theory and Experiments. IECON 2018: 2645-2650 - [c10]Yashrajsinh Parmar, K. Sridharan:
Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation. IECON 2018: 3770-3775 - 2017
- [j32]Bodapati Srinivasu, K. Sridharan:
Carbon nanotube FET-based low-delay and low-power multi-digit adder designs. IET Circuits Devices Syst. 11(4): 352-364 (2017) - [j31]Vikramkumar Pudi, K. Sridharan, Fabrizio Lombardi:
Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity. IEEE Trans. Computers 66(10): 1824-1830 (2017) - [j30]B. Srinivasu, K. Sridharan:
A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(8): 2146-2159 (2017) - [j29]Bodapati Srinivasu, K. Sridharan:
A Transistor-Level Probabilistic Approach for Reliability Analysis of Arithmetic Circuits With Applications to Emerging Technologies. IEEE Trans. Reliab. 66(2): 440-457 (2017) - 2016
- [j28]Bodapati Srinivasu, K. Sridharan:
Low-Complexity Multiternary Digit Multiplier Design in CNTFET Technology. IEEE Trans. Circuits Syst. II Express Briefs 63-II(8): 753-757 (2016) - [j27]Tahiyah Nou Shene, K. Sridharan, N. Sudha:
Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot. IEEE Trans. Ind. Electron. 63(8): 5012-5021 (2016) - 2015
- [b2]K. Sridharan, Vikram Pudi:
Design of Arithmetic Circuits in Quantum Dot Cellular Automata Nanotechnology. Studies in Computational Intelligence 599, Springer 2015, ISBN 978-3-319-16687-2, pp. 1-99 - [j26]Tahiyah Nou Shene, Vikramkumar Pudi, K. Sridharan, Vineetha Thomas, J. Arthi:
Very large-scale integration architecture for video stabilisation and implementation on a field programmable gate array-based autonomous vehicle. IET Comput. Vis. 9(4): 559-569 (2015) - [j25]Vikramkumar Pudi, K. Sridharan:
A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum-Dot Cellular Automata. IEEE Trans. Very Large Scale Integr. Syst. 23(10): 2352-2356 (2015) - 2014
- [c9]Natarajan Sudha, K. Sridharan, Dan Wilkinson:
A pipelined architecture for motion tracking on a multicore environment. ISIC 2014: 384-387 - 2012
- [j24]Vikram Pudi, K. Sridharan:
New Decomposition Theorems on Majority Logic for Low-Delay Adder Designs in Quantum Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs 59-II(10): 678-682 (2012) - 2011
- [j23]Vikram Pudi, K. Sridharan:
Efficient Design of a Hybrid Adder in Quantum-Dot Cellular Automata. IEEE Trans. Very Large Scale Integr. Syst. 19(9): 1535-1548 (2011) - [c8]B. Sandeep Kumar, Vikram Pudi, K. Sridharan:
Efficient VLSI Architectures for the Hadamard Transform Based on Offset-Binary Coding and ROM Decomposition. ISVLSI 2011: 347-348 - 2010
- [c7]Leena Vachhani, K. Sridharan:
Robotic mapping with simple sensing and processing hardware - Algorithm and architecture. ICARCV 2010: 1012-1017
2000 – 2009
- 2009
- [j22]Leena Vachhani, K. Sridharan, Pramod Kumar Meher:
Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation. IEEE Trans. Circuits Syst. II Express Briefs 56-II(1): 61-65 (2009) - [j21]Pramod Kumar Meher, Javier Valls, Tso-Bing Juang, K. Sridharan, Koushik Maharatna:
50 Years of CORDIC: Algorithms, Architectures, and Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(9): 1893-1907 (2009) - [j20]Leena Vachhani, K. Sridharan, Pramod Kumar Meher:
Efficient FPGA Realization of CORDIC With Application to Robotic Exploration. IEEE Trans. Ind. Electron. 56(12): 4915-4929 (2009) - 2008
- [b1]K. Sridharan, Panakala Rajesh Kumar:
Robotic Exploration and Landmark Determination: Hardware-Efficient Algorithms and FPGA Implementations. Studies in Computational Intelligence 81, Springer 2008, ISBN 978-3-540-75393-3 - [j19]Leena Vachhani, K. Sridharan:
Hardware-Efficient Prediction-Correction-Based Generalized-Voronoi-Diagram Construction and FPGA Implementation. IEEE Trans. Ind. Electron. 55(4): 1558-1569 (2008) - 2007
- [j18]K. Sridharan, T. K. Priya:
A Hardware Accelerator and FPGA Realization for Reduced Visibility Graph Construction Using Efficient Bit Representations. IEEE Trans. Ind. Electron. 54(3): 1800-1804 (2007) - [j17]P. Rajesh Kumar, K. Sridharan:
VLSI-Efficient Scheme and FPGA Realization for Robotic Mapping in a Dynamic Environment. IEEE Trans. Very Large Scale Integr. Syst. 15(1): 118-123 (2007) - 2006
- [j16]T. K. Priya, K. Sridharan:
A parallel algorithm, architecture and FPGA realization for high speed determination of the complete visibility graph for convex objects. Microprocess. Microsystems 30(1): 1-14 (2006) - [j15]T. K. Priya, P. Rajesh Kumar, K. Sridharan:
A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton. Microprocess. Microsystems 30(7): 413-424 (2006) - [j14]P. Rajesh Kumar, K. Sridharan, S. Srinivasan:
A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment. Parallel Comput. 32(3): 205-221 (2006) - 2005
- [j13]Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan:
VLSI-efficient schemes for high-speed construction of tangent graph. Robotics Auton. Syst. 51(4): 248-260 (2005) - [j12]K. Sridharan, T. K. Priya:
The Design of a Hardware Accelerator for Real-Time Complete Visibility Graph Construction and Efficient FPGA Implementation. IEEE Trans. Ind. Electron. 52(4): 1185-1187 (2005) - 2004
- [j11]K. Sridharan, T. K. Priya:
A parallel algorithm for constructing reduced visibility graph and its FPGA implementation. J. Syst. Archit. 50(10): 635-644 (2004) - [j10]K. Sridharan:
A course on web languages and web-based applications. IEEE Trans. Educ. 47(2): 254-260 (2004) - [j9]Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan:
Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction. IEEE Trans. Ind. Electron. 51(6): 1346-1348 (2004) - [j8]Natarajan Sudha, K. Sridharan:
A high-speed VLSI design and ASIC implementation for constructing Euclidean distance-based discrete Voronoi diagram. IEEE Trans. Robotics Autom. 20(2): 352-358 (2004) - [c6]T. K. Priya, K. Sridharan:
An Efficient Algorithm to Construct Reduced Visibility Graph and Its FPGA Implementation. VLSI Design 2004: 1057-1062 - 2002
- [j7]K. Sridharan:
Efficient computation of a measure of depth between convex objects for graphics applications. Comput. Graph. 26(5): 785-793 (2002) - [j6]B. Rajesh Kumar, K. Sridharan, K. Srinivasan:
The design and development of a web-based data acquisition system. IEEE Trans. Instrum. Meas. 51(3): 427-432 (2002) - 2001
- [j5]K. Sridharan, S. Sathiya Keerthi:
Computation of a penetration measure between 3D convex polyhedral objects for collision detection. J. Field Robotics 18(11): 623-631 (2001) - 2000
- [j4]K. Sridharan:
Teaching computer graphics and robotics using symbolic computation software. Comput. Appl. Eng. Educ. 8(1): 18-30 (2000)
1990 – 1999
- 1999
- [j3]K. Sridharan, Harry E. Stephanou:
Fuzzy distances for proximity characterization under uncertainty. Fuzzy Sets Syst. 103(3): 427-434 (1999) - [j2]K. Sridharan:
Computing two penetration measures for curved 2D objects. Inf. Process. Lett. 72(3-4): 143-148 (1999) - [c5]N. Sudha, Sukumar Nandi, K. Sridharan:
A Parallel Algorithm to Construct Voronoi Diagram and Its VLSI Architecture. ICRA 1999: 1683-1688 - 1998
- [c4]K. Sridharan:
Computation of penetration measures for convex polygons and polyhedra for graphics applications. HiPC 1998: 81-87 - 1994
- [j1]K. Sridharan, Harry E. Stephanou, K. C. Craig, S. Sathiya Keerthi:
Distance Measures on Intersecting Objects and Their Applications. Inf. Process. Lett. 51(4): 181-188 (1994) - [c3]K. Sridharan, Harry E. Stephanou:
Algorithms for Rapid Computation of Some Distance Functions Between Objects for Path Planning. ICRA 1994: 967-973 - 1993
- [c2]K. Sridharan, Harry E. Stephanou, S. Sathiya Keerthi:
On Computing a Distance Measure for Path Planning. ICRA (1) 1993: 554-559 - 1992
- [c1]K. Sridharan, Harry E. Stephanou:
Fuzzy Distance Functions for Motion Planning. ICTAI 1992: 186-189
Coauthor Index
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