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Semantic ScholarGunar Schirner
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- affiliation: Northeastern University, Boston, USA
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2010 – today
- 2019
[j18]Nasibeh Teimouri
, Hamed Tabkhi, Gunar Schirner:
Alleviating Scalability Limitation of Accelerator-Based Platforms. IEEE Trans. on CAD of Integrated Circuits and Systems 38(7): 1317-1330 (2019)- [c48]Mo Han, Sezen Yagmur Günay, Ilkay Yildiz, Paolo Bonato, Cagdas D. Onal, Taskin Padir, Gunar Schirner, Deniz Erdogmus:
From hand-perspective visual information to grasp type probabilities: deep learning via ranking labels. PETRA 2019: 256-263 - 2018
- [c47]Jinghan Zhang, Hamed Tabkhi, Gunar Schirner:
DS-DSE: Domain-specific design space exploration for streaming applications. DATE 2018: 165-170 - 2017
- [p2]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
SCE: System-on-Chip Environment. Handbook of Hardware/Software Codesign 2017: 1019-1050 - [e2]Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg:
System Level Design from HW/SW to Memory for Embedded Systems - 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings. IFIP Advances in Information and Communication Technology 523, Springer 2017, ISBN 978-3-319-90022-3 [contents] - 2016
- [j17]Chulian Zhang, Hamed Tabkhi, Gunar Schirner:
Studying Inter-Warp Divergence Aware Execution on GPUs. Computer Architecture Letters 15(2): 117-120 (2016) - [j16]Jie Meng, Eduard Llamosí, Fulya Kaplan, Chulian Zhang, Jiayi Sheng, Martin C. Herbordt, Gunar Schirner, Ayse K. Coskun:
Communication and cooling aware job allocation in data centers for communication-intensive workloads. J. Parallel Distrib. Comput. 96: 181-193 (2016) - [j15]Meenupriya Swaminathan, Ferran Simon Cabrera, Joan Sebastia Pujol, Ufuk Muncuk, Gunar Schirner, Kaushik R. Chowdhury:
Multi-Path Model and Sensitivity Analysis for Galvanic Coupled Intra-Body Communication Through Layered Tissue. IEEE Trans. Biomed. Circuits and Systems 10(2): 339-351 (2016) - [j14]Hamed Tabkhi, Robert Bushey, Gunar Schirner:
Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications. Signal Processing Systems 85(3): 287-306 (2016) - [c46]Shen Feng, Fernando Quivira, Gunar Schirner:
Framework for Rapid Development of Embedded Human-in-the-Loop Cyber-Physical Systems. BIBE 2016: 208-215 - [c45]Nasibeh Teimouri, Hamed Tabkhi, Gunar Schirner:
Improving scalability of CMPs with dense ACCs coverage. DATE 2016: 1610-1615 - [c44]Hamed Tabkhi, Majid Sabbagh, Gunar Schirner:
Guiding Power/Quality Exploration for Communication-Intense Stream Processing. ACM Great Lakes Symposium on VLSI 2016: 141-144 - [c43]Amir Momeni, Hamed Tabkhi, Gunar Schirner, David R. Kaeli:
Hardware thread reordering to boost OpenCL throughput on FPGAs. ICCD 2016: 257-264 - [c42]Shen Feng, Mian Tang, Fernando Quivira, Tim Dyson, Filip Cuckov, Gunar Schirner:
EEGu2: an embedded device for brain/body signal acquisition and processing. RSP 2016: 19-25 - 2015
- [j13]Jiaxing Zhang, Gunar Schirner:
Towards closing the specification gap by integrating algorithm-level and system-level design. Design Autom. for Emb. Sys. 19(4): 389-419 (2015) - [j12]Hamed Tabkhi, Majid Sabbagh, Gunar Schirner:
Power-efficient real-time solution for adaptive vision algorithms. IET Computers & Digital Techniques 9(1): 16-26 (2015) - [j11]Hamed Tabkhi, Robert Bushey, Gunar Schirner:
Conceptual Abstraction Levels (CALs) for managing design complexity of market-oriented MPSoCs. Microprocessors and Microsystems - Embedded Hardware Design 39(8): 704-719 (2015) - [j10]Amir Momeni, Hamed Tabkhi, Yash Ukidave, Gunar Schirner, David R. Kaeli:
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA. SIGARCH Computer Architecture News 43(4): 52-57 (2015) - [j9]Hamed Tabkhi, Gunar Schirner:
A Joint SW/HW Approach for Reducing Register File Vulnerability. TACO 12(2): 9:1-9:28 (2015) - [c41]Hamed Tabkhi, Majid Sabbagh, Gunar Schirner:
An efficient architecture solution for low-power real-time background subtraction. ASAP 2015: 218-225 - [c40]Jiaxing Zhang, Sanyuan Tang, Gunar Schirner:
Reducing Dynamic Dispatch Overhead (DDO) of SLDL-synthesized embedded software. ASP-DAC 2015: 636-643 - [c39]Nasibeh Teimouri, Hamed Tabkhi, Gunar Schirner:
Revisiting accelerator-rich CMPs: challenges and solutions. DAC 2015: 84:1-84:6 - [c38]Amir Momeni, Hamed Tabkhi, Gunar Schirner, David R. Kaeli:
Bridging Architecture and Programming for Throughput-Oriented Vision Processing (Abstract Only). FPGA 2015: 275 - [c37]Ran Hao, Nasibeh Teimouri, Kasra Moazzemi, Gunar Schirner:
Modeling and Analysis of SLDL-Captured NoC Abstractions. IESS 2015: 128-141 - [c36]Majid Sabbagh, Hamed Tabkhi, Gunar Schirner:
Taming the Memory Demand Complexity of Adaptive Vision Algorithms. IESS 2015: 145-158 - [c35]Kasra Moazzemi, Smit Patel, Shen Feng, Gunar Schirner:
Rapid, High-Level Performance Estimation for DSE Using Calibrated Weight Tables. IESS 2015: 197-209 - [c34]Shen Feng, Chris Driscoll, Jerediah Fevold, Hao Jiang, Gunar Schirner:
Rapid heterogeneous prototyping from Simulink. ISQED 2015: 141-146 - [c33]Amir Momeni, Fritz Previlon, Agamemnon Despopoulos, Gunar Schirner, John Kimani, David R. Kaeli:
Engaging sophomores in embedded design using robotics. WCAE 2015: 9:1-9:6 - [c32]Meenupriya Swaminathan, Gunar Schirner, Kaushik R. Chowdhury:
Optimization of energy efficient relay position for galvanic coupled intra-body communication. WCNC 2015: 1725-1730 - [i1]Meenupriya Swaminathan, Ferran Simon Cabrera, Joan Sebastia Pujol, Ufuk Muncuk, Gunar Schirner, Kaushik R. Chowdhury:
Multi-path Model and Sensitivity Analysis for Galvanic Coupled Intra-body Communication through Layered Tissue. CoRR abs/1512.02719 (2015) - 2014
- [j8]Hamed Tabkhi, Robert Bushey, Gunar Schirner:
Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs. Embedded Systems Letters 6(4): 65-68 (2014) - [j7]Yash Ukidave, Amir Kavyan Ziabari, Perhaad Mistry, Gunar Schirner, David R. Kaeli:
Analyzing power efficiency of optimization techniques and algorithm design methods for applications on heterogeneous platforms. IJHPCA 28(3): 319-334 (2014) - [j6]Hamed Tabkhi, Gunar Schirner:
Application-Guided Power Gating Reducing Register File Static Power. IEEE Trans. VLSI Syst. 22(12): 2513-2526 (2014) - [c31]Hamed Tabkhi, Robert Bushey, Gunar Schirner:
Function-Level Processor (FLP): Raising efficiency by operating at function granularity for market-oriented MPSoC. ASAP 2014: 121-130 - [c30]Kaushik R. Chowdhury, Meenupriya Swaminathan, Joan Sebastia Pujol, Gunar Schirner:
Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication. BODYNETS 2014 - [c29]Jiaxing Zhang, Hanjiao Qiu, Salar Shahini Shamsabadi, Ralf Birken, Gunar Schirner:
SIROM3 - A Scalable Intelligent Roaming Multi-modal Multi-sensor Framework. COMPSAC 2014: 446-455 - [c28]Rafael Ubal, Dana Schaa, Perhaad Mistry, Xiang Gong, Yash Ukidave, Zhongliang Chen, Gunar Schirner, David R. Kaeli:
Exploring the Heterogeneous Design Space for both Performance and Reliability. DAC 2014: 181:1-181:6 - [c27]Jiaxing Zhang, Gunar Schirner:
Automatic specification granularity tuning for design space exploration. DATE 2014: 1-6 - [c26]Hamed Tabkhi, Majid Sabbagh, Gunar Schirner:
A Power-Efficient FPGA-Based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution. FCCM 2014: 241 - [c25]Jiaxing Zhang, Hanjiao Qiu, Salar Shahini Shamsabadi, Ralf Birken, Gunar Schirner:
WiP abstract: System-level integration of mobile multi-modal multi-sensor systems. ICCPS 2014: 227 - [c24]Chulian Zhang, Hamed Tabkhi, Gunar Schirner:
A GPU-Based Algorithm-Specific Optimization for High-Performance Background Subtraction. ICPP 2014: 182-191 - [p1]Yash Ukidave, Gunar Schirner, David R. Kaeli:
Fast Fourier Transform (FFT) on GPUs. Numerical Computations with GPUs 2014: 339-361 - 2013
- [j5]Gunar Schirner, Deniz Erdogmus, Kaushik R. Chowdhury, Taskin Padir:
The Future of Human-in-the-Loop Cyber-Physical Systems. IEEE Computer 46(1): 36-45 (2013) - [c23]Robert Bushey, Hamed Tabkhi, Gunar Schirner:
Flexible function-level acceleration of embedded vision applications using the Pipelined Vision Processor. ACSSC 2013: 1447-1452 - [c22]Hamed Tabkhi, Robert Bushey, Gunar Schirner:
Algorithm and architecture co-design of Mixture of Gaussian (MoG) background subtraction for embedded vision. ACSSC 2013: 1815-1820 - [c21]Jiaxing Zhang, Gunar Schirner:
Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding. IESS 2013: 26-38 - [c20]Yash Ukidave, Amir Kavyan Ziabari, Perhaad Mistry, Gunar Schirner, David R. Kaeli:
Quantifying the energy efficiency of FFT on heterogeneous platforms. ISPASS 2013: 235-244 - [e1]Gunar Schirner, Marcelo Götz, Achim Rettberg, Mauro Cesar Zanella, Franz J. Rammig:
Embedded Systems: Design, Analysis and Verification - 4th IFIP TC 10 International Embedded Systems Symposium, IESS 2013, Paderborn, Germany, June 17-19, 2013. Proceedings. IFIP Advances in Information and Communication Technology 403, Springer 2013, ISBN 978-3-642-38852-1 [contents] - 2012
- [c19]Hamed Tabkhi, Gunar Schirner:
Application-specific power-efficient approach for reducing register file vulnerability. DATE 2012: 574-577 - [c18]Hamed Tabkhi, Gunar Schirner:
AFReP: Application-guided Function-level Registerfile power-gating for embedded processors. ICCAD 2012: 302-308 - [c17]Hamed Tabkhi, Gunar Schirner:
ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors. VLSI-SoC 2012: 299-302 - 2011
- [j4]Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, Daniel D. Gajski:
Automatic TLM Generation for Early Validation of Multicore Systems. IEEE Design & Test of Computers 28(3): 10-19 (2011) - [c16]Gunar Schirner:
Modeling, synthesis, and validation of heterogeneous biomedical embedded systems. HLDVT 2011: 106-109 - 2010
- [j3]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Fast and accurate processor models for efficient MPSoC design. ACM Trans. Design Autom. Electr. Syst. 15(2): 10:1-10:26 (2010) - [c15]Andreas Gerstlauer, Gunar Schirner:
Platform modeling for exploration and synthesis. ASP-DAC 2010: 725-731 - [c14]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
System-level development of embedded software. ASP-DAC 2010: 903-909 - [c13]Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski:
Accurate timed RTOS model for transaction level modeling. DATE 2010: 1333-1336 - [c12]Gunar Schirner:
Exploring SW performance using preemptive RTOS models. International Symposium on Rapid System Prototyping 2010: 1-7
2000 – 2009
- 2009
- [c11]Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski:
Hardware-dependent software synthesis for many-core embedded systems. ASP-DAC 2009: 304-310 - [c10]Yonghyun Hwang, Gunar Schirner, Samar Abdi:
Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support. IESS 2009: 66-76 - 2008
- [j2]Gunar Schirner, Rainer Dömer:
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling. ACM Trans. Embedded Comput. Syst. 8(1): 4:1-4:29 (2008) - [c9]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications. ASP-DAC 2008: 271-276 - [c8]Gunar Schirner, Rainer Dömer:
Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling. DATE 2008: 122-127 - 2007
- [j1]Gunar Schirner, Rainer Dömer:
Result-Oriented Modeling - A Novel Technique for Fast and Accurate TLM. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1688-1699 (2007) - [c7]Gunar Schirner, Andreas Gerstlauer, Rainer Dömer:
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design. ASP-DAC 2007: 384-389 - [c6]Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer:
Embedded Software Development in a System-Level Design Flow. IESS 2007: 289-298 - 2006
- [c5]Gunar Schirner, Rainer Dömer:
Accurate yet fast modeling of real-time communication. CODES+ISSS 2006: 70-75 - [c4]Gunar Schirner, Rainer Dömer:
Quantitative analysis of transaction level models for the AMBA bus. DATE 2006: 230-235 - [c3]Gunar Schirner, Rainer Dömer:
Fast and accurate transaction level models using result oriented modeling. ICCAD 2006: 363-368 - 2005
- [c2]Gunar Schirner, Rainer Dömer:
Abstract Communication Modeling. IESS 2005: 189-200 - 2004
- [c1]Gunar Schirner, Trevor Harmon, Raymond Klefstad:
Late Demarshalling: A Technique for Efficient Multi-language Middleware for Embedded Systems. CoopIS/DOA/ODBASE (2) 2004: 1155-1172
Coauthor Index
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