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2010 – today
- 2019
[c8]Thomas Van den Dries, Hans Ingelberts, Sven Boulanger, Maarten Kuijk:
A 5 ps resolution, 8.6 ns delay range digital delay line using combinatorial redundancy. PRIME 2019: 21-24- 2015
- [j11]Viki Szortyka, Qixian Shi, Kuba Raczkowski, Bertrand Parvais, Maarten Kuijk, Piet Wambacq:
A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. J. Solid-State Circuits 50(9): 2025-2036 (2015) - [j10]Viki Szortyka, Kuba Raczkowski, Maarten Kuijk, Piet Wambacq:
A Wideband Beamforming Lowpass Filter for 60 GHz Phased-Array Receivers. IEEE Trans. on Circuits and Systems 62-I(9): 2324-2333 (2015) - 2010
- [j9]Bob Verbruggen, Jan Craninckx
, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS. J. Solid-State Circuits 45(10): 2080-2090 (2010) - [c7]Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS. ISSCC 2010: 296-297
2000 – 2009
- 2009
- [j8]Jonathan Borremans, Steven Thijs, Piet Wambacq, Yves Rolain, Dimitri Linten, Maarten Kuijk:
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA. J. Solid-State Circuits 44(2): 344-353 (2009) - [j7]Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.2 mW 1.75 GS/s 5 Bit Folding Flash ADC in 90 nm Digital CMOS. J. Solid-State Circuits 44(3): 874-882 (2009) - [j6]Jonathan Borremans, Julien Ryckaert, Claude Desset, Maarten Kuijk, Piet Wambacq, Jan Craninckx:
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS. J. Solid-State Circuits 44(7): 1942-1949 (2009) - [c6]Ahmed Mohamed AbdelHamid, Ankur Anchlia, Stylianos Mamagkakis, Miguel Corbalan Miranda, Bart Dierickx, Maarten Kuijk:
A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning. DSD 2009: 401-408 - 2008
- [j5]Ward Van Der Tempel, Daniel Van Nieuwenhove, Riemer Grootjans, Maarten Kuijk:
A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators. IJISTA 5(3/4): 237-245 (2008) - [j4]Daniel Van Nieuwenhove, Ward Van Der Tempel, Riemer Grootjans, Maarten Kuijk:
Time-Of-Flight distance sensor with enhanced dynamic range. IJISTA 5(3/4): 246-254 (2008) - [j3]Jonathan Borremans, Piet Wambacq, Charlotte Soens, Yves Rolain, Maarten Kuijk:
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS. J. Solid-State Circuits 43(11): 2422-2433 (2008) - [j2]Jonathan Borremans, Andrea Bevilacqua, Stephane Bronckers, Morin Dehan, Maarten Kuijk, Piet Wambacq, Jan Craninckx:
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS. J. Solid-State Circuits 43(12): 2693-2705 (2008) - [c5]Bob Verbruggen, Jan Craninckx, Maarten Kuijk, Piet Wambacq, Geert Van der Plas:
A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS. ISSCC 2008: 252-253 - [c4]Jonathan Borremans, Stephane Bronckers, Piet Wambacq, Maarten Kuijk, Jan Craninckx:
A Single-Inductor Dual-Band VCO in a 0.06mm2 5.6GHz Multi-Band Front-End in 90nm Digital CMOS. ISSCC 2008: 324-325 - [c3]Jonathan Borremans, Piet Wambacq, Maarten Kuijk, Geert Carchon, Stefaan Decoutere:
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. ISSCC 2008: 536-537 - 2006
- [j1]J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne:
Wafer-level package interconnect options. IEEE Trans. VLSI Syst. 14(6): 654-659 (2006) - [c2]J. Balachandran, Steven Brebels, Geert Carchon, Walter De Raedt, Eric Beyne, Maarten Kuijk, Bart Nauwelaers:
Constant Impedance Scaling Paradigm for Scaling LC transmission lines. ISQED 2006: 387-392 - [c1]J. Balachandran, Steven Brebels, Geert Carchon, Maarten Kuijk, Walter De Raedt, Bart Nauwelaers, Eric Beyne:
Constant impedance scaling paradigm for interconnect synthesis. SLIP 2006: 99-105
Coauthor Index
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