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BibTeX records: Wei Zhang 0044
@article{DBLP:journals/tc/ZhangZL21, author = {Wei Zhang and Hang Zhang and John C. Lach}, title = {Extending Performance-Energy Trade-offs Via Dynamic Core Scaling}, journal = {{IEEE} Trans. Computers}, volume = {70}, number = {11}, pages = {1875--1886}, year = {2021}, url = {https://doi.org/10.1109/TC.2020.3029306}, doi = {10.1109/TC.2020.3029306}, timestamp = {Tue, 17 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tc/ZhangZL21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/ZhangZL15, author = {Wei Zhang and Hang Zhang and John C. Lach}, title = {Dynamic core scaling: Trading off performance and energy beyond {DVFS}}, booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015, New York City, NY, USA, October 18-21, 2015}, pages = {319--326}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/ICCD.2015.7357120}, doi = {10.1109/ICCD.2015.7357120}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/ZhangZL15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/ZhangZL15, author = {Wei Zhang and Hang Zhang and John C. Lach}, title = {Reducing dynamic energy of set-associative {L1} instruction cache by early tag lookup}, booktitle = {{IEEE/ACM} International Symposium on Low Power Electronics and Design, {ISLPED} 2015, Rome, Italy, July 22-24, 2015}, pages = {49--54}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/ISLPED.2015.7273489}, doi = {10.1109/ISLPED.2015.7273489}, timestamp = {Tue, 17 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/islped/ZhangZL15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/ZhangZL14, author = {Hang Zhang and Wei Zhang and John C. Lach}, title = {A low-power accuracy-configurable floating point multiplier}, booktitle = {32nd {IEEE} International Conference on Computer Design, {ICCD} 2014, Seoul, South Korea, October 19-22, 2014}, pages = {48--54}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ICCD.2014.6974661}, doi = {10.1109/ICCD.2014.6974661}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/ZhangZL14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/ZhangZL14, author = {Wei Zhang and Hang Zhang and John C. Lach}, editor = {Yuan Xie and Tanay Karnik and Muhammad M. Khellah and Renu Mehra}, title = {Adaptive front-end throttling for superscalar processors}, booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, {USA} - August 11 - 13, 2014}, pages = {21--26}, publisher = {{ACM}}, year = {2014}, url = {https://doi.org/10.1145/2627369.2627633}, doi = {10.1145/2627369.2627633}, timestamp = {Tue, 17 Jan 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/islped/ZhangZL14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/ZickSZF13, author = {Kenneth M. Zick and Meeta Srivastav and Wei Zhang and Matthew French}, editor = {Brad L. Hutchings and Vaughn Betz}, title = {Sensing nanosecond-scale voltage attacks and natural transients in FPGAs}, booktitle = {The 2013 {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} '13, Monterey, CA, USA, February 11-13, 2013}, pages = {101--104}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2435264.2435283}, doi = {10.1145/2435264.2435283}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/ZickSZF13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/esticas/LiCZCSB11, author = {Will X. Y. Li and Rosa H. M. Chan and Wei Zhang and Ray C. C. Cheung and Dong Song and Theodore W. Berger}, title = {High-Performance and Scalable System Architecture for the Real-Time Estimation of Generalized Laguerre-Volterra {MIMO} Model From Neural Population Spiking Activity}, journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.}, volume = {1}, number = {4}, pages = {489--501}, year = {2011}, url = {https://doi.org/10.1109/JETCAS.2011.2178733}, doi = {10.1109/JETCAS.2011.2178733}, timestamp = {Mon, 26 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/esticas/LiCZCSB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/embc/LiCZCSB11, author = {Will X. Y. Li and Rosa H. M. Chan and Wei Zhang and Ray C. C. Cheung and Dong Song and Theodore W. Berger}, title = {A hardware-based computational platform for Generalized Laguerre-Volterra {MIMO} model for neural activities}, booktitle = {33rd Annual International Conference of the {IEEE} Engineering in Medicine and Biology Society, {EMBC} 2011, Boston, MA, USA, August 30 - Sept. 3, 2011}, pages = {7282--7285}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/IEMBS.2011.6091698}, doi = {10.1109/IEMBS.2011.6091698}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/embc/LiCZCSB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/LiCZCSB11, author = {Will X. Y. Li and Ray C. C. Cheung and Wei Zhang and Rosa H. M. Chan and Dong Song and Theodore W. Berger}, editor = {Paul Chow and Michael J. Wirthlin}, title = {{FPGA} Architecture of Generalized Laguerre-Volterra {MIMO} Model for Neural Population Spiking Activities}, booktitle = {{IEEE} 19th Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2011, Salt Lake City, Utah, USA, 1-3 May 2011}, pages = {254}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/FCCM.2011.21}, doi = {10.1109/FCCM.2011.21}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/LiCZCSB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/LiCZYCSB11, author = {Will X. Y. Li and Rosa H. M. Chan and Wei Zhang and C. W. Yu and Ray C. C. Cheung and Dong Song and Theodore W. Berger}, title = {{FPGA} Architecture of Generalized Laguerre-Volterra {MIMO} Model for Neural Population Activities}, booktitle = {International Conference on Field Programmable Logic and Applications, {FPL} 2011, September 5-7, Chania, Crete, Greece}, pages = {44--49}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/FPL.2011.19}, doi = {10.1109/FPL.2011.19}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fpl/LiCZYCSB11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/rsp/SzeferZCCCLCL11, author = {Jakub Szefer and Wei Zhang and Yu{-}Yuan Chen and David Champagne and King Chan and Will X. Y. Li and Ray C. C. Cheung and Ruby B. Lee}, title = {Rapid single-chip secure processor prototyping on the OpenSPARC {FPGA} platform}, booktitle = {Proceedings of the 22nd {IEEE} International Symposium on Rapid System Prototyping, {RSP} 2011, Karlsruhe, Germany, 24-27 May, 2011}, pages = {38--44}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/RSP.2011.5929973}, doi = {10.1109/RSP.2011.5929973}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/rsp/SzeferZCCCLCL11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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