BibTeX records: Yue Zha

download as .bib file

@inproceedings{DBLP:conf/fpga/ZhaL22,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Michael Adler and
                  Paolo Ienne},
  title        = {Revisiting PathFinder Routing Algorithm},
  booktitle    = {{FPGA} '22: The 2022 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
  pages        = {24--34},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3490422.3502356},
  doi          = {10.1145/3490422.3502356},
  timestamp    = {Mon, 20 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ZhaL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asplos/Zha021,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Tim Sherwood and
                  Emery D. Berger and
                  Christos Kozyrakis},
  title        = {When application-specific {ISA} meets FPGAs: a multi-layer virtualization
                  framework for heterogeneous cloud FPGAs},
  booktitle    = {{ASPLOS} '21: 26th {ACM} International Conference on Architectural
                  Support for Programming Languages and Operating Systems, Virtual Event,
                  USA, April 19-23, 2021},
  pages        = {123--134},
  publisher    = {{ACM}},
  year         = {2021},
  url          = {https://doi.org/10.1145/3445814.3446699},
  doi          = {10.1145/3445814.3446699},
  timestamp    = {Sat, 30 Sep 2023 09:34:47 +0200},
  biburl       = {https://dblp.org/rec/conf/asplos/Zha021.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/ZhaL21,
  author       = {Yue Zha and
                  Jing Li},
  title        = {Hetero-ViTAL: {A} Virtualization Stack for Heterogeneous {FPGA} Clusters},
  booktitle    = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
                  {ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
  pages        = {470--483},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISCA52012.2021.00044},
  doi          = {10.1109/ISCA52012.2021.00044},
  timestamp    = {Mon, 19 Feb 2024 07:32:07 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/ZhaL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/ZhaNL20,
  author       = {Yue Zha and
                  Etienne Nowak and
                  Jing Li},
  title        = {Liquid Silicon: {A} Nonvolatile Fully Programmable Processing-in-Memory
                  Processor With Monolithically Integrated ReRAM},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {55},
  number       = {4},
  pages        = {908--919},
  year         = {2020},
  url          = {https://doi.org/10.1109/JSSC.2019.2963005},
  doi          = {10.1109/JSSC.2019.2963005},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/ZhaNL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/trets/ZhangZBLL20,
  author       = {Jialiang Zhang and
                  Yue Zha and
                  Nicholas Beckwith and
                  Bangya Liu and
                  Jing Li},
  title        = {{MEG:} {A} RISCV-based System Emulation Infrastructure for Near-data
                  Processing Using FPGAs and High-bandwidth Memory},
  journal      = {{ACM} Trans. Reconfigurable Technol. Syst.},
  volume       = {13},
  number       = {4},
  pages        = {19:1--19:24},
  year         = {2020},
  url          = {https://doi.org/10.1145/3409114},
  doi          = {10.1145/3409114},
  timestamp    = {Sun, 11 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/trets/ZhangZBLL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asplos/ZhaL20,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {James R. Larus and
                  Luis Ceze and
                  Karin Strauss},
  title        = {Virtualizing FPGAs in the Cloud},
  booktitle    = {{ASPLOS} '20: Architectural Support for Programming Languages and
                  Operating Systems, Lausanne, Switzerland, March 16-20, 2020},
  pages        = {845--858},
  publisher    = {{ACM}},
  year         = {2020},
  url          = {https://doi.org/10.1145/3373376.3378491},
  doi          = {10.1145/3373376.3378491},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/asplos/ZhaL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isca/ZhaL20,
  author       = {Yue Zha and
                  Jing Li},
  title        = {Hyper-Ap: Enhancing Associative Processing Through {A} Full-Stack
                  Optimization},
  booktitle    = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture,
                  {ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020},
  pages        = {846--859},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISCA45697.2020.00074},
  doi          = {10.1109/ISCA45697.2020.00074},
  timestamp    = {Mon, 19 Feb 2024 07:32:24 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/ZhaL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fccm/ZhangLJZTL19,
  author       = {Jialiang Zhang and
                  Yang Liu and
                  Gaurav Jain and
                  Yue Zha and
                  Jonathan Ta and
                  Jing Li},
  title        = {{MEG:} {A} RISCV-Based System Simulation Infrastructure for Exploring
                  Memory Optimization Using FPGAs and Hybrid Memory Cube},
  booktitle    = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
                  Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
                  1, 2019},
  pages        = {145--153},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/FCCM.2019.00029},
  doi          = {10.1109/FCCM.2019.00029},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fccm/ZhangLJZTL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsic/ZhaNL19,
  author       = {Yue Zha and
                  Etienne Nowak and
                  Jing Li},
  title        = {Liquid Silicon: {A} Nonvolatile Fully Programmable Processing-In-Memory
                  Processor with Monolithically Integrated ReRAM for Big Data/Machine
                  Learning Applications},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {206},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778064},
  doi          = {10.23919/VLSIC.2019.8778064},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/ZhaNL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cal/ZhaL18,
  author       = {Yue Zha and
                  Jing Li},
  title        = {{CMA:} {A} Reconfigurable Complex Matching Accelerator for Wire-Speed
                  Network Intrusion Detection},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {33--36},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2719023},
  doi          = {10.1109/LCA.2017.2719023},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cal/KhoramZL18,
  author       = {Soroosh Khoram and
                  Yue Zha and
                  Jing Li},
  title        = {An Alternative Analytical Approach to Associative Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {113--116},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2789424},
  doi          = {10.1109/LCA.2018.2789424},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhoramZL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jolpe/ZhaL18,
  author       = {Yue Zha and
                  Jing Li},
  title        = {Specialization: {A} New Path Towards Low Power},
  journal      = {J. Low Power Electron.},
  volume       = {14},
  number       = {2},
  pages        = {195--205},
  year         = {2018},
  url          = {https://doi.org/10.1166/jolpe.2018.1559},
  doi          = {10.1166/JOLPE.2018.1559},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jolpe/ZhaL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asplos/ZhaL18,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Xipeng Shen and
                  James Tuck and
                  Ricardo Bianchini and
                  Vivek Sarkar},
  title        = {Liquid Silicon-Monona: {A} Reconfigurable Memory-Oriented Computing
                  Fabric with Scalable Multi-Context Support},
  booktitle    = {Proceedings of the Twenty-Third International Conference on Architectural
                  Support for Programming Languages and Operating Systems, {ASPLOS}
                  2018, Williamsburg, VA, USA, March 24-28, 2018},
  pages        = {214--228},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3173162.3173167},
  doi          = {10.1145/3173162.3173167},
  timestamp    = {Tue, 23 Jan 2024 20:31:22 +0100},
  biburl       = {https://dblp.org/rec/conf/asplos/ZhaL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ZhaL18,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Jason Helge Anderson and
                  Kia Bazargan},
  title        = {Liquid Silicon: {A} Data-Centric Reconfigurable Architecture Enabled
                  by {RRAM} Technology},
  booktitle    = {Proceedings of the 2018 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, {FPGA} 2018, Monterey, CA, USA, February 25-27, 2018},
  pages        = {51--60},
  publisher    = {{ACM}},
  year         = {2018},
  url          = {https://doi.org/10.1145/3174243.3174244},
  doi          = {10.1145/3174243.3174244},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/ZhaL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/cal/ZhaL17,
  author       = {Yue Zha and
                  Jing Li},
  title        = {{IMEC:} {A} Fully Morphable In-Memory Computing Fabric Enabled by
                  Resistive Crossbar},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {123--126},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2672558},
  doi          = {10.1109/LCA.2017.2672558},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpga/ZhaZWL17,
  author       = {Yue Zha and
                  Jialiang Zhang and
                  Zhiqiang Wei and
                  Jing Li},
  editor       = {Jonathan W. Greene and
                  Jason Helge Anderson},
  title        = {A Mixed-Signal Data-Centric Reconfigurable Architecture enabled by
                  {RRAM} Technology (Abstract Only)},
  booktitle    = {Proceedings of the 2017 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, {FPGA} 2017, Monterey, CA, USA, February 22-24, 2017},
  pages        = {285},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {http://dl.acm.org/citation.cfm?id=3021759},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/ZhaZWL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/ZhaL17,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Sri Parameswaran},
  title        = {RRAM-based reconfigurable in-memory computing architecture with hybrid
                  routing},
  booktitle    = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
                  {ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
  pages        = {527--532},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ICCAD.2017.8203822},
  doi          = {10.1109/ICCAD.2017.8203822},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/ZhaL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ispd/KhoramZZL17,
  author       = {Soroosh Khoram and
                  Yue Zha and
                  Jialiang Zhang and
                  Jing Li},
  editor       = {Mustafa Ozdal and
                  Chris Chu},
  title        = {Challenges and Opportunities: From Near-memory Computing to In-memory
                  Computing},
  booktitle    = {Proceedings of the 2017 {ACM} on International Symposium on Physical
                  Design, {ISDP} 2017, Portland, OR, USA, March 19-22, 2017},
  pages        = {43--46},
  publisher    = {{ACM}},
  year         = {2017},
  url          = {https://doi.org/10.1145/3036669.3038242},
  doi          = {10.1145/3036669.3038242},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ispd/KhoramZZL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/ZhaL16,
  author       = {Yue Zha and
                  Jing Li},
  editor       = {Frank Liu},
  title        = {Reconfigurable in-memory computing with resistive memory crossbar},
  booktitle    = {Proceedings of the 35th International Conference on Computer-Aided
                  Design, {ICCAD} 2016, Austin, TX, USA, November 7-10, 2016},
  pages        = {120},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2966986.2967069},
  doi          = {10.1145/2966986.2967069},
  timestamp    = {Fri, 23 Jun 2023 22:29:48 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/ZhaL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.