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BibTeX records: Adi Yoaz
@article{DBLP:journals/micro/RotemYRRMGWCBFG22, author = {Efraim Rotem and Adi Yoaz and Lihu Rappoport and Stephen J. Robinson and Julius Yuli Mandelblat and Arik Gihon and Eliezer Weissmann and Rajshree Chabukswar and Vadim Basin and Russell Fenger and Monica Gupta and Ahmad Yasin}, title = {Intel Alder Lake {CPU} Architectures}, journal = {{IEEE} Micro}, volume = {42}, number = {3}, pages = {13--19}, year = {2022}, url = {https://doi.org/10.1109/MM.2022.3164338}, doi = {10.1109/MM.2022.3164338}, timestamp = {Mon, 13 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/RotemYRRMGWCBFG22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/BandishteGSRYS20, author = {Sumeet Bandishte and Jayesh Gaur and Zeev Sperber and Lihu Rappoport and Adi Yoaz and Sreenivas Subramoney}, title = {Focused Value Prediction}, booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture, {ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020}, pages = {79--91}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISCA45697.2020.00018}, doi = {10.1109/ISCA45697.2020.00018}, timestamp = {Mon, 19 Feb 2024 07:32:24 +0100}, biburl = {https://dblp.org/rec/conf/isca/BandishteGSRYS20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/ChauhanGSSRYS20, author = {Adarsh Chauhan and Jayesh Gaur and Zeev Sperber and Franck Sala and Lihu Rappoport and Adi Yoaz and Sreenivas Subramoney}, title = {Auto-Predication of Critical Branches}, booktitle = {47th {ACM/IEEE} Annual International Symposium on Computer Architecture, {ISCA} 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020}, pages = {92--104}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISCA45697.2020.00019}, doi = {10.1109/ISCA45697.2020.00019}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isca/ChauhanGSSRYS20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/SoundararajanGN19, author = {Niranjan Soundararajan and Saurabh Gupta and Ragavendra Natarajan and Jared Stark and Rahul Pal and Franck Sala and Lihu Rappoport and Adi Yoaz and Sreenivas Subramoney}, title = {Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors}, booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16, 2019}, pages = {519--530}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3352460.3358315}, doi = {10.1145/3352460.3358315}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/micro/SoundararajanGN19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/DoweckKLMRRRYY17, author = {Jack Doweck and Wen{-}Fu Kao and Allen Kuan{-}yu Lu and Julius Mandelblat and Anirudha Rahatekar and Lihu Rappoport and Efraim Rotem and Ahmad Yasin and Adi Yoaz}, title = {Inside 6th-Generation Intel Core: New Microarchitecture Code-Named Skylake}, journal = {{IEEE} Micro}, volume = {37}, number = {2}, pages = {52--62}, year = {2017}, url = {https://doi.org/10.1109/MM.2017.38}, doi = {10.1109/MM.2017.38}, timestamp = {Thu, 01 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/DoweckKLMRRRYY17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/ChappellTPY02, author = {Robert S. Chappell and Francis Tseng and Yale N. Patt and Adi Yoaz}, editor = {Yale N. Patt and Dirk Grunwald and Kevin Skadron}, title = {Difficult-Path Branch Prediction Using Subordinate Microthreads}, booktitle = {29th International Symposium on Computer Architecture {(ISCA} 2002), 25-29 May 2002, Anchorage, AK, {USA}}, pages = {307--317}, publisher = {{IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/ISCA.2002.1003588}, doi = {10.1109/ISCA.2002.1003588}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/ChappellTPY02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/ChappellTYP02, author = {Robert S. Chappell and Francis Tseng and Adi Yoaz and Yale N. Patt}, editor = {Erik R. Altman and Kemal Ebcioglu and Scott A. Mahlke and B. Ramakrishna Rau and Sanjay J. Patel}, title = {Microarchitectural support for precomputation microthreads}, booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002}, pages = {74--84}, publisher = {{ACM/IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/MICRO.2002.1176240}, doi = {10.1109/MICRO.2002.1176240}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/ChappellTYP02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/JourdanRAEYR00, author = {St{\'{e}}phan Jourdan and Lihu Rappoport and Yoav Almog and Mattan Erez and Adi Yoaz and Ronny Ronen}, title = {eXtended Block Cache}, booktitle = {Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000}, pages = {61--70}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/HPCA.2000.824339}, doi = {10.1109/HPCA.2000.824339}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/JourdanRAEYR00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/BekermanYGJKR00, author = {Michael Bekerman and Adi Yoaz and Freddy Gabbay and St{\'{e}}phan Jourdan and Maxim Kalaev and Ronny Ronen}, editor = {Alan D. Berenbaum and Joel S. Emer}, title = {Early load address resolution via register tracking}, booktitle = {27th International Symposium on Computer Architecture {(ISCA} 2000), June 10-14, 2000, Vancouver, BC, Canada}, pages = {306--315}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/ISCA.2000.854400}, doi = {10.1109/ISCA.2000.854400}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/BekermanYGJKR00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/YoazERJ99, author = {Adi Yoaz and Mattan Erez and Ronny Ronen and St{\'{e}}phan Jourdan}, editor = {Allan Gottlieb and William J. Dally}, title = {Speculation Techniques for Improving Load Related Instruction Scheduling}, booktitle = {Proceedings of the 26th Annual International Symposium on Computer Architecture, {ISCA} 1999, Atlanta, Georgia, USA, May 2-4, 1999}, pages = {42--53}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ISCA.1999.765938}, doi = {10.1109/ISCA.1999.765938}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/YoazERJ99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/BekermanJRKRYW99, author = {Michael Bekerman and St{\'{e}}phan Jourdan and Ronny Ronen and Gilad Kirshenboim and Lihu Rappoport and Adi Yoaz and Uri C. Weiser}, editor = {Allan Gottlieb and William J. Dally}, title = {Correlated Load-Address Predictors}, booktitle = {Proceedings of the 26th Annual International Symposium on Computer Architecture, {ISCA} 1999, Atlanta, Georgia, USA, May 2-4, 1999}, pages = {54--63}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ISCA.1999.765939}, doi = {10.1109/ISCA.1999.765939}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/BekermanJRKRYW99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/JourdanRBSY98, author = {St{\'{e}}phan Jourdan and Ronny Ronen and Michael Bekerman and Bishara Shomar and Adi Yoaz}, editor = {James O. Bondi and Jim Smith}, title = {A Novel Renaming Scheme to Exploit Value Temporal Locality Through Physical Register Reuse and Unification}, booktitle = {Proceedings of the 31st Annual {IEEE/ACM} International Symposium on Microarchitecture, {MICRO} 31, Dallas, Texas, USA, November 30 - December 2, 1998}, pages = {216--225}, publisher = {{ACM/IEEE} Computer Society}, year = {1998}, url = {https://doi.org/10.1109/MICRO.1998.742783}, doi = {10.1109/MICRO.1998.742783}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/JourdanRBSY98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/PinterY96, author = {Shlomit S. Pinter and Adi Yoaz}, editor = {Stephen W. Melvin and Steve Beaty}, title = {Tango: {A} Hardware-Based Data Prefetching Technique for Superscalar Processors}, booktitle = {Proceedings of the 29th Annual {IEEE/ACM} International Symposium on Microarchitecture, {MICRO} 29, Paris, France, December 2-4, 1996}, pages = {214--225}, publisher = {{ACM/IEEE} Computer Society}, year = {1996}, url = {https://doi.org/10.1109/MICRO.1996.566463}, doi = {10.1109/MICRO.1996.566463}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/PinterY96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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