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ORCIDBibTeX records: Sudhakar Yalamanchili
@article{DBLP:journals/tc/AsgariHKKY21,
author = {Bahar Asgari and
Ramyad Hadidi and
Tushar Krishna and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {Efficiently Solving Partial Differential Equations in a Partially
Reconfigurable Specialized Hardware},
journal = {{IEEE} Trans. Computers},
volume = {70},
number = {4},
pages = {524--538},
year = {2021},
url = {https://doi.org/10.1109/TC.2021.3060700},
doi = {10.1109/TC.2021.3060700},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/AsgariHKKY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/AsgariMY21,
author = {Bahar Asgari and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {{MAHASIM:} Machine-Learning Hardware Acceleration Using a Software-Defined
Intelligent Memory System},
journal = {J. Signal Process. Syst.},
volume = {93},
number = {6},
pages = {659--675},
year = {2021},
url = {https://doi.org/10.1007/s11265-019-01505-1},
doi = {10.1007/S11265-019-01505-1},
timestamp = {Tue, 15 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/vlsisp/AsgariMY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccae/XiaoKMY21,
author = {He Xiao and
Monodeep Kar and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor
Design},
booktitle = {13th International Conference on Computer and Automation Engineering,
{ICCAE} 2021, Melbourne, Australia, March 20-22, 2021},
pages = {83--88},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCAE51876.2021.9426107},
doi = {10.1109/ICCAE51876.2021.9426107},
timestamp = {Mon, 17 May 2021 14:57:00 +0200},
biburl = {https://dblp.org/rec/conf/iccae/XiaoKMY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TineYK20,
author = {Blaise{-}Pascal Tine and
Sudhakar Yalamanchili and
Hyesoon Kim},
title = {Tango: An Optimizing Compiler for Just-In-Time {RTL} Simulation},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {157--162},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116253},
doi = {10.23919/DATE48585.2020.9116253},
timestamp = {Thu, 25 Jun 2020 12:55:44 +0200},
biburl = {https://dblp.org/rec/conf/date/TineYK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AsgariHKKY20,
author = {Bahar Asgari and
Ramyad Hadidi and
Tushar Krishna and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {{ALRESCHA:} {A} Lightweight Reconfigurable Sparse-Computation Accelerator},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2020, San Diego, CA, USA, February 22-26, 2020},
pages = {249--260},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/HPCA47549.2020.00029},
doi = {10.1109/HPCA47549.2020.00029},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AsgariHKKY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2010-10683,
author = {Maciej Besta and
Syed Minhaj Hassan and
Sudhakar Yalamanchili and
Rachata Ausavarungnirun and
Onur Mutlu and
Torsten Hoefler},
title = {Slim NoC: {A} Low-Diameter On-Chip Network Topology for High Energy
Efficiency and Scalability},
journal = {CoRR},
volume = {abs/2010.10683},
year = {2020},
url = {https://arxiv.org/abs/2010.10683},
eprinttype = {arXiv},
eprint = {2010.10683},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2010-10683.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ibmrd/MukhopadhyayLMN19,
author = {Saibal Mukhopadhyay and
Yun Long and
Burhan Ahmad Mudassar and
C. S. Nair and
Bartlet H. DeProspo and
Hakki Mert Torun and
M. Kathaperumal and
V. Smet and
Duckhwan Kim and
Sudhakar Yalamanchili and
Madhavan Swaminathan},
title = {Heterogeneous integration for artificial intelligence: Challenges
and opportunities},
journal = {{IBM} J. Res. Dev.},
volume = {63},
number = {6},
pages = {4:1},
year = {2019},
url = {https://doi.org/10.1147/JRD.2019.2947373},
doi = {10.1147/JRD.2019.2947373},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ibmrd/MukhopadhyayLMN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AsgariHKY19,
author = {Bahar Asgari and
Ramyad Hadidi and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {{ERIDANUS:} Efficiently Running Inference of DNNs Using Systolic Arrays},
journal = {{IEEE} Micro},
volume = {39},
number = {5},
pages = {46--54},
year = {2019},
url = {https://doi.org/10.1109/MM.2019.2930057},
doi = {10.1109/MM.2019.2930057},
timestamp = {Wed, 18 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/AsgariHKY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/TineYKV19,
author = {Blaise{-}Pascal Tine and
Sudhakar Yalamanchili and
Hyesoon Kim and
Jeffrey S. Vetter},
title = {{POSTER:} Tango: An Optimizing Compiler for Just-In-Time {RTL} Simulation},
booktitle = {28th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2019, Seattle, WA, USA, September 23-26, 2019},
pages = {481--482},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/PACT.2019.00055},
doi = {10.1109/PACT.2019.00055},
timestamp = {Wed, 13 Nov 2019 18:02:12 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/TineYKV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AsgariHKY19,
author = {Bahar Asgari and
Ramyad Hadidi and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {{LODESTAR:} Creating Locally-Dense CNNs for Efficient Inference on
Systolic Arrays},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {233},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3322472},
doi = {10.1145/3316781.3322472},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/AsgariHKY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/deds/ChenWY18,
author = {Xinwei Chen and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {Instruction-throughput regulation in computer processors with data-center
applications},
journal = {Discret. Event Dyn. Syst.},
volume = {28},
number = {1},
pages = {127--158},
year = {2018},
url = {https://doi.org/10.1007/s10626-017-0254-9},
doi = {10.1007/S10626-017-0254-9},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/deds/ChenWY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimNYM18,
author = {Duckhwan Kim and
Taesik Na and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
title = {DeepTrain: {A} Programmable Embedded Platform for Training Deep Neural
Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {11},
pages = {2360--2370},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2018.2858358},
doi = {10.1109/TCAD.2018.2858358},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KimNYM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/BestaHYAMH18,
author = {Maciej Besta and
Syed Minhaj Hassan and
Sudhakar Yalamanchili and
Rachata Ausavarungnirun and
Onur Mutlu and
Torsten Hoefler},
editor = {Xipeng Shen and
James Tuck and
Ricardo Bianchini and
Vivek Sarkar},
title = {Slim NoC: {A} Low-Diameter On-Chip Network Topology for High Energy
Efficiency and Scalability},
booktitle = {Proceedings of the Twenty-Third International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2018, Williamsburg, VA, USA, March 24-28, 2018},
pages = {43--55},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3173162.3177158},
doi = {10.1145/3173162.3177158},
timestamp = {Tue, 23 Jan 2024 20:31:22 +0100},
biburl = {https://dblp.org/rec/conf/asplos/BestaHYAMH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LongNRRKYM18,
author = {Yun Long and
Taesik Na and
Prakshi Rastogi and
Karthik Rao and
Asif Islam Khan and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
editor = {Iris Bahar},
title = {A ferroelectric {FET} based power-efficient architecture for data-intensive
computing},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
pages = {32},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765.3240770},
doi = {10.1145/3240765.3240770},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LongNRRKYM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1803-06068,
author = {Bahar Asgari and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Memory Slices: {A} Modular Building Block for Scalable, Intelligent
Memory Systems},
journal = {CoRR},
volume = {abs/1803.06068},
year = {2018},
url = {http://arxiv.org/abs/1803.06068},
eprinttype = {arXiv},
eprint = {1803.06068},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1803-06068.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1808-09087,
author = {Karthik Rao and
William J. Song and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {{TRINITY:} Coordinated Performance, Energy and Temperature Management
in 3D Processor-Memory Stacks},
journal = {CoRR},
volume = {abs/1808.09087},
year = {2018},
url = {http://arxiv.org/abs/1808.09087},
eprinttype = {arXiv},
eprint = {1808.09087},
timestamp = {Mon, 03 Sep 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1808-09087.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdc/ChenWY17,
author = {Xinwei Chen and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {Power regulation in high performance multicore processors},
booktitle = {56th {IEEE} Annual Conference on Decision and Control, {CDC} 2017,
Melbourne, Australia, December 12-15, 2017},
pages = {2674--2679},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/CDC.2017.8264047},
doi = {10.1109/CDC.2017.8264047},
timestamp = {Fri, 04 Mar 2022 13:29:55 +0100},
biburl = {https://dblp.org/rec/conf/cdc/ChenWY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RaoWYWY17,
author = {Karthik Rao and
Jun Wang and
Sudhakar Yalamanchili and
Yorai Wardi and
Handong Ye},
title = {Application-Specific Performance-Aware Energy Optimization on Android
Mobile Devices},
booktitle = {2017 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {169--180},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/HPCA.2017.32},
doi = {10.1109/HPCA.2017.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RaoWYWY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/HadidiAMMYK17,
author = {Ramyad Hadidi and
Bahar Asgari and
Burhan Ahmad Mudassar and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili and
Hyesoon Kim},
title = {Demystifying the characteristics of 3D-stacked memories: {A} case
study for Hybrid Memory Cube},
booktitle = {2017 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2017, Seattle, WA, USA, October 1-3, 2017},
pages = {66--75},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/IISWC.2017.8167757},
doi = {10.1109/IISWC.2017.8167757},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iiswc/HadidiAMMYK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KerseyKY17,
author = {Chad D. Kersey and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {Lightweight {SIMT} core designs for intelligent 3D stacked {DRAM}},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {49--59},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132426},
doi = {10.1145/3132402.3132426},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KerseyKY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/TineY17,
author = {Blaise{-}Pascal Tine and
Sudhakar Yalamanchili},
title = {Pagevault: securing off-chip memory using page-based authentication},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {293--304},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132439},
doi = {10.1145/3132402.3132439},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/TineY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/HadidiAMMYK17,
author = {Ramyad Hadidi and
Bahar Asgari and
Burhan Ahmad Mudassar and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili and
Hyesoon Kim},
title = {Demystifying the Characteristics of 3D-Stacked Memories: {A} Case
Study for Hybrid Memory Cube},
journal = {CoRR},
volume = {abs/1706.02725},
year = {2017},
url = {http://arxiv.org/abs/1706.02725},
eprinttype = {arXiv},
eprint = {1706.02725},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/HadidiAMMYK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1709-04859,
author = {X. Chen and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {Power Regulation in High Performance Multicore Processors},
journal = {CoRR},
volume = {abs/1709.04859},
year = {2017},
url = {http://arxiv.org/abs/1709.04859},
eprinttype = {arXiv},
eprint = {1709.04859},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1709-04859.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1710-04347,
author = {Duckhwan Kim and
Taesik Na and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
title = {NeuroTrainer: An Intelligent Memory Module for Deep Learning Training},
journal = {CoRR},
volume = {abs/1710.04347},
year = {2017},
url = {http://arxiv.org/abs/1710.04347},
eprinttype = {arXiv},
eprint = {1710.04347},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1710-04347.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XiaoYMY16,
author = {He Xiao and
Wen Yueh and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Thermally Adaptive Cache Access Mechanisms for 3D Many-Core Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {15},
number = {2},
pages = {129--132},
year = {2016},
url = {https://doi.org/10.1109/LCA.2015.2495125},
doi = {10.1109/LCA.2015.2495125},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/XiaoYMY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tomacs/WangDYR16,
author = {Jun Wang and
Zhenjiang Dong and
Sudhakar Yalamanchili and
George F. Riley},
title = {{FNM:} An Enhanced Null-Message Algorithm for Parallel Simulation
of Multicore Systems},
journal = {{ACM} Trans. Model. Comput. Simul.},
volume = {26},
number = {2},
pages = {11:1--11:26},
year = {2016},
url = {https://doi.org/10.1145/2735630},
doi = {10.1145/2735630},
timestamp = {Fri, 31 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tomacs/WangDYR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SongMY16,
author = {William J. Song and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Amdahl's law for lifetime reliability scaling in heterogeneous multicore
processors},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {594--605},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446097},
doi = {10.1109/HPCA.2016.7446097},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SongMY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KimKCYM16,
author = {Duckhwan Kim and
Jaeha Kung and
Sek M. Chai and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
title = {Neurocube: {A} Programmable Digital Neuromorphic Architecture with
High-Density 3D Memory},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {380--392},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.41},
doi = {10.1109/ISCA.2016.41},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/KimKCYM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WangRSY16,
author = {Jin Wang and
Norm Rubin and
Albert Sidelnik and
Sudhakar Yalamanchili},
title = {LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {583--595},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.57},
doi = {10.1109/ISCA.2016.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/WangRSY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/HassanY16,
author = {Syed Minhaj Hassan and
Sudhakar Yalamanchili},
editor = {Bruce L. Jacob},
title = {Understanding the Impact of Air and Microfluidics Cooling on Performance
of 3D Stacked Memory Systems},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {387--394},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989098},
doi = {10.1145/2989081.2989098},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/HassanY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/ZinnWWAY16,
author = {Daniel Zinn and
Haicheng Wu and
Jin Wang and
Molham Aref and
Sudhakar Yalamanchili},
editor = {David R. Kaeli and
John Cavazos},
title = {General-purpose join algorithms for large graph triangle listing on
heterogeneous systems},
booktitle = {Proceedings of the 9th Annual Workshop on General Purpose Processing
using Graphics Processing Unit, GPGPU@PPoPP 2016, Barcelona, Spain,
March 12 - 16, 2016},
pages = {12--21},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2884045.2884054},
doi = {10.1145/2884045.2884054},
timestamp = {Sun, 12 Jun 2022 19:46:08 +0200},
biburl = {https://dblp.org/rec/conf/ppopp/ZinnWWAY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/AngerWY16,
author = {Eric Anger and
Jeremiah J. Wilke and
Sudhakar Yalamanchili},
title = {Power-Constrained Performance Scheduling of Data Parallel Tasks},
booktitle = {4th International Workshop on Energy Efficient Supercomputing, E2SC@SC
2016, Salt Lake City, UT, USA, November 14, 2016},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/E2SC.2016.006},
doi = {10.1109/E2SC.2016.006},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/AngerWY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wodes/ChenWY16,
author = {Xinwei Chen and
Yorai Wardi and
Sudhakar Yalamanchili},
editor = {Christos G. Cassandras and
Alessandro Giua and
Zhiwu Li},
title = {{IPA} in the loop: Control design for throughput regulation in computer
processors},
booktitle = {13th International Workshop on Discrete Event Systems, {WODES} 2016,
Xi'an, China, May 30 - June 1, 2016},
pages = {141--146},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/WODES.2016.7497839},
doi = {10.1109/WODES.2016.7497839},
timestamp = {Fri, 29 Apr 2022 15:37:30 +0200},
biburl = {https://dblp.org/rec/conf/wodes/ChenWY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ChenWY16,
author = {Xinwei Chen and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {{IPA} in the Loop: Control Design for Throughput Regulation in Computer
Processors},
journal = {CoRR},
volume = {abs/1604.02727},
year = {2016},
url = {http://arxiv.org/abs/1604.02727},
eprinttype = {arXiv},
eprint = {1604.02727},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ChenWY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SongMY15,
author = {William J. Song and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Architectural Reliability: Lifetime Reliability Characterization and
Management ofMany-Core Processors},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {14},
number = {2},
pages = {103--106},
year = {2015},
url = {https://doi.org/10.1109/LCA.2014.2340873},
doi = {10.1109/LCA.2014.2340873},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/SongMY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcca/RaoSYW15,
author = {Karthik Rao and
William J. Song and
Sudhakar Yalamanchili and
Yorai Wardi},
title = {Temperature regulation in multicore processors using adjustable-gain
integral controllers},
booktitle = {2015 {IEEE} Conference on Control Applications, {CCA} 2015, Sydney,
Australia, September 21-23, 2015},
pages = {810--815},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CCA.2015.7320717},
doi = {10.1109/CCA.2015.7320717},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEcca/RaoSYW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/ChenXWY15,
author = {X. Chen and
H. Xiao and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {Throughput Regulation in Shared Memory Multicore Processors},
booktitle = {22nd {IEEE} International Conference on High Performance Computing,
HiPC 2015, Bengaluru, India, December 16-19, 2015},
pages = {12--20},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HiPC.2015.33},
doi = {10.1109/HIPC.2015.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/ChenXWY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/AngerDHWY15,
author = {Eric Anger and
Damian Dechev and
Gilbert Hendry and
Jeremiah J. Wilke and
Sudhakar Yalamanchili},
title = {Application Modeling for Scalable Simulation of Massively Parallel
Systems},
booktitle = {17th {IEEE} International Conference on High Performance Computing
and Communications, {HPCC} 2015, 7th {IEEE} International Symposium
on Cyberspace Safety and Security, {CSS} 2015, and 12th {IEEE} International
Conference on Embedded Software and Systems, {ICESS} 2015, New York,
NY, USA, August 24-26, 2015},
pages = {238--247},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/HPCC-CSS-ICESS.2015.286},
doi = {10.1109/HPCC-CSS-ICESS.2015.286},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpcc/AngerDHWY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/irps/SongMY15,
author = {William J. Song and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Managing performance-reliability tradeoffs in multicore processors},
booktitle = {{IEEE} International Reliability Physics Symposium, {IRPS} 2015, Monterey,
CA, USA, April 19-23, 2015},
pages = {3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/IRPS.2015.7112707},
doi = {10.1109/IRPS.2015.7112707},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/irps/SongMY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PaulHAY15,
author = {Indrani Paul and
Wei Huang and
Manish Arora and
Sudhakar Yalamanchili},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {Harmonia: balancing compute and memory power in high-performance GPUs},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {54--65},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750404},
doi = {10.1145/2749469.2750404},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PaulHAY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/WangRSY15,
author = {Jin Wang and
Norm Rubin and
Albert Sidelnik and
Sudhakar Yalamanchili},
editor = {Deborah T. Marr and
David H. Albonesi},
title = {Dynamic thread block launch: a lightweight execution mechanism to
support irregular applications on GPUs},
booktitle = {Proceedings of the 42nd Annual International Symposium on Computer
Architecture, Portland, OR, USA, June 13-17, 2015},
pages = {528--540},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2749469.2750393},
doi = {10.1145/2749469.2750393},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/WangRSY15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/HassanYM15,
author = {Syed Minhaj Hassan and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
editor = {Bruce L. Jacob},
title = {Near Data Processing: Impact and Optimization of 3D Memory System
Architecture on the Uncore},
booktitle = {Proceedings of the 2015 International Symposium on Memory Systems,
{MEMSYS} 2015, Washington DC, DC, USA, October 5-8, 2015},
pages = {11--21},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2818950.2818952},
doi = {10.1145/2818950.2818952},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/HassanYM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KerseyYK15,
author = {Chad D. Kersey and
Sudhakar Yalamanchili and
Hyesoon Kim},
editor = {Bruce L. Jacob},
title = {SIMT-based Logic Layers for Stacked {DRAM} Architectures: {A} Prototype},
booktitle = {Proceedings of the 2015 International Symposium on Memory Systems,
{MEMSYS} 2015, Washington DC, DC, USA, October 5-8, 2015},
pages = {29--30},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2818950.2818954},
doi = {10.1145/2818950.2818954},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KerseyYK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KimKYR15,
author = {Hyojong Kim and
Hyesoon Kim and
Sudhakar Yalamanchili and
Arun F. Rodrigues},
editor = {Bruce L. Jacob},
title = {Understanding Energy Aspects of Processing-near-Memory for {HPC} Workloads},
booktitle = {Proceedings of the 2015 International Symposium on Memory Systems,
{MEMSYS} 2015, Washington DC, DC, USA, October 5-8, 2015},
pages = {276--282},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2818950.2818985},
doi = {10.1145/2818950.2818985},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KimKYR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2015e2sc,
editor = {Kirk W. Cameron and
Adolfy Hoisie and
Darren J. Kerbyson and
David K. Lowenthal and
Dimitrios S. Nikolopoulos and
Sudha Yalamanchili and
Laura Carrington and
Joseph B. Manzano},
title = {Proceedings of the 3rd International Workshop on Energy Efficient
Supercomputing, {E2SC} 2015, Austin, Texas, USA, November 15, 2015},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2834800},
doi = {10.1145/2834800},
isbn = {978-1-4503-3994-0},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/2015e2sc.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/WanXJY14,
author = {Zhimin Wan and
He Xiao and
Yogendra Joshi and
Sudhakar Yalamanchili},
title = {Co-design of multicore architectures and microfluidic cooling for
3D stacked ICs},
journal = {Microelectron. J.},
volume = {45},
number = {12},
pages = {1814--1821},
year = {2014},
url = {https://doi.org/10.1016/j.mejo.2014.04.019},
doi = {10.1016/J.MEJO.2014.04.019},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/WanXJY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sp/PaulRMAY14,
author = {Indrani Paul and
Vignesh T. Ravi and
Srilatha Manne and
Manish Arora and
Sudhakar Yalamanchili},
title = {Coordinated energy management in heterogeneous processors},
journal = {Sci. Program.},
volume = {22},
number = {2},
pages = {93--108},
year = {2014},
url = {https://doi.org/10.3233/SPR-140380},
doi = {10.3233/SPR-140380},
timestamp = {Wed, 06 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sp/PaulRMAY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LimLKSYS14,
author = {Jieun Lim and
Nagesh B. Lakshminarayana and
Hyesoon Kim and
William J. Song and
Sudhakar Yalamanchili and
Wonyong Sung},
title = {Power Modeling for {GPU} Architectures Using McPAT},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {19},
number = {3},
pages = {26:1--26:24},
year = {2014},
url = {https://doi.org/10.1145/2611758},
doi = {10.1145/2611758},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/LimLKSYS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/AlexandrovSSYKM14,
author = {Borislav Alexandrov and
Owen Sullivan and
William J. Song and
Sudhakar Yalamanchili and
Satish Kumar and
Saibal Mukhopadhyay},
title = {Control Principles and On-Chip Circuits for Active Cooling Using Integrated
Superlattice-Based Thin-Film Thermoelectric Devices},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {22},
number = {9},
pages = {1909--1919},
year = {2014},
url = {https://doi.org/10.1109/TVLSI.2013.2278951},
doi = {10.1109/TVLSI.2013.2278951},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/AlexandrovSSYKM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/FarooquiSY14,
author = {Naila Farooqui and
Karsten Schwan and
Sudhakar Yalamanchili},
editor = {John Cavazos and
Xiang Gong and
David R. Kaeli},
title = {Efficient Instrumentation of {GPGPU} Applications Using Information
Flow Analysis and Symbolic Execution},
booktitle = {Seventh Workshop on General Purpose Processing Using GPUs, GPGPU-7,
Salt Lake City, UT, USA, March 1, 2014},
pages = {19},
publisher = {{ACM}},
year = {2014},
url = {https://dl.acm.org/citation.cfm?id=2576782},
timestamp = {Thu, 11 Mar 2021 17:04:51 +0100},
biburl = {https://dblp.org/rec/conf/asplos/FarooquiSY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/WangRY14,
author = {Jin Wang and
Norman Rubin and
Sudhakar Yalamanchili},
editor = {John Cavazos and
Xiang Gong and
David R. Kaeli},
title = {ParallelJS: An Execution Framework for JavaScript on Heterogeneous
Systems},
booktitle = {Seventh Workshop on General Purpose Processing Using GPUs, GPGPU-7,
Salt Lake City, UT, USA, March 1, 2014},
pages = {72},
publisher = {{ACM}},
year = {2014},
url = {https://dl.acm.org/citation.cfm?id=2576788},
timestamp = {Tue, 27 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/WangRY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/WuDSABGY14,
author = {Haicheng Wu and
Gregory F. Diamos and
Tim Sheard and
Molham Aref and
Sean Baxter and
Michael Garland and
Sudhakar Yalamanchili},
editor = {David R. Kaeli and
Tipp Moseley},
title = {Red Fox: An Execution Environment for Relational Query Processing
on GPUs},
booktitle = {12th Annual {IEEE/ACM} International Symposium on Code Generation
and Optimization, {CGO} 2014, Orlando, FL, USA, February 15-19, 2014},
pages = {44},
publisher = {{ACM}},
year = {2014},
url = {https://dl.acm.org/citation.cfm?id=2544166},
timestamp = {Fri, 30 Nov 2018 12:48:46 +0100},
biburl = {https://dblp.org/rec/conf/cgo/WuDSABGY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/KerseyYKNK14,
author = {Chad D. Kersey and
Sudhakar Yalamanchili and
Hyojong Kim and
Nimit Nigania and
Hyesoon Kim},
title = {Harmonica: An FPGA-Based Data Parallel Soft Core},
booktitle = {22nd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2014, Boston, MA, USA, May 11-13, 2014},
pages = {171},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/FCCM.2014.53},
doi = {10.1109/FCCM.2014.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/KerseyYKNK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/WangY14,
author = {Jin Wang and
Sudhakar Yalamanchili},
title = {Characterization and analysis of dynamic parallelism in unstructured
{GPU} applications},
booktitle = {2014 {IEEE} International Symposium on Workload Characterization,
{IISWC} 2014, Raleigh, NC, USA, October 26-28, 2014},
pages = {51--60},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/IISWC.2014.6983039},
doi = {10.1109/IISWC.2014.6983039},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/WangY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/WangBBCDKRRSXXY14,
author = {Jun Wang and
Jesse G. Beu and
Rishiraj A. Bheda and
Tom Conte and
Zhenjiang Dong and
Chad D. Kersey and
Mitchelle Rasquinha and
George F. Riley and
William J. Song and
He Xiao and
Peng Xu and
Sudhakar Yalamanchili},
title = {Manifold: {A} parallel simulation framework for multicore systems},
booktitle = {2014 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2014, Monterey, CA, USA, March 23-25, 2014},
pages = {106--115},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISPASS.2014.6844466},
doi = {10.1109/ISPASS.2014.6844466},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/WangBBCDKRRSXXY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/SongMY14,
author = {William J. Song and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
title = {Energy Introspector: {A} parallel, composable framework for integrated
power-reliability-thermal modeling for multicore architectures},
booktitle = {2014 {IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2014, Monterey, CA, USA, March 23-25, 2014},
pages = {143--144},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISPASS.2014.6844476},
doi = {10.1109/ISPASS.2014.6844476},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/SongMY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/HassanY14,
author = {Syed Minhaj Hassan and
Sudhakar Yalamanchili},
editor = {Davide Bertozzi and
Luca Benini and
Sudhakar Yalamanchili and
J{\"{o}}rg Henkel},
title = {Bubble sharing: Area and energy efficient adaptive routers using centralized
buffers},
booktitle = {Eighth {IEEE/ACM} International Symposium on Networks-on-Chip, NoCS
2014, Ferrara, Italy, September 17-19, 2014},
pages = {119--126},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/NOCS.2014.7008770},
doi = {10.1109/NOCS.2014.7008770},
timestamp = {Wed, 16 Oct 2019 14:14:48 +0200},
biburl = {https://dblp.org/rec/conf/nocs/HassanY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/AngerYPM14,
author = {Eric Anger and
Sudhakar Yalamanchili and
Scott Pakin and
Patrick S. McCormick},
editor = {Hal Finkel and
Jeff R. Hammond},
title = {Architecture-independent modeling of intra-node data movement},
booktitle = {Proceedings of the 2014 {LLVM} Compiler Infrastructure in HPC, {LLVM}
2014, New Orleans, LA, USA, November 17, 2014},
pages = {29--39},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/LLVM-HPC.2014.6},
doi = {10.1109/LLVM-HPC.2014.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/AngerYPM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/simutools/DongWRY14,
author = {Zhenjiang Dong and
Jun Wang and
George F. Riley and
Sudhakar Yalamanchili},
editor = {Fernando Barros and
Kalyan S. Perumalla and
Roland Ewald},
title = {An efficient front-end for timing-directed parallel simulation of
multi-core system},
booktitle = {7th International {ICST} Conference on Simulation Tools and Techniques,
SIMUTools '14, Lisbon, Portugal, March 17-19, 2014},
pages = {201--206},
publisher = {{ICST/ACM}},
year = {2014},
url = {https://doi.org/10.4108/icst.simutools.2014.254638},
doi = {10.4108/ICST.SIMUTOOLS.2014.254638},
timestamp = {Fri, 31 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/simutools/DongWRY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vldb/WuZAY14,
author = {Haicheng Wu and
Daniel Zinn and
Molham Aref and
Sudhakar Yalamanchili},
editor = {Rajesh Bordawekar and
Tirthankar Lahiri and
Bugra Gedik and
Christian A. Lang},
title = {Multipredicate Join Algorithms for Accelerating Relational Graph Processing
on GPUs},
booktitle = {International Workshop on Accelerating Data Management Systems Using
Modern Processor and Storage Architectures - {ADMS} 2014, Hangzhou,
China, September 1, 2014},
pages = {1--12},
year = {2014},
url = {http://www.adms-conf.org/2014/adms14\_wu.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vldb/WuZAY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nocs/2014,
editor = {Davide Bertozzi and
Luca Benini and
Sudhakar Yalamanchili and
J{\"{o}}rg Henkel},
title = {Eighth {IEEE/ACM} International Symposium on Networks-on-Chip, NoCS
2014, Ferrara, Italy, September 17-19, 2014},
publisher = {{IEEE}},
year = {2014},
url = {https://ieeexplore.ieee.org/xpl/conhome/7000615/proceeding},
isbn = {978-1-4799-5347-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nocs/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2014e2sc,
editor = {Kirk W. Cameron and
Adolfy Hoisie and
Darren J. Kerbyson and
David K. Lowenthal and
Dimitrios S. Nikolopoulos and
Sudha Yalamanchili and
Andres Marquez},
title = {Proceedings of the 2nd International Workshop on Energy Efficient
Supercomputing, {E2SC} '14, New Orleans, Louisiana, USA, November
16-21, 2014},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://ieeexplore.ieee.org/xpl/conhome/7014616/proceeding},
isbn = {978-1-4799-7036-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sc/2014e2sc.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/LeeLKY13,
author = {Jaekyu Lee and
Si Li and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {Design space exploration of on-chip ring interconnection for a {CPU-GPU}
heterogeneous architecture},
journal = {J. Parallel Distributed Comput.},
volume = {73},
number = {12},
pages = {1525--1538},
year = {2013},
url = {https://doi.org/10.1016/j.jpdc.2013.07.014},
doi = {10.1016/J.JPDC.2013.07.014},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/LeeLKY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LeeLKY13,
author = {Jaekyu Lee and
Si Li and
Hyesoon Kim and
Sudhakar Yalamanchili},
title = {Adaptive virtual channel partitioning for network-on-chip in heterogeneous
architectures},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {18},
number = {4},
pages = {48:1--48:28},
year = {2013},
url = {https://doi.org/10.1145/2504906},
doi = {10.1145/2504906},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/LeeLKY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/WangRWY13,
author = {Jin Wang and
Norman Rubin and
Haicheng Wu and
Sudhakar Yalamanchili},
editor = {John Cavazos and
Xiang Gong and
David R. Kaeli},
title = {Accelerating simulation of agent-based models on heterogeneous architectures},
booktitle = {Proceedings of the 6th Workshop on General Purpose Processor Using
Graphics Processing Units, GPGPU-6, Houston, Texas, USA, March 16,
2013},
pages = {108--119},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2458523.2458534},
doi = {10.1145/2458523.2458534},
timestamp = {Tue, 06 Nov 2018 11:07:41 +0100},
biburl = {https://dblp.org/rec/conf/asplos/WangRWY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cluster/YoungSYMSF13,
author = {Jeffrey S. Young and
Se Hoon Shon and
Sudhakar Yalamanchili and
Alex Merritt and
Karsten Schwan and
Holger Fr{\"{o}}ning},
title = {Oncilla: {A} {GAS} runtime for efficient resource allocation and data
movement in accelerated clusters},
booktitle = {2013 {IEEE} International Conference on Cluster Computing, {CLUSTER}
2013, Indianapolis, IN, USA, September 23-27, 2013},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CLUSTER.2013.6702679},
doi = {10.1109/CLUSTER.2013.6702679},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cluster/YoungSYMSF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PaulMABY13,
author = {Indrani Paul and
Srilatha Manne and
Manish Arora and
William Lloyd Bircher and
Sudhakar Yalamanchili},
editor = {Avi Mendelson},
title = {Cooperative boosting: needy versus greedy power management},
booktitle = {The 40th Annual International Symposium on Computer Architecture,
ISCA'13, Tel-Aviv, Israel, June 23-27, 2013},
pages = {285--296},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2485922.2485947},
doi = {10.1145/2485922.2485947},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PaulMABY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mascots/DongWRY13,
author = {Zhenjiang Dong and
Jun Wang and
George F. Riley and
Sudhakar Yalamanchili},
title = {A Study of the Effect of Partitioning on Parallel Simulation of Multicore
Systems},
booktitle = {2013 {IEEE} 21st International Symposium on Modelling, Analysis and
Simulation of Computer and Telecommunication Systems, San Francisco,
CA, USA, August 14-16, 2013},
pages = {375--379},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/MASCOTS.2013.55},
doi = {10.1109/MASCOTS.2013.55},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mascots/DongWRY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nocs/HassanY13,
author = {Syed Minhaj Hassan and
Sudhakar Yalamanchili},
title = {Centralized buffer router: {A} low latency, low power router for high
radix NOCs},
booktitle = {2013 Seventh {IEEE/ACM} International Symposium on Networks-on-Chip
(NoCS), Tempe, AZ, USA, April 21-24, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/NoCS.2013.6558397},
doi = {10.1109/NOCS.2013.6558397},
timestamp = {Wed, 16 Oct 2019 14:14:48 +0200},
biburl = {https://dblp.org/rec/conf/nocs/HassanY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pads/WangDYR13,
author = {Jun Wang and
Zhenjiang Dong and
Sudhakar Yalamanchili and
George F. Riley},
editor = {Margaret L. Loper and
Gabriel A. Wainer},
title = {Optimizing parallel simulation of multicore systems using domain-specific
knowledge},
booktitle = {{SIGSIM} Principles of Advanced Discrete Simulation, {SIGSIM-PADS}
'13, Montreal, QC, Canada, May 19-22, 2013},
pages = {127--136},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2486092.2486108},
doi = {10.1145/2486092.2486108},
timestamp = {Fri, 31 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pads/WangDYR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/DiamosWWLY13,
author = {Gregory Frederick Diamos and
Haicheng Wu and
Jin Wang and
Ashwin Sanjay Lele and
Sudhakar Yalamanchili},
editor = {Alex Nicolau and
Xiaowei Shen and
Saman P. Amarasinghe and
Richard W. Vuduc},
title = {Relational algorithms for multi-bulk-synchronous processors},
booktitle = {{ACM} {SIGPLAN} Symposium on Principles and Practice of Parallel Programming,
PPoPP '13, Shenzhen, China, February 23-27, 2013},
pages = {301--302},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2442516.2442555},
doi = {10.1145/2442516.2442555},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ppopp/DiamosWWLY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/PaulRMAY13,
author = {Indrani Paul and
Vignesh T. Ravi and
Srilatha Manne and
Manish Arora and
Sudhakar Yalamanchili},
editor = {William Gropp and
Satoshi Matsuoka},
title = {Coordinated energy management in heterogeneous processors},
booktitle = {International Conference for High Performance Computing, Networking,
Storage and Analysis, SC'13, Denver, CO, {USA} - November 17 - 21,
2013},
pages = {59:1--59:12},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2503210.2503227},
doi = {10.1145/2503210.2503227},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/PaulRMAY13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/sc/2013e2sc,
editor = {Kirk W. Cameron and
Darren J. Kerbyson and
Andres Marquez and
Dimitrios S. Nikolopoulos and
Sudha Yalamanchili and
Kevin J. Barker},
title = {Proceedings of the 1st International Workshop on Energy Efficient
Supercomputing, {E2SC} 2013, Denver, Colorado, USA, November 17-21,
2013},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2536430},
doi = {10.1145/2536430},
isbn = {978-1-4503-2504-2},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/2013e2sc.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpca/WuDWLY12,
author = {Haicheng Wu and
Gregory F. Diamos and
Jin Wang and
Si Li and
Sudhakar Yalamanchili},
title = {Characterization and transformation of unstructured control flow in
bulk synchronous {GPU} applications},
journal = {Int. J. High Perform. Comput. Appl.},
volume = {26},
number = {2},
pages = {170--185},
year = {2012},
url = {https://doi.org/10.1177/1094342011434814},
doi = {10.1177/1094342011434814},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijhpca/WuDWLY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/amcc/AlmoosaSWY12,
author = {Nawaf I. Almoosa and
William J. Song and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {A power capping controller for multicore processors},
booktitle = {American Control Conference, {ACC} 2012, Montreal, QC, Canada, June
27-29, 2012},
pages = {4709--4714},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ACC.2012.6314995},
doi = {10.1109/ACC.2012.6314995},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/amcc/AlmoosaSWY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cdc/AlmoosaSYW12,
author = {Nawaf I. Almoosa and
William J. Song and
Sudhakar Yalamanchili and
Yorai Wardi},
title = {Throughput regulation in multicore processors via {IPA}},
booktitle = {Proceedings of the 51th {IEEE} Conference on Decision and Control,
{CDC} 2012, December 10-13, 2012, Maui, HI, {USA}},
pages = {7267--7272},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/CDC.2012.6426610},
doi = {10.1109/CDC.2012.6426610},
timestamp = {Fri, 04 Mar 2022 13:28:47 +0100},
biburl = {https://dblp.org/rec/conf/cdc/AlmoosaSYW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/KerrDY12,
author = {Andrew Kerr and
Gregory Frederick Diamos and
Sudhakar Yalamanchili},
editor = {Carol Eidt and
Anne M. Holler and
Uma Srinivasan and
Saman P. Amarasinghe},
title = {Dynamic compilation of data-parallel kernels for vector processors},
booktitle = {10th Annual {IEEE/ACM} International Symposium on Code Generation
and Optimization, {CGO} 2012, San Jose, CA, USA, March 31 - April
04, 2012},
pages = {23--32},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2259016.2259020},
doi = {10.1145/2259016.2259020},
timestamp = {Wed, 20 Sep 2023 07:55:33 +0200},
biburl = {https://dblp.org/rec/conf/cgo/KerrDY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/KerrAHY12,
author = {Andrew Kerr and
Eric Anger and
Gilbert Hendry and
Sudhakar Yalamanchili},
title = {Eiger: {A} framework for the automated synthesis of statistical performance
models},
booktitle = {19th International Conference on High Performance Computing, HiPC
2012, Pune, India, December 18-22, 2012},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HiPC.2012.6507525},
doi = {10.1109/HIPC.2012.6507525},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/KerrAHY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcc/YoungY12,
author = {Jeffrey S. Young and
Sudhakar Yalamanchili},
editor = {Geyong Min and
Jia Hu and
Lei (Chris) Liu and
Laurence Tianruo Yang and
Seetharami Seelam and
Laurent Lef{\`{e}}vre},
title = {Commodity Converged Fabrics for Global Address Spaces in Accelerator
Clouds},
booktitle = {14th {IEEE} International Conference on High Performance Computing
and Communication {\&} 9th {IEEE} International Conference on
Embedded Software and Systems, {HPCC-ICESS} 2012, Liverpool, United
Kingdom, June 25-27, 2012},
pages = {303--310},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCC.2012.48},
doi = {10.1109/HPCC.2012.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpcc/YoungY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipccc/PaulYJ12,
author = {Indrani Paul and
Sudhakar Yalamanchili and
Lizy K. John},
title = {Performance impact of virtual machine placement in a datacenter},
booktitle = {31st {IEEE} International Performance Computing and Communications
Conference, {IPCCC} 2012, Austin, TX, USA, December 1-3, 2012},
pages = {424--431},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/PCCC.2012.6407650},
doi = {10.1109/PCCC.2012.6407650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipccc/PaulYJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/WuDWCYC12,
author = {Haicheng Wu and
Gregory F. Diamos and
Jin Wang and
Srihari Cadambi and
Sudhakar Yalamanchili and
Srimat T. Chakradhar},
title = {Optimizing Data Warehousing Applications for GPUs Using Kernel Fusion/Fission},
booktitle = {26th {IEEE} International Parallel and Distributed Processing Symposium
Workshops {\&} PhD Forum, {IPDPS} 2012, Shanghai, China, May 21-25,
2012},
pages = {2433--2442},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IPDPSW.2012.300},
doi = {10.1109/IPDPSW.2012.300},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/WuDWCYC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/FarooquiKESY12,
author = {Naila Farooqui and
Andrew Kerr and
Greg Eisenhauer and
Karsten Schwan and
Sudhakar Yalamanchili},
editor = {Rajeev Balasubramonian and
Vijayalakshmi Srinivasan},
title = {Lynx: {A} dynamic instrumentation system for data-parallel applications
on {GPGPU} architectures},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, New Brunswick, NJ, USA, April 1-3, 2012},
pages = {58--67},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISPASS.2012.6189206},
doi = {10.1109/ISPASS.2012.6189206},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/FarooquiKESY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/WuDCY12,
author = {Haicheng Wu and
Gregory Frederick Diamos and
Srihari Cadambi and
Sudhakar Yalamanchili},
title = {Kernel Weaver: Automatically Fusing Database Primitives for Efficient
{GPU} Computation},
booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
pages = {107--118},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MICRO.2012.19},
doi = {10.1109/MICRO.2012.19},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/WuDCY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/KerseyRY12,
author = {Chad D. Kersey and
Arun Rodrigues and
Sudhakar Yalamanchili},
editor = {Daniel Gracia P{\'{e}}rez and
Sma{\"{\i}}l Niar and
Cristina Silvano and
Morteza Biglari{-}Abhari},
title = {A universal parallel front-end for execution driven microarchitecture
simulation},
booktitle = {Proceedings of the 2012 Workshop on Rapid Simulation and Performance
Evaluation: Methods and Tools, {RAPIDO} '12, 23 January, 2012, Paris,
France},
pages = {25--32},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2162131.2162135},
doi = {10.1145/2162131.2162135},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rapido/KerseyRY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/WangBYC12,
author = {Jun Wang and
Jesse G. Beu and
Sudhakar Yalamanchili and
Tom Conte},
title = {Designing Configurable, Modifiable and Reusable Components for Simulation
of Multicore Systems},
booktitle = {2012 {SC} Companion: High Performance Computing, Networking Storage
and Analysis, Salt Lake City, UT, USA, November 10-16, 2012},
pages = {472--476},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/SC.Companion.2012.67},
doi = {10.1109/SC.COMPANION.2012.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/WangBYC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/YoungWY12,
author = {Jeffrey S. Young and
Haicheng Wu and
Sudhakar Yalamanchili},
title = {Satisfying Data-Intensive Queries Using {GPU} Clusters},
booktitle = {2012 {SC} Companion: High Performance Computing, Networking Storage
and Analysis, Salt Lake City, UT, USA, November 10-16, 2012},
pages = {1314},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/SC.Companion.2012.163},
doi = {10.1109/SC.COMPANION.2012.163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/YoungWY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/simutools/SongYRM12,
author = {William J. Song and
Sudhakar Yalamanchili and
Arun F. Rodrigues and
Saibal Mukhopadhyay},
editor = {George F. Riley and
Francesco Quaglia and
Jan Himmelspach},
title = {Instruction-based energy estimation methodology for asymmetric manycore
processor simulations},
booktitle = {International {ICST} Conference on Simulation Tools and Techniques,
{SIMUTOOLS} '12, Sirmione-Desenzano, Italy, March 19-23, 2012},
pages = {166--171},
publisher = {{ICST/ACM}},
year = {2012},
url = {https://doi.org/10.4108/icst.simutools.2012.247770},
doi = {10.4108/ICST.SIMUTOOLS.2012.247770},
timestamp = {Fri, 28 Feb 2020 13:12:27 +0100},
biburl = {https://dblp.org/rec/conf/simutools/SongYRM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cse/VetterGDSLMMRRSY11,
author = {Jeffrey S. Vetter and
Richard Glassbrook and
Jack J. Dongarra and
Karsten Schwan and
Bruce Loftis and
Stephen Taylor McNally and
Jeremy S. Meredith and
James H. Rogers and
Philip C. Roth and
Kyle Spafford and
Sudhakar Yalamanchili},
title = {Keeneland: Bringing Heterogeneous {GPU} Computing to the Computational
Science Community},
journal = {Comput. Sci. Eng.},
volume = {13},
number = {5},
pages = {90--95},
year = {2011},
url = {https://doi.org/10.1109/MCSE.2011.83},
doi = {10.1109/MCSE.2011.83},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cse/VetterGDSLMMRRSY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChatterjeeRYM11,
author = {Subho Chatterjee and
Mitchelle Rasquinha and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
title = {A Scalable Design Methodology for Energy Minimization of {STTRAM:}
{A} Circuit and Architecture Perspective},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {5},
pages = {809--817},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2041476},
doi = {10.1109/TVLSI.2010.2041476},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChatterjeeRYM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/HassanCRY11,
author = {Syed Minhaj Hassan and
Dhruv Choudhary and
Mitchelle Rasquinha and
Sudhakar Yalamanchili},
editor = {Lawrence Rauchwerger and
Vivek Sarkar},
title = {Regulating Locality vs. Parallelism Tradeoffs in Multiple Memory Controller
Environments},
booktitle = {2011 International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
pages = {187--188},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PACT.2011.33},
doi = {10.1109/PACT.2011.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/HassanCRY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/FarooquiKDYS11,
author = {Naila Farooqui and
Andrew Kerr and
Gregory Frederick Diamos and
Sudhakar Yalamanchili and
Karsten Schwan},
title = {A framework for dynamically instrumenting {GPU} compute applications
within {GPU} Ocelot},
booktitle = {Proceedings of 4th Workshop on General Purpose Processing on Graphics
Processing Units, {GPGPU} 2011, Newport Beach, CA, USA, March 5, 2011},
pages = {9},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1964179.1964192},
doi = {10.1145/1964179.1964192},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/FarooquiKDYS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/DiamosAMKWY11,
author = {Gregory Frederick Diamos and
Benjamin Ashbaugh and
Subramaniam Maiyuran and
Andrew Kerr and
Haicheng Wu and
Sudhakar Yalamanchili},
editor = {Carlo Galuzzi and
Luigi Carro and
Andreas Moshovos and
Milos Prvulovic},
title = {{SIMD} re-convergence at thread frontiers},
booktitle = {44rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2011, Porto Alegre, Brazil, December 3-7, 2011},
pages = {477--488},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2155620.2155676},
doi = {10.1145/2155620.2155676},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/DiamosAMKWY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/parallel/Yalamanchili11,
author = {Sudhakar Yalamanchili},
editor = {David A. Padua},
title = {Interconnection Networks},
booktitle = {Encyclopedia of Parallel Computing},
pages = {964--975},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-0-387-09766-4\_484},
doi = {10.1007/978-0-387-09766-4\_484},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/parallel/Yalamanchili11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/parallel/Yalamanchili11a,
author = {Sudhakar Yalamanchili},
editor = {David A. Padua},
title = {Switching Techniques},
booktitle = {Encyclopedia of Parallel Computing},
pages = {1977--1989},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-0-387-09766-4\_296},
doi = {10.1007/978-0-387-09766-4\_296},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/parallel/Yalamanchili11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/DiamosKYC10,
author = {Gregory Frederick Diamos and
Andrew Kerr and
Sudhakar Yalamanchili and
Nathan Clark},
editor = {Valentina Salapura and
Michael Gschwind and
Jens Knoop},
title = {Ocelot: a dynamic optimization framework for bulk-synchronous applications
in heterogeneous systems},
booktitle = {19th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2010, Vienna, Austria, September 11-15, 2010},
pages = {353--364},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1854273.1854318},
doi = {10.1145/1854273.1854318},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/DiamosKYC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/SchwanGY10,
author = {Karsten Schwan and
Ada Gavrilovska and
Sudhakar Yalamanchili},
editor = {Christian M{\"{u}}ller{-}Schloer and
Wolfgang Karl and
Sami Yehia},
title = {HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous
Chip Multiprocessors},
booktitle = {Architecture of Computing Systems - {ARCS} 2010, 23rd International
Conference, Hannover, Germany, February 22-25, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5974},
pages = {1},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11950-7\_1},
doi = {10.1007/978-3-642-11950-7\_1},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/SchwanGY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/KerrDY10,
author = {Andrew Kerr and
Gregory F. Diamos and
Sudhakar Yalamanchili},
editor = {David R. Kaeli and
Miriam Leeser},
title = {Modeling {GPU-CPU} workloads and systems},
booktitle = {Proceedings of 3rd Workshop on General Purpose Processing on Graphics
Processing Units, {GPGPU} 2010, Pittsburgh, Pennsylvania, USA, March
14, 2010},
series = {{ACM} International Conference Proceeding Series},
volume = {425},
pages = {31--42},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1735688.1735696},
doi = {10.1145/1735688.1735696},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/KerrDY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/YoungY10,
author = {Jeffrey S. Young and
Sudhakar Yalamanchili},
title = {Dynamic Partitioned Global Address Spaces for power efficient {DRAM}
virtualization},
booktitle = {International Green Computing Conference 2010, Chicago, IL, USA, 15-18
August 2010},
pages = {485--492},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/GREENCOMP.2010.5598278},
doi = {10.1109/GREENCOMP.2010.5598278},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/YoungY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icca/AlmoosaWY10,
author = {Nawaf I. Almoosa and
Yorai Wardi and
Sudhakar Yalamanchili},
title = {Controller design for tracking induced miss-rates in cache memories},
booktitle = {8th {IEEE} International Conference on Control and Automation, {ICCA}
2010, Xiamen, China, June 9-11, 2010},
pages = {1355--1359},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICCA.2010.5524405},
doi = {10.1109/ICCA.2010.5524405},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icca/AlmoosaWY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/DiamosY10,
author = {Gregory F. Diamos and
Sudhakar Yalamanchili},
title = {Speculative execution on multi-GPU systems},
booktitle = {24th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2010, Atlanta, Georgia, USA, 19-23 April 2010 - Conference
Proceedings},
pages = {1--12},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IPDPS.2010.5470427},
doi = {10.1109/IPDPS.2010.5470427},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/DiamosY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/RasquinhaCCMY10,
author = {Mitchelle Rasquinha and
Dhruv Choudhary and
Subho Chatterjee and
Saibal Mukhopadhyay and
Sudhakar Yalamanchili},
editor = {Vojin G. Oklobdzija and
Barry Pangle and
Naehyuck Chang and
Naresh R. Shanbhag and
Chris H. Kim},
title = {An energy efficient cache design using spin torque transfer {(STT)}
{RAM}},
booktitle = {Proceedings of the 2010 International Symposium on Low Power Electronics
and Design, 2010, Austin, Texas, USA, August 18-20, 2010},
pages = {389--394},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1840845.1840931},
doi = {10.1145/1840845.1840931},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/RasquinhaCCMY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChatterjeeRYM09,
author = {Subho Chatterjee and
Mitchelle Rasquinha and
Sudhakar Yalamanchili and
Saibal Mukhopadhyay},
editor = {Jaijeet S. Roychowdhury},
title = {A methodology for robust, energy efficient design of Spin-Torque-Transfer
{RAM} arrays at scaled technologies},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {474--477},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687489},
doi = {10.1145/1687399.1687489},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/ChatterjeeRYM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/KerrDY09,
author = {Andrew Kerr and
Gregory F. Diamos and
Sudhakar Yalamanchili},
title = {A characterization and analysis of {PTX} kernels},
booktitle = {Proceedings of the 2009 {IEEE} International Symposium on Workload
Characterization, {IISWC} 2009, October 4-6, 2009, Austin, TX, {USA}},
pages = {3--12},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IISWC.2009.5306801},
doi = {10.1109/IISWC.2009.5306801},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iiswc/KerrDY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/LewisYL09,
author = {Dean L. Lewis and
Sudhakar Yalamanchili and
Hsien{-}Hsin S. Lee},
title = {High Performance Non-blocking Switch Design in 3D Die-Stacking Technology},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2009, 13-15
May 2009, Tampa, Florida, {USA}},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISVLSI.2009.53},
doi = {10.1109/ISVLSI.2009.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/LewisYL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/ChuangYGS08,
author = {Kangtao Kendall Chuang and
Sudhakar Yalamanchili and
Ada Gavrilovska and
Karsten Schwan},
editor = {Kenneth L. Pocek and
Duncan A. Buell},
title = {ShareStreams-V: {A} Virtualized QoS Packet Scheduling Accelerator},
booktitle = {16th {IEEE} International Symposium on Field-Programmable Custom Computing
Machines, {FCCM} 2008, 14-15 April 2008, Stanford, Palo Alto, California,
{USA}},
pages = {265--268},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/FCCM.2008.26},
doi = {10.1109/FCCM.2008.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/ChuangYGS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/RamaswamyY08,
author = {Subramanian Ramaswamy and
Sudhakar Yalamanchili},
editor = {P. Sadayappan and
Manish Parashar and
Ramamurthy Badrinath and
Viktor K. Prasanna},
title = {An Utilization Driven Framework for Energy Efficient Caches},
booktitle = {High Performance Computing - HiPC 2008, 15th International Conference,
Bangalore, India, December 17-20, 2008. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5374},
pages = {583--594},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-89894-8\_50},
doi = {10.1007/978-3-540-89894-8\_50},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/hipc/RamaswamyY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpdc/DiamosY08,
author = {Gregory F. Diamos and
Sudhakar Yalamanchili},
editor = {Manish Parashar and
Karsten Schwan and
Jon B. Weissman and
Domenico Laforenza},
title = {Harmony: an execution model and runtime for heterogeneous many core
systems},
booktitle = {Proceedings of the 17th International Symposium on High-Performance
Distributed Computing {(HPDC-17} 2008), 23-27 June 2008, Boston, MA,
{USA}},
pages = {197--200},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1383422.1383447},
doi = {10.1145/1383422.1383447},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpdc/DiamosY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arcs/RamaswamyY07,
author = {Subramanian Ramaswamy and
Sudhakar Yalamanchili},
editor = {Paul Lukowicz and
Lothar Thiele and
Gerhard Tr{\"{o}}ster},
title = {Customized Placement for High Performance Embedded Processor Caches},
booktitle = {Architecture of Computing Systems - {ARCS} 2007, 20th International
Conference, Zurich, Switzerland, March 12-15, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4415},
pages = {69--82},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71270-1\_6},
doi = {10.1007/978-3-540-71270-1\_6},
timestamp = {Tue, 14 May 2019 10:00:52 +0200},
biburl = {https://dblp.org/rec/conf/arcs/RamaswamyY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RamaswamyY07,
author = {Subramanian Ramaswamy and
Sudhakar Yalamanchili},
title = {Improving cache efficiency via resizing + remapping},
booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10
October 2007, Lake Tahoe, CA, USA, Proceedings},
pages = {47--54},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICCD.2007.4601879},
doi = {10.1109/ICCD.2007.4601879},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RamaswamyY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/CamineroCQDY06,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {{MMR:} {A} MultiMedia Router architecture to support hybrid workloads},
journal = {J. Parallel Distributed Comput.},
volume = {66},
number = {2},
pages = {307--321},
year = {2006},
url = {https://doi.org/10.1016/j.jpdc.2005.10.002},
doi = {10.1016/J.JPDC.2005.10.002},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/CamineroCQDY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/RamaswamySYP06,
author = {Subramanian Ramaswamy and
Jaswanth Sreeram and
Sudhakar Yalamanchili and
Krishna V. Palem},
title = {Data trace cache: an application specific cache architecture},
journal = {{SIGARCH} Comput. Archit. News},
volume = {34},
number = {1},
pages = {11--18},
year = {2006},
url = {https://doi.org/10.1145/1147349.1147354},
doi = {10.1145/1147349.1147354},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/RamaswamySYP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RamaswamyY06,
author = {Subramanian Ramaswamy and
Sudhakar Yalamanchili},
title = {Customizable Fault Tolerant Caches for Embedded Processors},
booktitle = {24th International Conference on Computer Design {(ICCD} 2006), 1-4
October 2006, San Jose, CA, {USA}},
pages = {108--113},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICCD.2006.4380802},
doi = {10.1109/ICCD.2006.4380802},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RamaswamyY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/CamineroCQDY05,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {Traffic Scheduling Solutions with QoS Support for an Input-Buffered
MultiMedia Router},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {16},
number = {11},
pages = {1009--1021},
year = {2005},
url = {https://doi.org/10.1109/TPDS.2005.140},
doi = {10.1109/TPDS.2005.140},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tpds/CamineroCQDY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asian/PalemCY04,
author = {Krishna V. Palem and
Lakshmi N. Chakrapani and
Sudhakar Yalamanchili},
editor = {Michael J. Maher},
title = {A Framework for Compiler Driven Design Space Exploration for Embedded
System Customization},
booktitle = {Advances in Computer Science - {ASIAN} 2004, Higher-Level Decision
Making, 9th Asian Computing Science Conference, Dedicated to Jean-Louis
Lassez on the Occasion of His 5th Cycle Birthday, Chiang Mai, Thailand,
December 8-10, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3321},
pages = {395--406},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30502-6\_29},
doi = {10.1007/978-3-540-30502-6\_29},
timestamp = {Tue, 14 May 2019 10:00:53 +0200},
biburl = {https://dblp.org/rec/conf/asian/PalemCY04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/KrishnamurthyYSW04,
author = {Raj Krishnamurthy and
Sudhakar Yalamanchili and
Karsten Schwan and
Richard West},
title = {ShareStreams: {A} Scalable Architecture and Hardware Support for High-Speed
QoS Packet Schedulers},
booktitle = {12th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2004), 20-23 April 2004, Napa, CA, USA, Proceedings},
pages = {115--124},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/FCCM.2004.52},
doi = {10.1109/FCCM.2004.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/KrishnamurthyYSW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/KrishnamurthyYSW03,
author = {Raj Krishnamurthy and
Sudhakar Yalamanchili and
Karsten Schwan and
Richard West},
title = {Leveraging Block Decisions and Aggregation in the ShareStreams QoS
Architecture},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {30},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213111},
doi = {10.1109/IPDPS.2003.1213111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/KrishnamurthyYSW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CamineroCQDY03,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {A Solution for Handling Hybrid Traffic in Clustered Environments:
The MultiMedia Router {MMR}},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {197},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213362},
doi = {10.1109/IPDPS.2003.1213362},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/CamineroCQDY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/CamineroCQDY03,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
editor = {Hamid R. Arabnia and
Youngsong Mun},
title = {A Hardware Approach to QoS Support in Cluster Environments: The Multimedia
Router {MMR}},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} '03, June 23 - 26,
2003, Las Vegas, Nevada, USA, Volume 1},
pages = {220--226},
publisher = {{CSREA} Press},
year = {2003},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdpta/CamineroCQDY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEmsp/CamineroCQDY02,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {A new switch scheduling algorithm to improve QoS in the multimedia
router},
booktitle = {{IEEE} 5th Workshop on Multimedia Signal Processing, {MMSP} 2002,
St. Thomas, Virgin Islands, USA, December 9-11, 2002},
pages = {376--379},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/MMSP.2002.1203324},
doi = {10.1109/MMSP.2002.1203324},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEmsp/CamineroCQDY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/PaulYD02,
author = {Indrani Paul and
Sudhakar Yalamanchili and
Jos{\'{e}} Duato},
editor = {Sartaj Sahni and
Viktor K. Prasanna and
Uday Shukla},
title = {Algorithms for Switch-Scheduling in the Multimedia Router for LANs},
booktitle = {High Performance Computing - HiPC 2002, 9th International Conference,
Bangalore, India, December 18-21, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2552},
pages = {219--231},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-36265-7\_21},
doi = {10.1007/3-540-36265-7\_21},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/hipc/PaulYD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/Yalamanchili02,
author = {Sudhakar Yalamanchili},
editor = {Sartaj Sahni and
Viktor K. Prasanna and
Uday Shukla},
title = {The Customization Landscape for Embedded Systems},
booktitle = {High Performance Computing - HiPC 2002, 9th International Conference,
Bangalore, India, December 18-21, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2552},
pages = {693--696},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-36265-7\_64},
doi = {10.1007/3-540-36265-7\_64},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipc/Yalamanchili02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/KrishnamurthyYSW02,
author = {Raj Krishnamurthy and
Sudhakar Yalamanchili and
Karsten Schwan and
Richard West},
title = {Architecture and Hardware for Scheduling Gigabit Packet Streams},
booktitle = {10th Annual {IEEE} Symposium on High Performance Interconnects {(HOTIC}
2002), August 21 - 23, 2002, Stanford, CA, {USA}},
pages = {52--64},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/CONECT.2002.1039257},
doi = {10.1109/CONECT.2002.1039257},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/KrishnamurthyYSW02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/CamineroCQDY02,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {A multimedia router architecture to provide high performance and QoS
guarantees to mixed traffic},
booktitle = {Proceedings of the 2002 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2002, Lausanne, Switzerland. August 26-29, 2002.
Volume {I}},
pages = {313--316},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ICME.2002.1035781},
doi = {10.1109/ICME.2002.1035781},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/CamineroCQDY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CamineroCQDY02,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {Investigating Switch Scheduling Algorithms to Support QoS in the Multimedia
Router},
booktitle = {16th International Parallel and Distributed Processing Symposium {(IPDPS}
2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts
Proceedings},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IPDPS.2002.1016561},
doi = {10.1109/IPDPS.2002.1016561},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/CamineroCQDY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/UlmerY02,
author = {Craig D. Ulmer and
Sudhakar Yalamanchili},
editor = {Hamid R. Arabnia},
title = {A Tunable Communications Library for Data Injection},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} '02, June 24 - 27,
2002, Las Vegas, Nevada, USA, Volume 4},
pages = {1630--1636},
publisher = {{CSREA} Press},
year = {2002},
timestamp = {Sat, 28 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pdpta/UlmerY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icn/CamineroCQDY01,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
editor = {Pascal Lorenz},
title = {A Cost-Effective Hardware Link Scheduling Algorithm for the Multimedia
Router {(MMR)}},
booktitle = {Networking - {ICN} 2001, First International Conference, Colmar, France,
July 9-13, 2001 Proceedings, Part 2},
series = {Lecture Notes in Computer Science},
volume = {2094},
pages = {358--369},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-47734-9\_36},
doi = {10.1007/3-540-47734-9\_36},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icn/CamineroCQDY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CamineroCQDY01,
author = {Mar{\'{\i}}a Blanca Caminero and
Carmen Carri{\'{o}}n and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {Tuning Buffer Size in the Multimedia Router {(MMR)}},
booktitle = {Proceedings of the 15th International Parallel {\&} Distributed
Processing Symposium (IPDPS-01), San Francisco, CA, USA, April 23-27,
2001},
pages = {160},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/IPDPS.2001.925147},
doi = {10.1109/IPDPS.2001.925147},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/CamineroCQDY01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SuhDDY00,
author = {Young{-}Joo Suh and
Binh Vien Dao and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {Software-Based Rerouting for Fault-Tolerant Pipelined Communication},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {11},
number = {3},
pages = {193--211},
year = {2000},
url = {https://doi.org/10.1109/71.841738},
doi = {10.1109/71.841738},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SuhDDY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SuhY00,
author = {Young{-}Joo Suh and
Sudhakar Yalamanchili},
title = {Configurable Algorithms for Complete Exchange in 2D Meshes},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {11},
number = {4},
pages = {337--356},
year = {2000},
url = {https://doi.org/10.1109/71.850832},
doi = {10.1109/71.850832},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SuhY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/LoveYDCQ00,
author = {Damon S. Love and
Sudhakar Yalamanchili and
Jos{\'{e}} Duato and
Mar{\'{\i}}a Blanca Caminero and
Francisco J. Quiles},
title = {Switch Scheduling in the Multimedia Router {(MMR)}},
booktitle = {Proceedings of the 14th International Parallel {\&} Distributed
Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000},
pages = {5--12},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IPDPS.2000.845958},
doi = {10.1109/IPDPS.2000.845958},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/LoveYDCQ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/UlmerY00,
author = {Craig D. Ulmer and
Sudhakar Yalamanchili},
editor = {Hamid R. Arabnia},
title = {An Extensible Message Layer for High-Performance Clusters},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} 2000, June 24-29,
2000, Las Vegas, Nevada, {USA}},
publisher = {{CSREA} Press},
year = {2000},
timestamp = {Sat, 28 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pdpta/UlmerY00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/DaoDY99,
author = {Binh Vien Dao and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
title = {Dynamically Configurable Message Flow Control for Fault-Tolerant Routing},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {10},
number = {1},
pages = {7--22},
year = {1999},
url = {https://doi.org/10.1109/71.744829},
doi = {10.1109/71.744829},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/DaoDY99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/canpc/CamineroQDLY99,
author = {Mar{\'{\i}}a Blanca Caminero and
Francisco J. Quiles and
Jos{\'{e}} Duato and
Damon S. Love and
Sudhakar Yalamanchili},
editor = {Anand Sivasubramaniam and
Mario Lauria},
title = {Performance Evaluation of the Multimedia Router with {MPEG-2} Video
Traffic},
booktitle = {Network-Based Parallel Computing: Communication, Architecture, and
Applications, Third International Workshop, {CANPC} '99, Orlando,
Forida, USA, January 9, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1602},
pages = {62--76},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/10704826\_5},
doi = {10.1007/10704826\_5},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/canpc/CamineroQDLY99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hcw/WestKNSYRS99,
author = {Richard West and
Raj Krishnamurthy and
W. K. Norton and
Karsten Schwan and
Sudhakar Yalamanchili and
Marcel{-}Catalin Rosu and
V. Sarat},
title = {{QUIC:} {A} Quality of Service Network Interface Layer for Communication
in NOWs},
booktitle = {8th Heterogeneous Computing Workshop, {HCW} 1999, San Juan, Puerto
Rico, April12, 1999},
pages = {199--208},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/HCW.1999.765136},
doi = {10.1109/HCW.1999.765136},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hcw/WestKNSYRS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DuatoYCLQ99,
author = {Jos{\'{e}} Duato and
Sudhakar Yalamanchili and
Mar{\'{\i}}a Blanca Caminero and
Damon S. Love and
Francisco J. Quiles},
title = {{MMR:} {A} High-Performance Multimedia Router - Architecture and Design
Trade-Offs},
booktitle = {Proceedings of the Fifth International Symposium on High-Performance
Computer Architecture, Orlando, FL, USA, January 9-12, 1999},
pages = {300--309},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/HPCA.1999.744383},
doi = {10.1109/HPCA.1999.744383},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/DuatoYCLQ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/HuangYMBA99,
author = {Tsai Chi Huang and
Sudhakar Yalamanchili and
Roy W. Melton and
Philip R. Bingham and
Cecil O. Alford},
title = {Teaching Pipelining and Concurrency using Hardware Description Languages},
booktitle = {{IEEE} International Conference on Microelectronic Systems Education,
{MSE} 1999, Arlington, Virginia, USA, July 19-21, 1999},
pages = {55--56},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/MSE.1999.787035},
doi = {10.1109/MSE.1999.787035},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/HuangYMBA99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SuhY98,
author = {Young{-}Joo Suh and
Sudhakar Yalamanchili},
title = {All-To-All Communication with Minimum Start-Up Costs in 2D/3D Tori
and Meshes},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {9},
number = {5},
pages = {442--458},
year = {1998},
url = {https://doi.org/10.1109/71.679215},
doi = {10.1109/71.679215},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SuhY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/RosuSY98,
author = {Daniela Rosu and
Karsten Schwan and
Sudhakar Yalamanchili},
title = {{FARA} - {A} Framework for Adaptive Resource Allocation in Complex
Real-Time Systems},
booktitle = {Proceedings of the Fourth {IEEE} Real-Time Technology and Applications
Symposium, RTAS'98, Denver, Colorado, USA, June 3-5, 1998},
pages = {79--84},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/RTTAS.1998.683190},
doi = {10.1109/RTTAS.1998.683190},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/RosuSY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/pcrcw/1997,
editor = {Sudhakar Yalamanchili and
Jos{\'{e}} Duato},
title = {Parallel Computer Routing and Communication, Second International
Workshop, PCRCW'97, Atlanta, Georgia, USA, June 26-27, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1417},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/3-540-69352-1},
doi = {10.1007/3-540-69352-1},
isbn = {3-540-64571-3},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pcrcw/1997.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0087651,
author = {Jos{\'{e}} Duato and
Sudhakar Yalamanchili and
Lionel M. Ni},
title = {Interconnection networks - an engineering approach},
publisher = {{IEEE}},
year = {1997},
isbn = {978-0-8186-7800-4},
timestamp = {Tue, 26 Apr 2011 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0087651.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DaoYD97,
author = {Binh Vien Dao and
Sudhakar Yalamanchili and
Jos{\'{e}} Duato},
title = {Architectural Support for Reducing Communication Overhead in Multiprocessor
Interconnection Networks},
booktitle = {Proceedings of the 3rd {IEEE} Symposium on High-Performance Computer
Architecture {(HPCA} '97), San Antonio, Texas, USA, February 1-5,
1997},
pages = {343--352},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/HPCA.1997.569699},
doi = {10.1109/HPCA.1997.569699},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/DaoYD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PatelCYS97,
author = {Chirag S. Patel and
Sek M. Chai and
Sudhakar Yalamanchili and
David E. Schimmel},
title = {Power Constrained Design of Multiprocessor Interconnection Networks},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {408--416},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628902},
doi = {10.1109/ICCD.1997.628902},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/PatelCYS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/DuatoLY97,
author = {Jos{\'{e}} Duato and
Pedro L{\'{o}}pez and
Sudhakar Yalamanchili},
title = {Deadlock- and Livelock-Free Routing Protocols for Wave Switching},
booktitle = {11th International Parallel Processing Symposium {(IPPS} '97), 1-5
April 1997, Geneva, Switzerland, Proceedings},
pages = {570--577},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IPPS.1997.580958},
doi = {10.1109/IPPS.1997.580958},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/DuatoLY97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pcrcw/PatelCYS97,
author = {Chirag S. Patel and
Sek M. Chai and
Sudhakar Yalamanchili and
David E. Schimmel},
editor = {Sudhakar Yalamanchili and
Jos{\'{e}} Duato},
title = {Power/Performance Trade-offs for Direct Networks},
booktitle = {Parallel Computer Routing and Communication, Second International
Workshop, PCRCW'97, Atlanta, Georgia, USA, June 26-27, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1417},
pages = {231--246},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-69352-1\_20},
doi = {10.1007/3-540-69352-1\_20},
timestamp = {Sun, 02 Oct 2022 16:13:27 +0200},
biburl = {https://dblp.org/rec/conf/pcrcw/PatelCYS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/RosuSYJ97,
author = {Daniela Rosu and
Karsten Schwan and
Sudhakar Yalamanchili and
Rakesh Jha},
title = {On adaptive resource allocation for complex real-time application},
booktitle = {Proceedings of the 18th {IEEE} Real-Time Systems Symposium {(RTSS}
'97), December 3-5, 1997, San Francisco, CA, {USA}},
pages = {320--329},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/REAL.1997.641293},
doi = {10.1109/REAL.1997.641293},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/RosuSYJ97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcs/YalamanchiliC96,
author = {Sudhakar Yalamanchili and
Todd Carpenter},
title = {Paradigms for Modeling and Simulation of Multiprocessor Architectures},
journal = {Int. J. Comput. Simul.},
volume = {6},
number = {1},
pages = {137},
year = {1996},
timestamp = {Thu, 16 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijcs/YalamanchiliC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GaughanDYS96,
author = {Patrick T. Gaughan and
Binh Vien Dao and
Sudhakar Yalamanchili and
David E. Schimmel},
title = {Distributed Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection
Networks},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {6},
pages = {651--665},
year = {1996},
url = {https://doi.org/10.1109/12.506422},
doi = {10.1109/12.506422},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GaughanDYS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LalgudiAY96,
author = {Hari Lalgudi and
Ian F. Akyildiz and
Sudhakar Yalamanchili},
title = {Augmented Binary Hypercube: {A} New Architecture for Processor Management},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {8},
pages = {980--984},
year = {1996},
url = {https://doi.org/10.1109/12.536241},
doi = {10.1109/12.536241},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LalgudiAY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GargLSSUWY96,
author = {Vivek Garg and
Steve Lacy and
David E. Schimmel and
Darrell Stogner and
Craig D. Ulmer and
D. Scott Wills and
Sudhakar Yalamanchili},
title = {Incorporating Multi-Chip Module Packaging Constraints into System
Design},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {508--513},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494348},
doi = {10.1109/EDTC.1996.494348},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/GargLSSUWY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/JhaMYSId96,
author = {Rakesh Jha and
Mustafa Muhammad and
Sudhakar Yalamanchili and
Karsten Schwan and
Daniela Ivan{-}Rosu and
Chris deCastro},
title = {Adaptive resource allocation for embedded parallel applications},
booktitle = {3rd International Conference on High Performance Computing, {HIPC}
1996, Proceedings, Trivandrum, India, 19-22 December, 1996},
pages = {425--431},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/HIPC.1996.565858},
doi = {10.1109/HIPC.1996.565858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/JhaMYSId96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/DuatoLSY96,
author = {Jos{\'{e}} Duato and
Pedro L{\'{o}}pez and
Federico Silla and
Sudhakar Yalamanchili},
editor = {Anthony P. Reeves},
title = {A High Performance Router Architecture for Interconnection Networks},
booktitle = {Proceedings of the 1996 International Conference on Parallel Processing,
{ICCP} 1996, Bloomingdale, IL, USA, August 12-16, 1996. Volume 1:
Architecture},
pages = {61--68},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICPP.1996.537144},
doi = {10.1109/ICPP.1996.537144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/DuatoLSY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SuhY96,
author = {Young{-}Joo Suh and
Sudhakar Yalamanchili},
title = {Algorithms for All-to-All Personalized Exchange in 2D and 3D Tori},
booktitle = {Proceedings of {IPPS} '96, The 10th International Parallel Processing
Symposium, April 15-19, 1996, Honolulu, Hawaii, {USA}},
pages = {808--814},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IPPS.1996.508152},
doi = {10.1109/IPPS.1996.508152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/SuhY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/CrawfordSY96,
author = {Emily Angerer Crawford and
Karsten Schwan and
Sudhakar Yalamanchili},
title = {Optimistic parallel computation: an example from computational chemistry},
booktitle = {Proceedings of the Eighth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1996, New Orleans, Louisiana, USA, October 23-26,
1996},
pages = {214--217},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/SPDP.1996.570336},
doi = {10.1109/SPDP.1996.570336},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/CrawfordSY96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcae/HamblenOYD96,
author = {James O. Hamblen and
Henry Owen and
Sudhakar Yalamanchili and
Binh Vien Dao},
title = {Using rapid prototyping in computer architecture design laboratories},
booktitle = {Proceedings of the 1996 workshop on Computer architecture education,
WCAE@HPCA 1996, San Jose, CA, USA, February 1996},
pages = {4},
publisher = {{ACM}},
year = {1996},
url = {https://doi.org/10.1145/1275152.1275156},
doi = {10.1145/1275152.1275156},
timestamp = {Tue, 06 Nov 2018 16:57:55 +0100},
biburl = {https://dblp.org/rec/conf/wcae/HamblenOYD96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/YalamanchiliWPS95,
author = {Sudhakar Yalamanchili and
Lynn E. Te Winkel and
David L. Perschbacher and
Belle Shenoy},
title = {Partitioning and mapping in embedded multiprocessor architectures
in the presence of constraints},
journal = {Concurr. Pract. Exp.},
volume = {7},
number = {3},
pages = {167--189},
year = {1995},
url = {https://doi.org/10.1002/cpe.4330070302},
doi = {10.1002/CPE.4330070302},
timestamp = {Thu, 21 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/YalamanchiliWPS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GaughanY95,
author = {Patrick T. Gaughan and
Sudhakar Yalamanchili},
title = {A Performance Model of Pipelined K-ary n-cubes},
journal = {{IEEE} Trans. Computers},
volume = {44},
number = {8},
pages = {1059--1063},
year = {1995},
url = {https://doi.org/10.1109/12.403724},
doi = {10.1109/12.403724},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GaughanY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tomacs/SellamiY95,
author = {Hatem Sellami and
Sudhakar Yalamanchili},
title = {Parallelism in Sequential Multiprocessor Simulation Models: {A} Case
Study},
journal = {{ACM} Trans. Model. Comput. Simul.},
volume = {5},
number = {2},
pages = {101--128},
year = {1995},
url = {https://doi.org/10.1145/210330.210333},
doi = {10.1145/210330.210333},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tomacs/SellamiY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/GaughanY95,
author = {Patrick T. Gaughan and
Sudhakar Yalamanchili},
title = {A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor
Networks},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {6},
number = {5},
pages = {482--497},
year = {1995},
url = {https://doi.org/10.1109/71.382317},
doi = {10.1109/71.382317},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/GaughanY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SuhDDY95,
author = {Young{-}Joo Suh and
Binh Vien Dao and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
editor = {Prithviraj Banerjee},
title = {Software Based Fault-Tolerant Oblivious Routing in Pipelined Networks},
booktitle = {Proceedings of the 1995 International Conference on Parallel Processing,
Urbana-Champain, Illinois, USA, August 14-18, 1995. Volume {I:} Architecture},
pages = {101--105},
publisher = {{CRC} Press},
year = {1995},
timestamp = {Fri, 25 Jul 2014 14:09:07 +0200},
biburl = {https://dblp.org/rec/conf/icpp/SuhDDY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/SellamiY95,
author = {Hatem Sellami and
Sudhakar Yalamanchili},
title = {Time scale combining of conservative parallel discrete event simulations},
booktitle = {Proceedings of {IPPS} '95, The 9th International Parallel Processing
Symposium, April 25-28, 1995, Santa Barbara, California, {USA}},
pages = {599--603},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IPPS.1995.395886},
doi = {10.1109/IPPS.1995.395886},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/SellamiY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DaoDY95,
author = {Binh Vien Dao and
Jos{\'{e}} Duato and
Sudhakar Yalamanchili},
editor = {David A. Patterson},
title = {Configurable Flow Control Mechanisms for Fault-Tolerant Routing},
booktitle = {Proceedings of the 22nd Annual International Symposium on Computer
Architecture, {ISCA} '95, Santa Margherita Ligure, Italy, June 22-24,
1995},
pages = {220--229},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/223982.224433},
doi = {10.1145/223982.224433},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/DaoDY95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijcs/CastroY94,
author = {Christopher H. de Castro and
Sudhakar Yalamanchili},
title = {Partitioning Coarse-Grain Signal Flow Graphs for Heterogeneous {DSP}
Architectures},
journal = {Int. J. Comput. Simul.},
volume = {4},
number = {4},
pages = {395--417},
year = {1994},
url = {http://dl.acm.org/citation.cfm?id=202933},
timestamp = {Thu, 16 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijcs/CastroY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tkde/LinOY94,
author = {Eileen Tien Lin and
Edward Omiecinski and
Sudhakar Yalamanchili},
title = {Large Join Optimization on a Hypercube Multiprocessor},
journal = {{IEEE} Trans. Knowl. Data Eng.},
volume = {6},
number = {2},
pages = {304--315},
year = {1994},
url = {https://doi.org/10.1109/69.277773},
doi = {10.1109/69.277773},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tkde/LinOY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpads/DuatoDGY94,
author = {Jos{\'{e}} Duato and
V. B. Dao and
Patrick T. Gaughan and
Sudhakar Yalamanchili},
editor = {Lionel M. Ni},
title = {Scouting: Fully Adaptive, Deadlock-Free Routing in Faulty Pipelined
Networks},
booktitle = {Proceedings 1994 International Conference on Parallel and Distributed
Systems, December 19-21, 1994, Hsinchu, Taiwan, Republic of China},
pages = {608--613},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICPADS.1994.590406},
doi = {10.1109/ICPADS.1994.590406},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpads/DuatoDGY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AllenGSY94,
author = {James D. Allen and
Patrick T. Gaughan and
David E. Schimmel and
Sudhakar Yalamanchili},
editor = {David A. Patterson},
title = {Ariadne - An Adaptive Router for Fault-Tolerant Multicomputers},
booktitle = {Proceedings of the 21st Annual International Symposium on Computer
Architecture. Chicago, IL, USA, April 1994},
pages = {278--288},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ISCA.1994.288142},
doi = {10.1109/ISCA.1994.288142},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/AllenGSY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mascots/SellamiASY94,
author = {Hatem Sellami and
James D. Allen and
David E. Schimmel and
Sudhakar Yalamanchili},
editor = {Vijay K. Madisetti and
Erol Gelenbe and
Jean C. Walrand},
title = {Simulation of Marked Graphs on {SIMD} Architectures Using Efficient
Memory Management},
booktitle = {{MASCOTS} '94, Proceedings of the Second International Workshop on
Modeling, Analysis, and Simulation On Computer and Telecommunication
Systems, January 31 - February 2, 1994, Durham, North Carolina, {USA}},
pages = {343--348},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/MASCOT.1994.284401},
doi = {10.1109/MASCOT.1994.284401},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mascots/SellamiASY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/GaughanY93,
author = {Patrick T. Gaughan and
Sudhakar Yalamanchili},
title = {Adaptive Routing Protocols for Hypercube Interconnection Networks},
journal = {Computer},
volume = {26},
number = {5},
pages = {12--23},
year = {1993},
url = {https://doi.org/10.1109/2.211888},
doi = {10.1109/2.211888},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/GaughanY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GaughanY93,
author = {Patrick T. Gaughan and
Sudhakar Yalamanchili},
title = {Analytical Models of Bandwidth Allocation in Pipelined \emph{k}-ary
\emph{n}-cubes},
booktitle = {The Seventh International Parallel Processing Symposium, Proceedings,
Newport Beach, California, USA, April 13-16, 1993},
pages = {395--400},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IPPS.1993.262915},
doi = {10.1109/IPPS.1993.262915},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GaughanY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/SellamiY93,
author = {Hatem Sellami and
Sudhakar Yalamanchili},
title = {Partitioning and Mapping a Class of Parallel Multiprocessor Simulation
Models},
booktitle = {Proceedings of the Fifth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1993, Dallas, Texas, USA, December 2-5, 1993},
pages = {360--367},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/SPDP.1993.395510},
doi = {10.1109/SPDP.1993.395510},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/SellamiY93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/YalamanchiliWPS93,
author = {Sudhakar Yalamanchili and
Lynn E. Te Winkel and
David L. Perschbacher and
Belle Shenoy},
title = {Genie: An Environment for Partitioning and Mapping in Embedded Multiprocessors},
booktitle = {Proceedings of the Fifth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1993, Dallas, Texas, USA, December 2-5, 1993},
pages = {522--529},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/SPDP.1993.395489},
doi = {10.1109/SPDP.1993.395489},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/YalamanchiliWPS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fgcs/LinOY92,
author = {Eileen Tien Lin and
Edward Omiecinski and
Sudhakar Yalamanchili},
title = {Parallel Optimization and Execution of Large Join Queries},
booktitle = {Proceedings of the International Conference on Fifth Generation Computer
Systems. {FGCS} 1992, June 1-5, Tokyo, Japan},
pages = {907--914},
publisher = {{IOS} Press},
year = {1992},
timestamp = {Wed, 31 Jul 2019 10:45:39 +0200},
biburl = {https://dblp.org/rec/conf/fgcs/LinOY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MohindraY92,
author = {Ajay Mohindra and
Sudhakar Yalamanchili},
editor = {Viktor K. Prasanna and
Larry H. Canter},
title = {Dominant Representations: {A} Paradigm for Mapping Parallel Computations},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium,
Beverly Hills, CA, USA, March 1992},
pages = {67--71},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IPPS.1992.223070},
doi = {10.1109/IPPS.1992.223070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MohindraY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/GaughanY92,
author = {Patrick T. Gaughan and
Sudhakar Yalamanchili},
title = {Pipelined Circuit-Switching: {A} Fault-Tolerant Variant of Wormhole
Routing},
booktitle = {Proceedings of the Fourth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1992, Arlington, Texas, USA, December 1-4, 1992},
pages = {148--155},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/SPDP.1992.242751},
doi = {10.1109/SPDP.1992.242751},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/spdp/GaughanY92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/YoungY91,
author = {Steven D. Young and
Sudhakar Yalamanchili},
title = {Adaptive routing in generalized hypercube architectures},
booktitle = {Proceedings of the Third {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1991, 2-5 December 1991, Dallas, Texas, {USA}},
pages = {564--571},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/SPDP.1991.218249},
doi = {10.1109/SPDP.1991.218249},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/YoungY91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pr/LeeYA87,
author = {S. Y. Lee and
Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {Parallel image normalization on a mesh connected array processor},
journal = {Pattern Recognit.},
volume = {20},
number = {1},
pages = {115--124},
year = {1987},
url = {https://doi.org/10.1016/0031-3203(87)90022-7},
doi = {10.1016/0031-3203(87)90022-7},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pr/LeeYA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/YalamanchiliA87,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {A Characterization and Analysis of Parallel Processor Interconnection
Networks},
journal = {{IEEE} Trans. Computers},
volume = {36},
number = {6},
pages = {680--691},
year = {1987},
url = {https://doi.org/10.1109/TC.1987.1676961},
doi = {10.1109/TC.1987.1676961},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/YalamanchiliA87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/YalamanchiliA85,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {Reconfiguration Strategies for Parallel Architectures},
journal = {Computer},
volume = {18},
number = {12},
pages = {44--61},
year = {1985},
url = {https://doi.org/10.1109/MC.1985.1662776},
doi = {10.1109/MC.1985.1662776},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/YalamanchiliA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pr/YalamanchiliA85,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {Analysis of a model for parallel image processing},
journal = {Pattern Recognit.},
volume = {18},
number = {1},
pages = {1--16},
year = {1985},
url = {https://doi.org/10.1016/0031-3203(85)90002-0},
doi = {10.1016/0031-3203(85)90002-0},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pr/YalamanchiliA85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pr/YalamanchiliA85a,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {A system organization for parallel image processing},
journal = {Pattern Recognit.},
volume = {18},
number = {1},
pages = {17--29},
year = {1985},
url = {https://doi.org/10.1016/0031-3203(85)90003-2},
doi = {10.1016/0031-3203(85)90003-2},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pr/YalamanchiliA85a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/YalamanchiliMA84,
author = {Sudhakar Yalamanchili and
Miroslaw Malek and
Jake K. Aggarwal},
title = {Workstations in a Local Area Network Environment},
journal = {Computer},
volume = {17},
number = {11},
pages = {74--86},
year = {1984},
url = {https://doi.org/10.1109/MC.1984.1659002},
doi = {10.1109/MC.1984.1659002},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/YalamanchiliMA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/prl/YalamanchiliA84,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {Formulation of parallel image processing tasks},
journal = {Pattern Recognit. Lett.},
volume = {2},
number = {4},
pages = {261--270},
year = {1984},
url = {https://doi.org/10.1016/0167-8655(84)90035-7},
doi = {10.1016/0167-8655(84)90035-7},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/prl/YalamanchiliA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icde/YalamanchiliA84,
author = {Sudhakar Yalamanchili and
Jake K. Aggarwal},
title = {Algebraic Properties of some Parallel Processor Interconnection Networks},
booktitle = {Proceedings of the First International Conference on Data Engineering,
April 24-27, 1984, Los Angeles, California, {USA}},
pages = {611--618},
publisher = {{IEEE} Computer Society},
year = {1984},
url = {https://doi.org/10.1109/ICDE.1984.7271326},
doi = {10.1109/ICDE.1984.7271326},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/icde/YalamanchiliA84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cvgip/YalamanchiliMA82,
author = {Sudhakar Yalamanchili and
Worthy N. Martin and
Jake K. Aggarwal},
title = {Extraction of moving object descriptions via differencing},
journal = {Comput. Graph. Image Process.},
volume = {18},
number = {2},
pages = {188--201},
year = {1982},
url = {https://doi.org/10.1016/0146-664X(82)90171-X},
doi = {10.1016/0146-664X(82)90171-X},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cvgip/YalamanchiliMA82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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