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BibTeX records: Hsin-I Wu
@inproceedings{DBLP:conf/aicas/WuWCYT24, author = {You{-}En Wu and Hsin{-}I Wu and Kuo{-}Cheng Chin and Yi{-}Chun Yang and Ren{-}Song Tsay}, title = {Accelerate Large Language Model Inference on Edge {TPU} with OpenVX framework}, booktitle = {6th {IEEE} International Conference on {AI} Circuits and Systems, {AICAS} 2024, Abu Dhabi, United Arab Emirates, April 22-25, 2024}, pages = {502--506}, publisher = {{IEEE}}, year = {2024}, url = {https://doi.org/10.1109/AICAS59952.2024.10595950}, doi = {10.1109/AICAS59952.2024.10595950}, timestamp = {Wed, 31 Jul 2024 16:24:36 +0200}, biburl = {https://dblp.org/rec/conf/aicas/WuWCYT24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aicas/ChinTW22, author = {Hsu{-}Hsun Chin and Ren{-}Song Tsay and Hsin{-}I Wu}, title = {An Adaptive High-Performance Quantization Approach for Resource-Constrained {CNN} Inference}, booktitle = {4th {IEEE} International Conference on Artificial Intelligence Circuits and Systems, {AICAS} 2022, Incheon, Republic of Korea, June 13-15, 2022}, pages = {336--339}, publisher = {{IEEE}}, year = {2022}, url = {https://doi.org/10.1109/AICAS54282.2022.9869850}, doi = {10.1109/AICAS54282.2022.9869850}, timestamp = {Fri, 16 Sep 2022 20:28:36 +0200}, biburl = {https://dblp.org/rec/conf/aicas/ChinTW22.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2107-08382, author = {Hsu{-}Hsun Chin and Ren{-}Song Tsay and Hsin{-}I Wu}, title = {A High-Performance Adaptive Quantization Approach for Edge {CNN} Applications}, journal = {CoRR}, volume = {abs/2107.08382}, year = {2021}, url = {https://arxiv.org/abs/2107.08382}, eprinttype = {arXiv}, eprint = {2107.08382}, timestamp = {Thu, 22 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2107-08382.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2109-04142, author = {Yun Chang and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {An Effective Parallel Program Debugging Approach Based on Timing Annotation}, journal = {CoRR}, volume = {abs/2109.04142}, year = {2021}, url = {https://arxiv.org/abs/2109.04142}, eprinttype = {arXiv}, eprint = {2109.04142}, timestamp = {Tue, 21 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2109-04142.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2109-04148, author = {Li{-}Chun Chen and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {Automatic Timing-Coherent Transactor Generation for Mixed-level Simulations}, journal = {CoRR}, volume = {abs/2109.04148}, year = {2021}, url = {https://arxiv.org/abs/2109.04148}, eprinttype = {arXiv}, eprint = {2109.04148}, timestamp = {Tue, 21 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/corr/abs-2109-04148.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/WuGT20, author = {Hsin{-}I Wu and Da{-}Yi Guo and Ren{-}Song Tsay}, title = {A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {39}, number = {12}, pages = {5211--5224}, year = {2020}, url = {https://doi.org/10.1109/TCAD.2020.2977064}, doi = {10.1109/TCAD.2020.2977064}, timestamp = {Tue, 01 Dec 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tcad/WuGT20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aicas/WuGCT20, author = {Hsin{-}I Wu and Da{-}Yi Guo and Hsu{-}Hsun Chin and Ren{-}Song Tsay}, title = {A Pipeline-Based Scheduler for Optimizing Latency of Convolution Neural Network Inference over Heterogeneous Multicore Systems}, booktitle = {2nd {IEEE} International Conference on Artificial Intelligence Circuits and Systems, {AICAS} 2020, Genova, Italy, August 31 - September 2, 2020}, pages = {46--49}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/AICAS48895.2020.9073977}, doi = {10.1109/AICAS48895.2020.9073977}, timestamp = {Mon, 04 May 2020 09:01:52 +0200}, biburl = {https://dblp.org/rec/conf/aicas/WuGCT20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/gcaiot/LingCWT20, author = {Yin{-}Chun Ling and Hsu{-}Hsun Chin and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {Designing {A} Compact Convolutional Neural Network Processor on Embedded FPGAs}, booktitle = {{IEEE} Global Conference on Artificial Intelligence and Internet of Things, GCAIoT 2020, Dubai, United Arab Emirates, December 12-16, 2020}, pages = {1--7}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/GCAIoT51063.2020.9345903}, doi = {10.1109/GCAIOT51063.2020.9345903}, timestamp = {Wed, 21 Apr 2021 13:48:51 +0200}, biburl = {https://dblp.org/rec/conf/gcaiot/LingCWT20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispa/ChinTW20, author = {Kuo{-}Cheng Chin and Ren{-}Song Tsay and Hsin{-}I Wu}, editor = {Jia Hu and Geyong Min and Nektarios Georgalas and Zhiwei Zhao and Fei Hao and Wang Miao}, title = {A Heuristic Region-based Concurrency Bug Testing Approach}, booktitle = {{IEEE} International Conference on Parallel {\&} Distributed Processing with Applications, Big Data {\&} Cloud Computing, Sustainable Computing {\&} Communications, Social Computing {\&} Networking, ISPA/BDCloud/SocialCom/SustainCom 2020, Exeter, United Kingdom, December 17-19, 2020}, pages = {1126--1135}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISPA-BDCloud-SocialCom-SustainCom51426.2020.00168}, doi = {10.1109/ISPA-BDCLOUD-SOCIALCOM-SUSTAINCOM51426.2020.00168}, timestamp = {Tue, 15 Mar 2022 15:49:18 +0100}, biburl = {https://dblp.org/rec/conf/ispa/ChinTW20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sac/WuTC20, author = {Hsin{-}I Wu and Ren{-}Song Tsay and Hsu{-}Hsun Chin}, editor = {Chih{-}Cheng Hung and Tom{\'{a}}s Cern{\'{y}} and Dongwan Shin and Alessio Bechini}, title = {{VIRA:} a virtualization assisted deterministic system-level simulations}, booktitle = {{SAC} '20: The 35th {ACM/SIGAPP} Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30 - April 3, 2020}, pages = {596--598}, publisher = {{ACM}}, year = {2020}, url = {https://doi.org/10.1145/3341105.3374064}, doi = {10.1145/3341105.3374064}, timestamp = {Thu, 02 Apr 2020 17:08:04 +0200}, biburl = {https://dblp.org/rec/conf/sac/WuTC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi-dat/WuTC20, author = {Hsin{-}I Wu and Ren{-}Song Tsay and Fong{-}Yuan Chang}, title = {{CORONA:} {A} k-COnnected RObust Interconnection Network Generation Algorithm}, booktitle = {2020 International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT} 2020, Hsinchu, Taiwan, August 10-13, 2020}, pages = {1--4}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/VLSI-DAT49148.2020.9196220}, doi = {10.1109/VLSI-DAT49148.2020.9196220}, timestamp = {Tue, 29 Sep 2020 11:35:15 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/WuTC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-2010-11686, author = {Tsung{-}Ying Lu and Hsu{-}Hsun Chin and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {A Very Compact Embedded {CNN} Processor Design Based on Logarithmic Computing}, journal = {CoRR}, volume = {abs/2010.11686}, year = {2020}, url = {https://arxiv.org/abs/2010.11686}, eprinttype = {arXiv}, eprint = {2010.11686}, timestamp = {Tue, 27 Oct 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/corr/abs-2010-11686.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/WuCLT18, author = {Hsin{-}I Wu and Chi{-}Kang Chen and Tsung{-}Ying Lu and Ren{-}Song Tsay}, editor = {Jan Madsen and Ayse K. Coskun}, title = {A highly efficient full-system virtual prototype based on virtualization-assisted approach}, booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018}, pages = {285--288}, publisher = {{IEEE}}, year = {2018}, url = {https://doi.org/10.23919/DATE.2018.8342021}, doi = {10.23919/DATE.2018.8342021}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/WuCLT18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/infocom/WeiWWTLBMG17, author = {Yu{-}Lin Wei and Hsin{-}I Wu and Han{-}Chung Wang and Hsin{-}Mu Tsai and Kate Ching{-}Ju Lin and Rayana Boubezari and Hoa Le Minh and Zabih Ghassemlooy}, title = {LiCompass: Extracting orientation from polarized light}, booktitle = {2017 {IEEE} Conference on Computer Communications, {INFOCOM} 2017, Atlanta, GA, USA, May 1-4, 2017}, pages = {1--9}, publisher = {{IEEE}}, year = {2017}, url = {https://doi.org/10.1109/INFOCOM.2017.8057100}, doi = {10.1109/INFOCOM.2017.8057100}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/infocom/WeiWWTLBMG17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/ChenWHT16, author = {Chi{-}Kang Chen and Hsin{-}I Wu and Chi{-}Ting Hsiao and Ren{-}Song Tsay}, title = {An accurate and flexible early memory system power evaluation approach using a microcomponent method}, booktitle = {Proceedings of the Eleventh {IEEE/ACM/IFIP} International Conference on Hardware/Software Codesign and System Synthesis, {CODES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {3:1--3:8}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968456.2968472}, doi = {10.1145/2968456.2968472}, timestamp = {Sun, 08 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/codes/ChenWHT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ichi/ChenCWT16, author = {Hsuan{-}Man Chen and Chi{-}Kang Chen and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {Poster Paper: An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices}, booktitle = {2016 {IEEE} International Conference on Healthcare Informatics, {ICHI} 2016, Chicago, IL, USA, October 4-7, 2016}, pages = {304}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/ICHI.2016.46}, doi = {10.1109/ICHI.2016.46}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ichi/ChenCWT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ichi/ChenCWT16a, author = {Hsuan{-}Man Chen and Chi{-}Kang Chen and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices}, booktitle = {2016 {IEEE} International Conference on Healthcare Informatics, {ICHI} 2016, Chicago, IL, USA, October 4-7, 2016}, pages = {456--460}, publisher = {{IEEE} Computer Society}, year = {2016}, url = {https://doi.org/10.1109/ICHI.2016.85}, doi = {10.1109/ICHI.2016.85}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ichi/ChenCWT16a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/ChangWPTM15, author = {Jyun{-}Hao Chang and Hsin{-}I Wu and Hsien{-}Lun Pai and Ren{-}Song Tsay and Wai{-}Kei Mak}, title = {Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {34}, number = {11}, pages = {1822--1835}, year = {2015}, url = {https://doi.org/10.1109/TCAD.2015.2434954}, doi = {10.1109/TCAD.2015.2434954}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/ChangWPTM15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ChenWT15, author = {Li{-}Chun Chen and Hsin{-}I Wu and Ren{-}Song Tsay}, title = {Automatic timing-coherent transactor generation for mixed-level simulations}, booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC} 2015, Chiba, Japan, January 19-22, 2015}, pages = {588--593}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/ASPDAC.2015.7059072}, doi = {10.1109/ASPDAC.2015.7059072}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/ChenWT15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mobisys/LeeLWWTL15, author = {Hui{-}Yu Lee and Hao{-}Min Lin and Yu{-}Lin Wei and Hsin{-}I Wu and Hsin{-}Mu Tsai and Kate Ching{-}Ju Lin}, editor = {Gaetano Borriello and Giovanni Pau and Marco Gruteser and Jason I. Hong}, title = {RollingLight: Enabling Line-of-Sight Light-to-Camera Communications}, booktitle = {Proceedings of the 13th Annual International Conference on Mobile Systems, Applications, and Services, MobiSys 2015, Florence, Italy, May 19-22, 2015}, pages = {167--180}, publisher = {{ACM}}, year = {2015}, url = {https://doi.org/10.1145/2742647.2742651}, doi = {10.1145/2742647.2742651}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mobisys/LeeLWWTL15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/YuZHWLT13, author = {Fan{-}Wei Yu and Bo{-}Han Zeng and Yu{-}Hung Huang and Hsin{-}I Wu and Che{-}Rung Lee and Ren{-}Song Tsay}, editor = {Enrico Macii}, title = {A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations}, booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France, March 18-22, 2013}, pages = {643--648}, publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}}, year = {2013}, url = {https://doi.org/10.7873/DATE.2013.140}, doi = {10.7873/DATE.2013.140}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/YuZHWLT13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/HuangLWT12, author = {Yu{-}Hung Huang and Yi{-}Shan Lu and Hsin{-}I Wu and Ren{-}Song Tsay}, editor = {Patrick Groeneveld and Donatella Sciuto and Soha Hassoun}, title = {A non-intrusive timing synchronization interface for hardware-assisted {HW/SW} co-simulation}, booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San Francisco, CA, USA, June 3-7, 2012}, pages = {127--132}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2228360.2228384}, doi = {10.1145/2228360.2228384}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/HuangLWT12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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