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ORCIDBibTeX records: Robert Wille
@inproceedings{DBLP:conf/icaart/KruseDWL24,
author = {Georg Kruse and
Theodora{-}Augustina Dragan and
Robert Wille and
Jeanette Miriam Lorenz},
editor = {Ana Paula Rocha and
Luc Steels and
H. Jaap van den Herik},
title = {Variational Quantum Circuit Design for Quantum Reinforcement Learning
on Continuous Environments},
booktitle = {Proceedings of the 16th International Conference on Agents and Artificial
Intelligence, {ICAART} 2024, Volume 3, Rome, Italy, February 24-26,
2024},
pages = {393--400},
publisher = {{SCITEPRESS}},
year = {2024},
url = {https://doi.org/10.5220/0012353100003636},
doi = {10.5220/0012353100003636},
timestamp = {Thu, 04 Apr 2024 15:53:27 +0200},
biburl = {https://dblp.org/rec/conf/icaart/KruseDWL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LahiriKMBBSBBWD24,
author = {Sneha Lahiri and
Megha Kesh and
Rupsa Mandal and
Anirban Bhattacharjee and
Sovan Bhattacharya and
Dola Sinha and
Chandan Bandyopadhyay and
Laxmidhar Biswal and
Robert Wille and
Rolf Drechsler},
title = {A Dynamic Programming Based Graph Traversal Approach for Efficient
Implementation of Nearest Neighbor Architecture in 2D},
booktitle = {37th International Conference on {VLSI} Design and 23rd International
Conference on Embedded Systems, {VLSID} 2024, Kolkata, India, January
6-10, 2024},
pages = {306--311},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/VLSID60093.2024.00057},
doi = {10.1109/VLSID60093.2024.00057},
timestamp = {Mon, 08 Apr 2024 20:48:39 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/LahiriKMBBSBBWD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2403-07957,
author = {Max Sponner and
Lorenzo Servadei and
Bernd Waschneck and
Robert Wille and
Akash Kumar},
title = {Efficient Post-Training Augmentation for Adaptive Inference in Heterogeneous
and Distributed IoT Environments},
journal = {CoRR},
volume = {abs/2403.07957},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2403.07957},
doi = {10.48550/ARXIV.2403.07957},
eprinttype = {arXiv},
eprint = {2403.07957},
timestamp = {Thu, 04 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2403-07957.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2403-07958,
author = {Max Sponner and
Lorenzo Servadei and
Bernd Waschneck and
Robert Wille and
Akash Kumar},
title = {Temporal Decisions: Leveraging Temporal Correlation for Efficient
Decisions in Early Exit Neural Networks},
journal = {CoRR},
volume = {abs/2403.07958},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2403.07958},
doi = {10.48550/ARXIV.2403.07958},
eprinttype = {arXiv},
eprint = {2403.07958},
timestamp = {Thu, 04 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2403-07958.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2403-10864,
author = {Korbinian Staudacher and
Ludwig Schmid and
Johannes Zeiher and
Robert Wille and
Dieter Kranzlm{\"{u}}ller},
title = {Multi-controlled Phase Gate Synthesis with ZX-calculus applied to
Neutral Atom Hardware},
journal = {CoRR},
volume = {abs/2403.10864},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2403.10864},
doi = {10.48550/ARXIV.2403.10864},
eprinttype = {arXiv},
eprint = {2403.10864},
timestamp = {Wed, 10 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2403-10864.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/apin/MauroMOSWCM23,
author = {Gianfranco Mauro and
Ignacio Martinez{-}Rodriguez and
Julius Ott and
Lorenzo Servadei and
Robert Wille and
Manuel P. Cu{\'{e}}llar and
Diego P. Morales{-}Santos},
title = {Context-adaptable radar-based people counting via few-shot learning},
journal = {Appl. Intell.},
volume = {53},
number = {21},
pages = {25359--25387},
year = {2023},
url = {https://doi.org/10.1007/s10489-023-04778-z},
doi = {10.1007/S10489-023-04778-Z},
timestamp = {Thu, 09 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/apin/MauroMOSWCM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ServadeiLAWHEW23,
author = {Lorenzo Servadei and
Jin Hwa Lee and
Jos{\'{e}} Antonio Arjona{-}Medina and
Michael Werner and
Sepp Hochreiter and
Wolfgang Ecker and
Robert Wille},
title = {Deep Reinforcement Learning for Optimization at Early Design Stages},
journal = {{IEEE} Des. Test},
volume = {40},
number = {1},
pages = {43--51},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2022.3145344},
doi = {10.1109/MDAT.2022.3145344},
timestamp = {Sat, 25 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/ServadeiLAWHEW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/OConnorWPB23,
author = {Ian O'Connor and
Robert Wille and
Andy D. Pimentel and
Valeria Bertacco},
title = {Postpandemic Conferences: The {DATE} 2023 Experience},
journal = {{IEEE} Des. Test},
volume = {40},
number = {5},
pages = {104--112},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2023.3287930},
doi = {10.1109/MDAT.2023.3287930},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/OConnorWPB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/quantum/QuetschlichBW23,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {{MQT} Bench: Benchmarking Software and Design Automation Tools for
Quantum Computing},
journal = {Quantum},
volume = {7},
pages = {1062},
year = {2023},
url = {https://doi.org/10.22331/q-2023-07-20-1062},
doi = {10.22331/Q-2023-07-20-1062},
timestamp = {Thu, 28 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/quantum/QuetschlichBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/smr/MashkoorEWS23,
author = {Atif Mashkoor and
Alexander Egyed and
Robert Wille and
Sebastian Stock},
title = {Model-driven engineering of safety and security software systems:
{A} systematic mapping study and future research directions},
journal = {J. Softw. Evol. Process.},
volume = {35},
number = {7},
year = {2023},
url = {https://doi.org/10.1002/smr.2457},
doi = {10.1002/SMR.2457},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/smr/MashkoorEWS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HuangPCGWLWHS23,
author = {Xing Huang and
Youlin Pan and
Zhen Chen and
Wenzhong Guo and
Lu Wang and
Qingshan Li and
Robert Wille and
Tsung{-}Yi Ho and
Ulf Schlichtmann},
title = {Design Automation for Continuous-Flow Lab-on-a-Chip Systems: {A} One-Pass
Paradigm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {1},
pages = {327--331},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3166105},
doi = {10.1109/TCAD.2022.3166105},
timestamp = {Tue, 21 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/HuangPCGWLWHS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EbnerFW23,
author = {Philipp Ebner and
Gerold Fink and
Robert Wille},
title = {Channel Routing for Microfluidic Devices: {A} Comprehensive and Accessible
Design Tool},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {2},
pages = {533--543},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3179647},
doi = {10.1109/TCAD.2022.3179647},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/EbnerFW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrurlFW23,
author = {Thomas Grurl and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Noise-Aware Quantum Circuit Simulation With Decision Diagrams},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {3},
pages = {860--873},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3182628},
doi = {10.1109/TCAD.2022.3182628},
timestamp = {Sat, 11 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/GrurlFW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BurgholzerPW23,
author = {Lukas Burgholzer and
Alexander Ploier and
Robert Wille},
title = {Simulation Paths for Quantum Circuit Simulation With Decision Diagrams
What to Learn From Tensor Networks, and What Not},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {42},
number = {4},
pages = {1113--1122},
year = {2023},
url = {https://doi.org/10.1109/TCAD.2022.3197969},
doi = {10.1109/TCAD.2022.3197969},
timestamp = {Sun, 16 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BurgholzerPW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SanchezSKWE23,
author = {Daniela S{\'{a}}nchez and
Lorenzo Servadei and
Gamze Naz Kiprit and
Robert Wille and
Wolfgang Ecker},
title = {A Comprehensive Survey on Electronic Design Automation and Graph Neural
Networks: Theory and Applications},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {28},
number = {2},
pages = {15:1--15:27},
year = {2023},
url = {https://doi.org/10.1145/3543853},
doi = {10.1145/3543853},
timestamp = {Wed, 17 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/SanchezSKWE23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SchneiderBW23,
author = {Sarah Schneider and
Lukas Burgholzer and
Robert Wille},
editor = {Atsushi Takahashi},
title = {A {SAT} Encoding for Optimal Clifford Circuit Synthesis},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {190--195},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567929},
doi = {10.1145/3566097.3567929},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SchneiderBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MatoRHW23,
author = {Kevin Mato and
Martin Ringbauer and
Stefan Hillmich and
Robert Wille},
editor = {Atsushi Takahashi},
title = {Compilation of Entangling Gates for High-Dimensional Quantum Systems},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {202--208},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567930},
doi = {10.1145/3566097.3567930},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MatoRHW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BurgholzerW23,
author = {Lukas Burgholzer and
Robert Wille},
editor = {Atsushi Takahashi},
title = {Exploiting Reversible Computing for Verification: Potential, Possible
Paths, and Consequences},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {429--435},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567914},
doi = {10.1145/3566097.3567914},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BurgholzerW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/PehamBW23,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
editor = {Atsushi Takahashi},
title = {Equivalence Checking of Parameterized Quantum Circuits: Verifying
the Compilation of Variational Quantum Algorithms},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {702--708},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567932},
doi = {10.1145/3566097.3567932},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/PehamBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BerentBW23,
author = {Lucas Berent and
Lukas Burgholzer and
Robert Wille},
editor = {Atsushi Takahashi},
title = {Software Tools for Decoding Quantum Low-Density Parity-Check Codes},
booktitle = {Proceedings of the 28th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2023, Tokyo, Japan, January 16-19, 2023},
pages = {709--714},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3566097.3567934},
doi = {10.1145/3566097.3567934},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BerentBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/atmos/EngelsPW23,
author = {Stefan Engels and
Tom Peham and
Robert Wille},
editor = {Daniele Frigioni and
Philine Schiewe},
title = {A Symbolic Design Method for {ETCS} Hybrid Level 3 at Different Degrees
of Accuracy},
booktitle = {23rd Symposium on Algorithmic Approaches for Transportation Modelling,
Optimization, and Systems, {ATMOS} 2023, September 7-8, 2023, Amsterdam,
The Netherlands},
series = {OASIcs},
volume = {115},
pages = {6:1--6:17},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2023},
url = {https://doi.org/10.4230/OASIcs.ATMOS.2023.6},
doi = {10.4230/OASICS.ATMOS.2023.6},
timestamp = {Thu, 31 Aug 2023 16:50:01 +0200},
biburl = {https://dblp.org/rec/conf/atmos/EngelsPW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cilc/PiazzaRW23,
author = {Carla Piazza and
Riccardo Romanello and
Robert Wille},
editor = {Agostino Dovier and
Andrea Formisano},
title = {An {ASP} Approach for the Synthesis of {CNOT} Minimal Quantum Circuits},
booktitle = {Proceedings of the 38th Italian Conference on Computational Logic,
Udine, Italy, June 21-23, 2023},
series = {{CEUR} Workshop Proceedings},
volume = {3428},
publisher = {CEUR-WS.org},
year = {2023},
url = {https://ceur-ws.org/Vol-3428/paper18.pdf},
timestamp = {Wed, 05 Jul 2023 16:52:15 +0200},
biburl = {https://dblp.org/rec/conf/cilc/PiazzaRW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HofmannWSW23,
author = {Simon Toni Hofmann and
Marcel Walter and
Lorenzo Servadei and
Robert Wille},
title = {Late Breaking Results From Hybrid Design Automation for Field-coupled
Nanotechnologies},
booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
CA, USA, July 9-13, 2023},
pages = {1--2},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DAC56929.2023.10247933},
doi = {10.1109/DAC56929.2023.10247933},
timestamp = {Fri, 26 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HofmannWSW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/QuetschlichBW23,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {Compiler Optimization for Quantum Computing Using Reinforcement Learning},
booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
CA, USA, July 9-13, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DAC56929.2023.10248002},
doi = {10.1109/DAC56929.2023.10248002},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/QuetschlichBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SantenWKPPCWA23,
author = {Victor M. van Santen and
Marcel Walter and
Florian Klemme and
Shivendra Singh Parihar and
Girish Pahwa and
Yogesh Singh Chauhan and
Robert Wille and
Hussam Amrouch},
title = {Design Automation for Cryogenic {CMOS} Circuits},
booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
CA, USA, July 9-13, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DAC56929.2023.10247824},
doi = {10.1109/DAC56929.2023.10247824},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/SantenWKPPCWA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FinkCEW23,
author = {Gerold Fink and
Florina Costamoling and
Philipp Ebner and
Robert Wille},
title = {Efficient Simulation of Droplet Merging in Channel-Based Microfluidic
Devices},
booktitle = {26th Euromicro Conference on Digital System Design, {DSD} 2023, Golem,
Albania, September 6-8, 2023},
pages = {539--544},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DSD60849.2023.00080},
doi = {10.1109/DSD60849.2023.00080},
timestamp = {Tue, 02 Apr 2024 21:06:08 +0200},
biburl = {https://dblp.org/rec/conf/dsd/FinkCEW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/EbnerW23,
author = {Philipp Ebner and
Robert Wille},
title = {{CFD} for Microfluidics: {A} Workflow for Setting Up the Simulation
of Microfluidic Devices},
booktitle = {26th Euromicro Conference on Digital System Design, {DSD} 2023, Golem,
Albania, September 6-8, 2023},
pages = {770--775},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DSD60849.2023.00110},
doi = {10.1109/DSD60849.2023.00110},
timestamp = {Tue, 02 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/EbnerW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdg/ArtnerWW23,
author = {Michael Artner and
Guenter Wallner and
Robert Wille},
editor = {Phil Lopes and
Filipe Luz and
Antonios Liapis and
Henrik Engstr{\"{o}}m},
title = {Introducing QRogue: Teaching Quantum Computing Using a Rogue-like
Game Concept},
booktitle = {Proceedings of the 18th International Conference on the Foundations
of Digital Games, {FDG} 2023, Lisbon, Portugal, April 12-14, 2023},
pages = {42:1--42:4},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3582437.3587177},
doi = {10.1145/3582437.3587177},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdg/ArtnerWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/OttSARMLSSSW23,
author = {Julius Ott and
Lorenzo Servadei and
Jose A. Arjona{-}Medina and
Enrico Rinaldi and
Gianfranco Mauro and
Daniela Sanchez Lopera and
Michael Stephan and
Thomas Stadelmayer and
Avik Santra and
Robert Wille},
title = {{MEET:} {A} Monte Carlo Exploration-Exploitation Trade-Off for Buffer
Sampling},
booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing
{ICASSP} 2023, Rhodes Island, Greece, June 4-10, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ICASSP49357.2023.10095236},
doi = {10.1109/ICASSP49357.2023.10095236},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/OttSARMLSSSW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesensors/MitteramskoglerEFWWJ23,
author = {Tina Mitteramskogler and
Rafael Ecker and
Andreas Fuchsluger and
Thomas Wilfinger and
Robert Wille and
Bernhard Jakoby},
title = {Analysis of Liquid Morphologies in Curved Open Microchannels},
booktitle = {2023 {IEEE} SENSORS, Vienna, Austria, October 29 - Nov. 1, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/SENSORS56945.2023.10325291},
doi = {10.1109/SENSORS56945.2023.10325291},
timestamp = {Thu, 14 Dec 2023 11:20:49 +0100},
biburl = {https://dblp.org/rec/conf/ieeesensors/MitteramskoglerEFWWJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/QuetschlichBW23,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {Towards an Automated Framework for Realizing Quantum Computing Solutions},
booktitle = {53rd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2023, Matsue, Japan, May 22-24, 2023},
pages = {134--140},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISMVL57333.2023.00035},
doi = {10.1109/ISMVL57333.2023.00035},
timestamp = {Wed, 28 Jun 2023 15:42:21 +0200},
biburl = {https://dblp.org/rec/conf/ismvl/QuetschlichBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/GrurlFW23,
author = {Thomas Grurl and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Optimized Density Matrix Representations : Improving the Basis for
Noise-Aware Quantum Circuit Design Tools},
booktitle = {53rd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2023, Matsue, Japan, May 22-24, 2023},
pages = {141--146},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISMVL57333.2023.00036},
doi = {10.1109/ISMVL57333.2023.00036},
timestamp = {Wed, 28 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ismvl/GrurlFW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/WilleB23,
author = {Robert Wille and
Lukas Burgholzer},
editor = {David G. Chinnery and
Iris Hui{-}Ru Jiang},
title = {{MQT} {QMAP:} Efficient Quantum Circuit Mapping},
booktitle = {Proceedings of the 2023 International Symposium on Physical Design,
{ISPD} 2023, Virtual Event, USA, March 26-29, 2023},
pages = {198--204},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3569052.3578928},
doi = {10.1145/3569052.3578928},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispd/WilleB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WalterHW23,
author = {Marcel Walter and
Benjamin Hien and
Robert Wille},
title = {Versatile Signal Distribution Networks for Scalable Placement and
Routing of Field-coupled Nanocomputing Technologies},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2023, Foz
do Iguacu, Brazil, June 20-23, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISVLSI59464.2023.10238604},
doi = {10.1109/ISVLSI59464.2023.10238604},
timestamp = {Wed, 13 Sep 2023 08:43:37 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/WalterHW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itsc/SunFSSW23,
author = {Huawei Sun and
Hao Feng and
Georg Stettinger and
Lorenzo Servadei and
Robert Wille},
title = {Multi-Task Cross-Modality Attention-Fusion for 2D Object Detection},
booktitle = {25th {IEEE} International Conference on Intelligent Transportation
Systems, {ITSC} 2022, Macau, China, October 8-12, 2022},
pages = {3619--3626},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ITSC57777.2023.10421802},
doi = {10.1109/ITSC57777.2023.10421802},
timestamp = {Thu, 22 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itsc/SunFSSW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/metroi/SchoberCW23,
author = {Sebastian A. Schober and
Cecilia Carbonelli and
Robert Wille},
title = {An IoT-Based Anomaly Detection and Identification Approach for Gas
Sensor Networks},
booktitle = {2023 {IEEE} International Workshop on Metrology for Industry 4.0 {\&}
IoT, MetroInd4.0{\&}IoT 2023, Brescia, Italy, June 6-8, 2023},
pages = {415--420},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MetroInd4.0IoT57462.2023.10180141},
doi = {10.1109/METROIND4.0IOT57462.2023.10180141},
timestamp = {Mon, 24 Jul 2023 15:59:08 +0200},
biburl = {https://dblp.org/rec/conf/metroi/SchoberCW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/DrewniokWW23,
author = {Jan Drewniok and
Marcel Walter and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based
on Silicon Dangling Bonds},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {5:1--5:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633241},
doi = {10.1145/3611315.3633241},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/DrewniokWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WalterDNWW23,
author = {Marcel Walter and
Jan Drewniok and
Samuel Sze Hang Ng and
Konrad Walus and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Reducing the Complexity of Operational Domain Computation in Silicon
Dangling Bond Logic},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {9:1--9:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633246},
doi = {10.1145/3611315.3633246},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/WalterDNWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/HofmannWW23,
author = {Simon Toni Hofmann and
Marcel Walter and
Robert Wille},
editor = {Ronald Tetzlaff and
Fernando Corinto and
Neil Kemp and
Alon Ascoli and
Andreas M{\"{o}}gel and
Meng{-}Fan Marvin Chang and
Joseph S. Friedman and
Siting Liu and
John Paul Strachan and
Stephan Menzel and
Mehdi B. Tahoori and
Martin Ziegler and
Jason Eshraghian and
Ioannis Messaris and
Christian Koitzsch and
Thomas Mikolajick and
Vasileios G. Ntinas},
title = {Post-Layout Optimization for Field-coupled Nanotechnologies},
booktitle = {Proceedings of the 18th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2023, Dresden, Germany, December 18-20,
2023},
pages = {10:1--10:6},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3611315.3633247},
doi = {10.1145/3611315.3633247},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/HofmannWW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/SanderBW23,
author = {Aaron Sander and
Lukas Burgholzer and
Robert Wille},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {Towards Hamiltonian Simulation with Decision Diagrams},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {283--294},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.00039},
doi = {10.1109/QCE57702.2023.00039},
timestamp = {Fri, 15 Dec 2023 20:24:40 +0100},
biburl = {https://dblp.org/rec/conf/qce/SanderBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/SchulzSRW23,
author = {Martin Schulz and
Laura Brandon Schulz and
Martin Ruefenacht and
Robert Wille},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {Towards the Munich Quantum Software Stack: Enabling Efficient Access
and Tool Support for Quantum Computers},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {399--400},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.10301},
doi = {10.1109/QCE57702.2023.10301},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/qce/SchulzSRW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/QuetschlichKBW23,
author = {Nils Quetschlich and
Vincent Koch and
Lukas Burgholzer and
Robert Wille},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {A Hybrid Classical Quantum Computing Approach to the Satellite Mission
Planning Problem},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {642--647},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.00079},
doi = {10.1109/QCE57702.2023.00079},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/qce/QuetschlichKBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/QuetschlichBW23,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {Reducing the Compilation Time of Quantum Circuits Using Pre-Compilation
on the Gate Level},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {757--767},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.00091},
doi = {10.1109/QCE57702.2023.00091},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/qce/QuetschlichBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/PehamBKWB23,
author = {Tom Peham and
Nina Brandl and
Richard Kueng and
Robert Wille and
Lukas Burgholzer},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {Depth-Optimal Synthesis of Clifford Circuits with {SAT} Solvers},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {802--813},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.00095},
doi = {10.1109/QCE57702.2023.00095},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/qce/PehamBKWB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/MatoHW23,
author = {Kevin Mato and
Stefan Hillmich and
Robert Wille},
editor = {Brian La Cour and
Lia Yeh and
Marek Osinski},
title = {Mixed-Dimensional Quantum Circuit Simulation with Decision Diagrams},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2023, Bellevue, WA, USA, September 17-22, 2023},
pages = {978--989},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QCE57702.2023.00112},
doi = {10.1109/QCE57702.2023.00112},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/qce/MatoHW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qsw/QuetschlichBW23,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
editor = {Shaukat Ali and
Claudio Agostino Ardagna and
Nimanthi L. Atukorala and
Johanna Barzen and
Carl K. Chang and
Rong N. Chang and
Jing Fan and
Ismael Faro and
Sebastian Feld and
Geoffrey Fox and
Zhi Jin and
Frank Leymann and
Florian Neukart and
Salvador de la Puente and
Manuel Wimmer},
title = {Predicting Good Quantum Circuit Compilation Options},
booktitle = {{IEEE} International Conference on Quantum Software, {QSW} 2023, Chicago,
IL, USA, July 2-8, 2023},
pages = {43--53},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QSW59989.2023.00015},
doi = {10.1109/QSW59989.2023.00015},
timestamp = {Thu, 14 Sep 2023 15:14:46 +0200},
biburl = {https://dblp.org/rec/conf/qsw/QuetschlichBW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qsw/PoggelQBWL23,
author = {Benedikt Poggel and
Nils Quetschlich and
Lukas Burgholzer and
Robert Wille and
Jeanette Miriam Lorenz},
editor = {Shaukat Ali and
Claudio Agostino Ardagna and
Nimanthi L. Atukorala and
Johanna Barzen and
Carl K. Chang and
Rong N. Chang and
Jing Fan and
Ismael Faro and
Sebastian Feld and
Geoffrey Fox and
Zhi Jin and
Frank Leymann and
Florian Neukart and
Salvador de la Puente and
Manuel Wimmer},
title = {Recommending Solution Paths for Solving Optimization Problems with
Quantum Computing},
booktitle = {{IEEE} International Conference on Quantum Software, {QSW} 2023, Chicago,
IL, USA, July 2-8, 2023},
pages = {60--67},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QSW59989.2023.00017},
doi = {10.1109/QSW59989.2023.00017},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/qsw/PoggelQBWL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qsw/MatoHW23,
author = {Kevin Mato and
Stefan Hillmich and
Robert Wille},
editor = {Shaukat Ali and
Claudio Agostino Ardagna and
Nimanthi L. Atukorala and
Johanna Barzen and
Carl K. Chang and
Rong N. Chang and
Jing Fan and
Ismael Faro and
Sebastian Feld and
Geoffrey Fox and
Zhi Jin and
Frank Leymann and
Florian Neukart and
Salvador de la Puente and
Manuel Wimmer},
title = {Compression of Qubit Circuits: Mapping to Mixed-Dimensional Quantum
Systems},
booktitle = {{IEEE} International Conference on Quantum Software, {QSW} 2023, Chicago,
IL, USA, July 2-8, 2023},
pages = {155--161},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/QSW59989.2023.00027},
doi = {10.1109/QSW59989.2023.00027},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/qsw/MatoHW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spin/VinkhuijzenGHBWL23,
author = {Lieuwe Vinkhuijzen and
Thomas Grurl and
Stefan Hillmich and
Sebastiaan Brand and
Robert Wille and
Alfons Laarman},
editor = {Georgiana Caltais and
Christian Schilling},
title = {Efficient Implementation of LIMDDs for Quantum Circuit Simulation},
booktitle = {Model Checking Software - 29th International Symposium, {SPIN} 2023,
Paris, France, April 26-27, 2023, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13872},
pages = {3--21},
publisher = {Springer},
year = {2023},
url = {https://doi.org/10.1007/978-3-031-32157-3\_1},
doi = {10.1007/978-3-031-32157-3\_1},
timestamp = {Wed, 17 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/spin/VinkhuijzenGHBWL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GrurlPFW23,
author = {Thomas Grurl and
Christoph Pichler and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Automatic Implementation and Evaluation of Error-Correcting Codes
for Quantum Computing: An Open-Source Framework for Quantum Error
Correction},
booktitle = {36th International Conference on {VLSI} Design and 2023 22nd International
Conference on Embedded Systems, {VLSID} 2023, Hyderabad, India, January
8-12, 2023},
pages = {301--306},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VLSID57277.2023.00068},
doi = {10.1109/VLSID57277.2023.00068},
timestamp = {Sat, 22 Apr 2023 17:02:07 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GrurlPFW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/BerentBDEW23,
author = {Lucas Berent and
Lukas Burgholzer and
Peter{-}Jan H. S. Derks and
Jens Eisert and
Robert Wille},
title = {Dataset containing raw threshold and runtime simulation data for a
paper evaluation on decoding quantum color codes (Version 1)},
publisher = {Zenodo},
year = {2023},
month = mar,
howpublished = {\url{https://doi.org/10.5281/zenodo.7760135}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.7760135},
doi = {10.5281/ZENODO.7760135},
timestamp = {Wed, 20 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/data/10/BerentBDEW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/BerentHEWR23,
author = {Lucas Berent and
Timo Hillmann and
Jens Eisert and
Robert Wille and
Joschka Roffe},
title = {Dataset containing raw simulation data for a paper on decoding bosonic
quantum {LDPC} codes (Version 1)},
publisher = {Zenodo},
year = {2023},
month = nov,
howpublished = {\url{https://doi.org/10.5281/zenodo.10067708}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.10067708},
doi = {10.5281/ZENODO.10067708},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/data/10/BerentHEWR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/SchmidLBZMWR23,
author = {Ludwig Schmid and
David F. Locher and
Sebastian Blatt and
Johannes Zeiher and
Markus M{\"{u}}ller and
Robert Wille and
Manuel Rispler},
title = {Evaluation data for "Computational Capabilities and Compiler
Development for Neutral Atom Quantum Processors - Connecting Tool
Developers and Hardware Experts" (Version 1)},
publisher = {Zenodo},
year = {2023},
month = sep,
howpublished = {\url{https://doi.org/10.5281/zenodo.8347714}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.8347714},
doi = {10.5281/ZENODO.8347714},
timestamp = {Thu, 07 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/data/10/SchmidLBZMWR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/SchmidLBZMWR23a,
author = {Ludwig Schmid and
David F. Locher and
Sebastian Blatt and
Johannes Zeiher and
Markus M{\"{u}}ller and
Robert Wille and
Manuel Rispler},
title = {Evaluation data for "Computational Capabilities and Compiler
Development for Neutral Atom Quantum Processors - Connecting Tool
Developers and Hardware Experts" (Version 2)},
publisher = {Zenodo},
year = {2023},
month = sep,
howpublished = {\url{https://doi.org/10.5281/zenodo.8347911}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.8347911},
doi = {10.5281/ZENODO.8347911},
timestamp = {Thu, 07 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/data/10/SchmidLBZMWR23a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2301-04147,
author = {Robert Wille and
Lukas Burgholzer and
Stefan Hillmich and
Thomas Grurl and
Alexander Ploier and
Tom Peham},
title = {The Basis of Design Tools for Quantum Computing: Arrays, Decision
Diagrams, Tensor Networks, and ZX-Calculus},
journal = {CoRR},
volume = {abs/2301.04147},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2301.04147},
doi = {10.48550/ARXIV.2301.04147},
eprinttype = {arXiv},
eprint = {2301.04147},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2301-04147.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2301-11935,
author = {Robert Wille and
Lukas Burgholzer},
title = {{MQT} {QMAP:} Efficient Quantum Circuit Mapping},
journal = {CoRR},
volume = {abs/2301.11935},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2301.11935},
doi = {10.48550/ARXIV.2301.11935},
eprinttype = {arXiv},
eprint = {2301.11935},
timestamp = {Tue, 31 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2301-11935.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2302-06616,
author = {Lukas Burgholzer and
Alexander Ploier and
Robert Wille},
title = {Tensor Networks or Decision Diagrams? Guidelines for Classical Quantum
Circuit Simulation},
journal = {CoRR},
volume = {abs/2302.06616},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2302.06616},
doi = {10.48550/ARXIV.2302.06616},
eprinttype = {arXiv},
eprint = {2302.06616},
timestamp = {Mon, 20 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2302-06616.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-01674,
author = {Tom Peham and
Nina Brandl and
Richard Kueng and
Robert Wille and
Lukas Burgholzer},
title = {Depth-Optimal Synthesis of Clifford Circuits with {SAT} Solvers},
journal = {CoRR},
volume = {abs/2305.01674},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.01674},
doi = {10.48550/ARXIV.2305.01674},
eprinttype = {arXiv},
eprint = {2305.01674},
timestamp = {Fri, 05 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-01674.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-02337,
author = {Aaron Sander and
Lukas Burgholzer and
Robert Wille},
title = {Towards Hamiltonian Simulation with Decision Diagrams},
journal = {CoRR},
volume = {abs/2305.02337},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.02337},
doi = {10.48550/ARXIV.2305.02337},
eprinttype = {arXiv},
eprint = {2305.02337},
timestamp = {Wed, 10 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-02337.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-07052,
author = {Jagatheesan Kunasaikaran and
Kevin Mato and
Robert Wille},
title = {A Framework for the Design and Realization of Alternative Superconducting
Quantum Architectures},
journal = {CoRR},
volume = {abs/2305.07052},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.07052},
doi = {10.48550/ARXIV.2305.07052},
eprinttype = {arXiv},
eprint = {2305.07052},
timestamp = {Wed, 17 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-07052.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2306-10850,
author = {Sarah Seifi and
Sebastian A. Schober and
Cecilia Carbonelli and
Lorenzo Servadei and
Robert Wille},
title = {Detection of Sensor-To-Sensor Variations using Explainable {AI}},
journal = {CoRR},
volume = {abs/2306.10850},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2306.10850},
doi = {10.48550/ARXIV.2306.10850},
eprinttype = {arXiv},
eprint = {2306.10850},
timestamp = {Thu, 22 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2306-10850.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2307-08339,
author = {Huawei Sun and
Hao Feng and
Georg Stettinger and
Lorenzo Servadei and
Robert Wille},
title = {Multi-Task Cross-Modality Attention-Fusion for 2D Object Detection},
journal = {CoRR},
volume = {abs/2307.08339},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2307.08339},
doi = {10.48550/ARXIV.2307.08339},
eprinttype = {arXiv},
eprint = {2307.08339},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2307-08339.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-02572,
author = {Stefan Engels and
Tom Peham and
Judith Przigoda and
Nils Przigoda and
Robert Wille},
title = {Design Tasks and Their Complexity for Hybrid Level 3 of the European
Train Control System},
journal = {CoRR},
volume = {abs/2308.02572},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2308.02572},
doi = {10.48550/ARXIV.2308.02572},
eprinttype = {arXiv},
eprint = {2308.02572},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2308-02572.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2309-05686,
author = {Max Sponner and
Julius Ott and
Lorenzo Servadei and
Bernd Waschneck and
Robert Wille and
Akash Kumar},
title = {Temporal Patience: Efficient Adaptive Deep Learning for Embedded Radar
Data Processing},
journal = {CoRR},
volume = {abs/2309.05686},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2309.05686},
doi = {10.48550/ARXIV.2309.05686},
eprinttype = {arXiv},
eprint = {2309.05686},
timestamp = {Fri, 15 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2309-05686.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2309-08656,
author = {Ludwig Schmid and
David F. Locher and
Manuel Rispler and
Sebastian Blatt and
Johannes Zeiher and
Markus M{\"{u}}ller and
Robert Wille},
title = {Computational Capabilities and Compiler Development for Neutral Atom
Quantum Processors: Connecting Tool Developers and Hardware Experts},
journal = {CoRR},
volume = {abs/2309.08656},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2309.08656},
doi = {10.48550/ARXIV.2309.08656},
eprinttype = {arXiv},
eprint = {2309.08656},
timestamp = {Tue, 26 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2309-08656.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2310-05557,
author = {Michel Takken and
Robert Wille},
title = {Accelerating {CFD} Simulations of Microfluidic Devices by Exploiting
Higher Levels of Abstraction},
journal = {CoRR},
volume = {abs/2310.05557},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2310.05557},
doi = {10.48550/ARXIV.2310.05557},
eprinttype = {arXiv},
eprint = {2310.05557},
timestamp = {Tue, 24 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2310-05557.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2311-01328,
author = {Lucas Berent and
Timo Hillmann and
Jens Eisert and
Robert Wille and
Joschka Roffe},
title = {Analog information decoding of bosonic quantum {LDPC} codes},
journal = {CoRR},
volume = {abs/2311.01328},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2311.01328},
doi = {10.48550/ARXIV.2311.01328},
eprinttype = {arXiv},
eprint = {2311.01328},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2311-01328.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2311-12042,
author = {Marcel Walter and
Jeremiah Croshaw and
Samuel Sze Hang Ng and
Konrad Walus and
Robert A. Wolkow and
Robert Wille},
title = {Atomic Defect-Aware Physical Design of Silicon Dangling Bond Logic
on the H-Si(100)2x1 Surface},
journal = {CoRR},
volume = {abs/2311.12042},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2311.12042},
doi = {10.48550/ARXIV.2311.12042},
eprinttype = {arXiv},
eprint = {2311.12042},
timestamp = {Wed, 29 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2311-12042.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2311-14164,
author = {Ludwig Schmid and
Sunghye Park and
Seokhyeong Kang and
Robert Wille},
title = {Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational
Capabilities of Neutral Atom Quantum Computers},
journal = {CoRR},
volume = {abs/2311.14164},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2311.14164},
doi = {10.48550/ARXIV.2311.14164},
eprinttype = {arXiv},
eprint = {2311.14164},
timestamp = {Wed, 29 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2311-14164.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/FinkMHJW22,
author = {Gerold Fink and
Tina Mitteramskogler and
Marcus A. Hinterm{\"{u}}ller and
Bernhard Jakoby and
Robert Wille},
title = {Automatic Design of Microfluidic Gradient Generators},
journal = {{IEEE} Access},
volume = {10},
pages = {28155--28164},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3158327},
doi = {10.1109/ACCESS.2022.3158327},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/FinkMHJW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/array/BurgholzerWK22,
author = {Lukas Burgholzer and
Robert Wille and
Richard Kueng},
title = {Characteristics of reversible circuits for error detection},
journal = {Array},
volume = {14},
pages = {100165},
year = {2022},
url = {https://doi.org/10.1016/j.array.2022.100165},
doi = {10.1016/J.ARRAY.2022.100165},
timestamp = {Mon, 25 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/array/BurgholzerWK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/VieiraNWWW0NN22,
author = {Maria D. Vieira and
Samuel S. H. Ng and
Marcel Walter and
Robert Wille and
Konrad Walus and
Ricardo S. Ferreira and
Omar P. Vilela Neto and
Jos{\'{e}} Augusto Miranda Nacif},
title = {Three-Input {NPN} Class Gate Library for Atomic Silicon Quantum Dots},
journal = {{IEEE} Des. Test},
volume = {39},
number = {6},
pages = {147--155},
year = {2022},
url = {https://doi.org/10.1109/MDAT.2022.3189814},
doi = {10.1109/MDAT.2022.3189814},
timestamp = {Tue, 06 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/VieiraNWWW0NN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/PehamBW22,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
title = {Equivalence Checking of Quantum Circuits With the ZX-Calculus},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {12},
number = {3},
pages = {662--675},
year = {2022},
url = {https://doi.org/10.1109/JETCAS.2022.3202204},
doi = {10.1109/JETCAS.2022.3202204},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esticas/PehamBW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/WilleD22,
author = {Robert Wille and
Rolf Drechsler},
title = {Introduction to the Special Issue on Design Automation for Quantum
Computing},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {18},
number = {1},
pages = {10:1--10:2},
year = {2022},
url = {https://doi.org/10.1145/3485041},
doi = {10.1145/3485041},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/WilleD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sensors/TakkenW22,
author = {Michel Takken and
Robert Wille},
title = {Simulation of Pressure-Driven and Channel-Based Microfluidics on Different
Abstract Levels: {A} Case Study},
journal = {Sensors},
volume = {22},
number = {14},
pages = {5392},
year = {2022},
url = {https://doi.org/10.3390/s22145392},
doi = {10.3390/S22145392},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sensors/TakkenW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/simpa/FinkCW22,
author = {Gerold Fink and
Florina Costamoling and
Robert Wille},
title = {{MMFT} Droplet Simulator: Efficient Simulation of Droplet-based Microfluidic
Devices},
journal = {Softw. Impacts},
volume = {14},
pages = {100440},
year = {2022},
url = {https://doi.org/10.1016/j.simpa.2022.100440},
doi = {10.1016/J.SIMPA.2022.100440},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/simpa/FinkCW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/simpa/AdarshBMW22,
author = {Smaran Adarsh and
Lukas Burgholzer and
Tanmay Manjunath and
Robert Wille},
title = {SyReC Synthesizer: An {MQT} tool for synthesis of reversible circuits},
journal = {Softw. Impacts},
volume = {14},
pages = {100451},
year = {2022},
url = {https://doi.org/10.1016/j.simpa.2022.100451},
doi = {10.1016/J.SIMPA.2022.100451},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/simpa/AdarshBMW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ElnaggarSMWEC22,
author = {Rana Elnaggar and
Lorenzo Servadei and
Shubham Mathur and
Robert Wille and
Wolfgang Ecker and
Krishnendu Chakrabarty},
title = {Accurate and Robust Malware Detection: Running XGBoost on Runtime
Data From Performance Counters},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {7},
pages = {2066--2079},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2021.3102007},
doi = {10.1109/TCAD.2021.3102007},
timestamp = {Tue, 28 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ElnaggarSMWEC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PoddarFHW22,
author = {Sudip Poddar and
Gerold Fink and
Werner Haselmayr and
Robert Wille},
title = {A Generic Sample Preparation Approach for Different Microfluidic Labs-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {11},
pages = {4612--4625},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2021.3135323},
doi = {10.1109/TCAD.2021.3135323},
timestamp = {Sun, 13 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/PoddarFHW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/FinkEPW22,
author = {Gerold Fink and
Philipp Ebner and
Sudip Poddar and
Robert Wille},
title = {Improving the Robustness of Microfluidic Networks},
booktitle = {27th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2022, Taipei, Taiwan, January 17-20, 2022},
pages = {68--73},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASP-DAC52403.2022.9712527},
doi = {10.1109/ASP-DAC52403.2022.9712527},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/FinkEPW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BurgholzerSW22,
author = {Lukas Burgholzer and
Sarah Schneider and
Robert Wille},
title = {Limiting the Search Space in Optimal Quantum Circuit Mapping},
booktitle = {27th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2022, Taipei, Taiwan, January 17-20, 2022},
pages = {466--471},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASP-DAC52403.2022.9712555},
doi = {10.1109/ASP-DAC52403.2022.9712555},
timestamp = {Fri, 04 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BurgholzerSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/civemsa/SchoberCW22,
author = {Sebastian A. Schober and
Cecilia Carbonelli and
Robert Wille},
title = {Gas Discrimination Analysis of Neural Network Algorithms for a Graphene-Based
Electronic Nose},
booktitle = {{IEEE} 9th International Conference on Computational Intelligence
and Virtual Environments for Measurement Systems and Applications,
{CIVEMSA} 2022, Chemnitz, Germany, June 15-17, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CIVEMSA53371.2022.9853696},
doi = {10.1109/CIVEMSA53371.2022.9853696},
timestamp = {Tue, 23 Aug 2022 11:53:03 +0200},
biburl = {https://dblp.org/rec/conf/civemsa/SchoberCW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PehamBW22,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
editor = {Rob Oshana},
title = {Equivalence checking paradigms in quantum circuit design: a case study},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {517--522},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530480},
doi = {10.1145/3489517.3530480},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/PehamBW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BurgholzerW22,
author = {Lukas Burgholzer and
Robert Wille},
editor = {Rob Oshana},
title = {Handling non-unitaries in quantum circuit equivalence checking},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {529--534},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530482},
doi = {10.1145/3489517.3530482},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BurgholzerW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WalterNWW22,
author = {Marcel Walter and
Samuel Sze Hang Ng and
Konrad Walus and
Robert Wille},
editor = {Rob Oshana},
title = {Hexagons are the bestagons: design automation for silicon dangling
bond logic},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {739--744},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530525},
doi = {10.1145/3489517.3530525},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WalterNWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WilleBHGPP22,
author = {Robert Wille and
Lukas Burgholzer and
Stefan Hillmich and
Thomas Grurl and
Alexander Ploier and
Tom Peham},
editor = {Rob Oshana},
title = {The basis of design tools for quantum computing: arrays, decision
diagrams, tensor networks, and ZX-calculus},
booktitle = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
California, USA, July 10 - 14, 2022},
pages = {1367--1370},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3489517.3530627},
doi = {10.1145/3489517.3530627},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/WilleBHGPP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FinkEW22,
author = {Gerold Fink and
Philipp Ebner and
Robert Wille},
editor = {Cristiana Bolchini and
Ingrid Verbauwhede and
Ioana Vatajelu},
title = {Comprehensive and Accessible Channel Routing for Microfluidic Devices},
booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
pages = {44--47},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.23919/DATE54114.2022.9774746},
doi = {10.23919/DATE54114.2022.9774746},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/FinkEW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BurgholzerPW22,
author = {Lukas Burgholzer and
Alexander Ploier and
Robert Wille},
editor = {Cristiana Bolchini and
Ingrid Verbauwhede and
Ioana Vatajelu},
title = {Exploiting Arbitrary Paths for the Simulation of Quantum Circuits
with Decision Diagrams},
booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
pages = {64--67},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.23919/DATE54114.2022.9774631},
doi = {10.23919/DATE54114.2022.9774631},
timestamp = {Wed, 25 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BurgholzerPW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/FinkHHW22,
author = {Gerold Fink and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {A Concept Towards Pressure-Controlled Microfluidic Networks},
booktitle = {25th International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2022, Prague, Czech Republic, April
6-8, 2022},
pages = {118--123},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DDECS54261.2022.9770111},
doi = {10.1109/DDECS54261.2022.9770111},
timestamp = {Fri, 13 May 2022 16:17:42 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/FinkHHW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dexaw/BuhlerTNWFRW22,
author = {Katja B{\"{u}}hler and
Cornelia Travnicek and
Veronika Nowak and
Edgar R. Weippl and
Lukas Fischer and
Rudolf Ramler and
Robert Wille},
editor = {Gabriele Kotsis and
A Min Tjoa and
Ismail Khalil and
Bernhard Moser and
Alfred Taudes and
Atif Mashkoor and
Johannes Sametinger and
Jorge Mart{\'{\i}}nez Gil and
Florian Sobieczky and
Lukas Fischer and
Rudolf Ramler and
Maqbool Khan and
Gerald Czech},
title = {Twenty Years of Successful Translational Research: {A} Case Study
of Three {COMET} Centers},
booktitle = {Database and Expert Systems Applications - {DEXA} 2022 Workshops -
33rd International Conference, {DEXA} 2022, Vienna, Austria, August
22-24, 2022, Proceedings},
series = {Communications in Computer and Information Science},
volume = {1633},
pages = {155--166},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-14343-4\_15},
doi = {10.1007/978-3-031-14343-4\_15},
timestamp = {Sat, 19 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dexaw/BuhlerTNWFRW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ServadeiSOSHSLW22,
author = {Lorenzo Servadei and
Huawei Sun and
Julius Ott and
Michael Stephan and
Souvik Hazra and
Thomas Stadelmayer and
Daniela Sanchez Lopera and
Robert Wille and
Avik Santra},
title = {Label-Aware Ranked Loss for Robust People Counting Using Automotive
In-Cabin Radar},
booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing,
{ICASSP} 2022, Virtual and Singapore, 23-27 May 2022},
pages = {3883--3887},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICASSP43922.2022.9747621},
doi = {10.1109/ICASSP43922.2022.9747621},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/ServadeiSOSHSLW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmla/OttSMSSW22,
author = {Julius Ott and
Lorenzo Servadei and
Gianfranco Mauro and
Thomas Stadelmayer and
Avik Santra and
Robert Wille},
editor = {M. Arif Wani and
Mehmed M. Kantardzic and
Vasile Palade and
Daniel Neagu and
Longzhi Yang and
Kit Yan Chan},
title = {Uncertainty-based Meta-Reinforcement Learning for Robust Radar Tracking},
booktitle = {21st {IEEE} International Conference on Machine Learning and Applications,
{ICMLA} 2022, Nassau, Bahamas, December 12-14, 2022},
pages = {1476--1483},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICMLA55696.2022.00232},
doi = {10.1109/ICMLA55696.2022.00232},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmla/OttSMSSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmla/SunSFSSW22,
author = {Huawei Sun and
Lorenzo Servadei and
Hao Feng and
Michael Stephan and
Avik Santra and
Robert Wille},
editor = {M. Arif Wani and
Mehmed M. Kantardzic and
Vasile Palade and
Daniel Neagu and
Longzhi Yang and
Kit Yan Chan},
title = {Utilizing Explainable {AI} for improving the Performance of Neural
Networks},
booktitle = {21st {IEEE} International Conference on Machine Learning and Applications,
{ICMLA} 2022, Nassau, Bahamas, December 12-14, 2022},
pages = {1775--1782},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICMLA55696.2022.00271},
doi = {10.1109/ICMLA55696.2022.00271},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmla/SunSFSSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesam/HazraFKSSWWS22,
author = {Souvik Hazra and
Hao Feng and
Gamze Naz Kiprit and
Michael Stephan and
Lorenzo Servadei and
Robert Wille and
Robert Weigel and
Avik Santra},
title = {Cross-modal Learning of Graph Representations using Radar Point Cloud
for Long-Range Gesture Recognition},
booktitle = {12th {IEEE} Sensor Array and Multichannel Signal Processing Workshop,
{SAM} 2022, Trondheim, Norway, June 20-23, 2022},
pages = {350--354},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SAM53842.2022.9827785},
doi = {10.1109/SAM53842.2022.9827785},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieeesam/HazraFKSSWWS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesensors/GoswamiBBBAHLSW22,
author = {Somu Goswami and
Christian Bretthauer and
Andreas Bogner and
Abhiraj Basavanna and
Sebastian Anzinger and
Marco Haubold and
Gunar Lorenz and
Johann Strasser and
Daniel Weber and
Lorenzo Servadei and
Robert Wille},
title = {Compact High-Performance Vibration Sensor Based on Single-Backplate
{MEMS} Technology},
booktitle = {2022 {IEEE} Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SENSORS52175.2022.9967323},
doi = {10.1109/SENSORS52175.2022.9967323},
timestamp = {Mon, 30 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieeesensors/GoswamiBBBAHLSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BiukiMWS22,
author = {Amirmohammad Biuki and
Naser Mohammadzadeh and
Robert Wille and
Sahar Sargaran},
title = {Exact Mapping of Quantum Circuit Partitions to Building Blocks of
the {SAQIP} Architecture},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2022, Nicosia,
Cyprus, July 4-6, 2022},
pages = {402--405},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISVLSI54635.2022.00090},
doi = {10.1109/ISVLSI54635.2022.00090},
timestamp = {Tue, 25 Oct 2022 21:20:51 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/BiukiMWS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/WalterW22,
author = {Marcel Walter and
Robert Wille},
editor = {Christof Teuscher and
Jie Han},
title = {Efficient Multi-Path Signal Routing for Field-coupled Nanotechnologies},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {7:1--7:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572539},
doi = {10.1145/3565478.3572539},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/WalterW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LambooyWW22,
author = {Willem Lambooy and
Marcel Walter and
Robert Wille},
editor = {Christof Teuscher and
Jie Han},
title = {Exploiting the Third Dimension: Stackable Quantum-dot Cellular Automata},
booktitle = {Proceedings of the 17th {ACM} International Symposium on Nanoscale
Architectures, {NANOARCH} 2022, Virtual, OR, USA, December 7-9, 2022},
pages = {9:1--9:6},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3565478.3572529},
doi = {10.1145/3565478.3572529},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/LambooyWW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/MatoRHW22,
author = {Kevin Mato and
Martin Ringbauer and
Stefan Hillmich and
Robert Wille},
title = {Adaptive Compilation of Multi-Level Quantum Operations},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2022, Broomfield, CO, USA, September 18-23, 2022},
pages = {484--491},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/QCE53715.2022.00070},
doi = {10.1109/QCE53715.2022.00070},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/qce/MatoRHW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/HillmichBSW22,
author = {Stefan Hillmich and
Lukas Burgholzer and
Florian St{\"{o}}gm{\"{u}}ller and
Robert Wille},
editor = {Claudio Antares Mezzina and
Krzysztof Podlaski},
title = {Reordering Decision Diagrams for Quantum Computing Is Harder Than
You Might Think},
booktitle = {Reversible Computation - 14th International Conference, {RC} 2022,
Urbino, Italy, July 5-6, 2022, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13354},
pages = {93--107},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-09005-9\_7},
doi = {10.1007/978-3-031-09005-9\_7},
timestamp = {Mon, 25 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/HillmichBSW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rssrail/PehamPPW22,
author = {Tom Peham and
Judith Przigoda and
Nils Przigoda and
Robert Wille},
editor = {Simon Collart Dutilleul and
Anne E. Haxthausen and
Thierry Lecomte},
title = {Optimal Railway Routing Using Virtual Subsections},
booktitle = {Reliability, Safety, and Security of Railway Systems. Modelling, Analysis,
Verification, and Certification - 4th International Conference, RSSRail
2022, Paris, France, June 1-2, 2022, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13294},
pages = {63--79},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-05814-1\_5},
doi = {10.1007/978-3-031-05814-1\_5},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rssrail/PehamPPW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sat/BerentBW22,
author = {Lucas Berent and
Lukas Burgholzer and
Robert Wille},
editor = {Kuldeep S. Meel and
Ofer Strichman},
title = {Towards a {SAT} Encoding for Quantum Circuits: {A} Journey From Classical
Circuits to Clifford Circuits and Beyond},
booktitle = {25th International Conference on Theory and Applications of Satisfiability
Testing, {SAT} 2022, August 2-5, 2022, Haifa, Israel},
series = {LIPIcs},
volume = {236},
pages = {18:1--18:17},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2022},
url = {https://doi.org/10.4230/LIPIcs.SAT.2022.18},
doi = {10.4230/LIPICS.SAT.2022.18},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sat/BerentBW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-00698,
author = {Lucas Berent and
Lukas Burgholzer and
Robert Wille},
title = {Towards a {SAT} Encoding for Quantum Circuits: {A} Journey From Classical
Circuits to Clifford Circuits and Beyond},
journal = {CoRR},
volume = {abs/2203.00698},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.00698},
doi = {10.48550/ARXIV.2203.00698},
eprinttype = {arXiv},
eprint = {2203.00698},
timestamp = {Wed, 16 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-00698.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-00703,
author = {Lukas Burgholzer and
Alexander Ploier and
Robert Wille},
title = {Simulation Paths for Quantum Circuit Simulation with Decision Diagrams},
journal = {CoRR},
volume = {abs/2203.00703},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.00703},
doi = {10.48550/ARXIV.2203.00703},
eprinttype = {arXiv},
eprint = {2203.00703},
timestamp = {Wed, 16 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-00703.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2203-17066,
author = {Souvik Hazra and
Hao Feng and
Gamze Naz Kiprit and
Michael Stephan and
Lorenzo Servadei and
Robert Wille and
Robert Weigel and
Avik Santra},
title = {Cross-modal Learning of Graph Representations using Radar Point Cloud
for Long-Range Gesture Recognition},
journal = {CoRR},
volume = {abs/2203.17066},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2203.17066},
doi = {10.48550/ARXIV.2203.17066},
eprinttype = {arXiv},
eprint = {2203.17066},
timestamp = {Tue, 05 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2203-17066.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2204-13719,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {{MQT} Bench: Benchmarking Software and Design Automation Tools for
Quantum Computing},
journal = {CoRR},
volume = {abs/2204.13719},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2204.13719},
doi = {10.48550/ARXIV.2204.13719},
eprinttype = {arXiv},
eprint = {2204.13719},
timestamp = {Mon, 02 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2204-13719.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2208-11713,
author = {Sarah Schneider and
Lukas Burgholzer and
Robert Wille},
title = {A {SAT} Encoding for Optimal Clifford Circuit Synthesis},
journal = {CoRR},
volume = {abs/2208.11713},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2208.11713},
doi = {10.48550/ARXIV.2208.11713},
eprinttype = {arXiv},
eprint = {2208.11713},
timestamp = {Mon, 29 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2208-11713.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2208-12820,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
title = {Equivalence Checking of Quantum Circuits with the ZX-Calculus},
journal = {CoRR},
volume = {abs/2208.12820},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2208.12820},
doi = {10.48550/ARXIV.2208.12820},
eprinttype = {arXiv},
eprint = {2208.12820},
timestamp = {Thu, 01 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2208-12820.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-01180,
author = {Lucas Berent and
Lukas Burgholzer and
Robert Wille},
title = {Software Tools for Decoding Quantum Low-Density Parity Check Codes},
journal = {CoRR},
volume = {abs/2209.01180},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.01180},
doi = {10.48550/ARXIV.2209.01180},
eprinttype = {arXiv},
eprint = {2209.01180},
timestamp = {Thu, 29 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-01180.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-04686,
author = {Huawei Sun and
Lorenzo Servadei and
Hao Feng and
Michael Stephan and
Robert Wille and
Avik Santra},
title = {Utilizing Explainable {AI} for improving the Performance of Neural
Networks},
journal = {CoRR},
volume = {abs/2210.04686},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.04686},
doi = {10.48550/ARXIV.2210.04686},
eprinttype = {arXiv},
eprint = {2210.04686},
timestamp = {Thu, 13 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-04686.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-08027,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {Predicting Good Quantum Circuit Compilation Options},
journal = {CoRR},
volume = {abs/2210.08027},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.08027},
doi = {10.48550/ARXIV.2210.08027},
eprinttype = {arXiv},
eprint = {2210.08027},
timestamp = {Wed, 19 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-08027.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-09321,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
title = {On Optimal Subarchitectures for Quantum Circuit Mapping},
journal = {CoRR},
volume = {abs/2210.09321},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.09321},
doi = {10.48550/ARXIV.2210.09321},
eprinttype = {arXiv},
eprint = {2210.09321},
timestamp = {Tue, 25 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-09321.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-12166,
author = {Tom Peham and
Lukas Burgholzer and
Robert Wille},
title = {Equivalence Checking of Parameterized Quantum Circuits: Verifying
the Compilation of Variational Quantum Algorithms},
journal = {CoRR},
volume = {abs/2210.12166},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.12166},
doi = {10.48550/ARXIV.2210.12166},
eprinttype = {arXiv},
eprint = {2210.12166},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-12166.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-13545,
author = {Julius Ott and
Lorenzo Servadei and
Jose A. Arjona{-}Medina and
Enrico Rinaldi and
Gianfranco Mauro and
Daniela Sanchez Lopera and
Michael Stephan and
Thomas Stadelmayer and
Avik Santra and
Robert Wille},
title = {{MEET:} {A} Monte Carlo Exploration-Exploitation Trade-off for Buffer
Sampling},
journal = {CoRR},
volume = {abs/2210.13545},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.13545},
doi = {10.48550/ARXIV.2210.13545},
eprinttype = {arXiv},
eprint = {2210.13545},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-13545.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-14532,
author = {Julius Ott and
Lorenzo Servadei and
Gianfranco Mauro and
Thomas Stadelmayer and
Avik Santra and
Robert Wille},
title = {Uncertainty-based Meta-Reinforcement Learning for Robust Radar Tracking},
journal = {CoRR},
volume = {abs/2210.14532},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.14532},
doi = {10.48550/ARXIV.2210.14532},
eprinttype = {arXiv},
eprint = {2210.14532},
timestamp = {Mon, 31 Oct 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-14532.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-14928,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {Towards an Automated Framework for Realizing Quantum Computing Solutions},
journal = {CoRR},
volume = {abs/2210.14928},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.14928},
doi = {10.48550/ARXIV.2210.14928},
eprinttype = {arXiv},
eprint = {2210.14928},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-14928.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-04508,
author = {Nils Quetschlich and
Lukas Burgholzer and
Robert Wille},
title = {Compiler Optimization for Quantum Computing Using Reinforcement Learning},
journal = {CoRR},
volume = {abs/2212.04508},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.04508},
doi = {10.48550/ARXIV.2212.04508},
eprinttype = {arXiv},
eprint = {2212.04508},
timestamp = {Mon, 02 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-04508.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-05903,
author = {Smaran Adarsh and
Lukas Burgholzer and
Tanmay Manjunath and
Robert Wille},
title = {SyReC Synthesizer: An {MQT} tool for synthesis of reversible circuits},
journal = {CoRR},
volume = {abs/2212.05903},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.05903},
doi = {10.48550/ARXIV.2212.05903},
eprinttype = {arXiv},
eprint = {2212.05903},
timestamp = {Mon, 02 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-05903.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/BhattacharjeeBM21,
author = {Anirban Bhattacharjee and
Chandan Bandyopadhyay and
Angshu Mukherjee and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {An ant colony based mapping of quantum circuits to nearest neighbor
architectures},
journal = {Integr.},
volume = {78},
pages = {11--24},
year = {2021},
url = {https://doi.org/10.1016/j.vlsi.2020.12.002},
doi = {10.1016/J.VLSI.2020.12.002},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/BhattacharjeeBM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qip/GemeinhardtWW21,
author = {Felix Gemeinhardt and
Robert Wille and
Manuel Wimmer},
title = {Quantum k-community detection: algorithm proposals and cross-architectural
evaluation},
journal = {Quantum Inf. Process.},
volume = {20},
number = {9},
pages = {302},
year = {2021},
url = {https://doi.org/10.1007/s11128-021-03239-1},
doi = {10.1007/S11128-021-03239-1},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qip/GemeinhardtWW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/simpa/BurgholzerW21,
author = {Lukas Burgholzer and
Robert Wille},
title = {{QCEC:} {A} {JKQ} tool for quantum circuit equivalence checking},
journal = {Softw. Impacts},
volume = {7},
pages = {100051},
year = {2021},
url = {https://doi.org/10.1016/j.simpa.2020.100051},
doi = {10.1016/J.SIMPA.2020.100051},
timestamp = {Sat, 21 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/simpa/BurgholzerW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShayanBWCK21,
author = {Mohammed Shayan and
Sukanta Bhattacharjee and
Robert Wille and
Krishnendu Chakrabarty and
Ramesh Karri},
title = {How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips?},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {40},
number = {1},
pages = {143--156},
year = {2021},
url = {https://doi.org/10.1109/TCAD.2020.2988351},
doi = {10.1109/TCAD.2020.2988351},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShayanBWCK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FinkHHW21,
author = {Gerold Fink and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Automatic Design of Droplet-Based Microfluidic Ring Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {40},
number = {2},
pages = {339--349},
year = {2021},
url = {https://doi.org/10.1109/TCAD.2020.2997000},
doi = {10.1109/TCAD.2020.2997000},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FinkHHW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BurgholzerW21,
author = {Lukas Burgholzer and
Robert Wille},
title = {Advanced Equivalence Checking for Quantum Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {40},
number = {9},
pages = {1810--1824},
year = {2021},
url = {https://doi.org/10.1109/TCAD.2020.3032630},
doi = {10.1109/TCAD.2020.3032630},
timestamp = {Wed, 01 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BurgholzerW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DebDW21,
author = {Arighna Deb and
Gerhard W. Dueck and
Robert Wille},
title = {Exploring the Potential Benefits of Alternative Quantum Computing
Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {40},
number = {9},
pages = {1825--1835},
year = {2021},
url = {https://doi.org/10.1109/TCAD.2020.3032072},
doi = {10.1109/TCAD.2020.3032072},
timestamp = {Wed, 01 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DebDW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/PoddarBWB20,
author = {Sudip Poddar and
Tapalina Banerjee and
Robert Wille and
Bhargab B. Bhattacharya},
title = {Robust Multi-Target Sample Preparation on {MEDA} Biochips Obviating
Waste Production},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {26},
number = {1},
pages = {7:1--7:29},
year = {2021},
url = {https://doi.org/10.1145/3414061},
doi = {10.1145/3414061},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/PoddarBWB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MohammadzadehWK21,
author = {Naser Mohammadzadeh and
Robert Wille and
Oliver Kesz{\"{o}}cze},
title = {Efficient One-pass Synthesis for Digital Microfluidic Biochips},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {26},
number = {4},
pages = {27:1--27:21},
year = {2021},
url = {https://doi.org/10.1145/3446880},
doi = {10.1145/3446880},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/MohammadzadehWK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/FinkEHHW21,
author = {Gerold Fink and
Philipp Ebner and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Accurate and Efficient Simulation of Microfluidic Networks},
booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
Tokyo, Japan, January 18-21, 2021},
pages = {85--90},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3394885.3431608},
doi = {10.1145/3394885.3431608},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/FinkEHHW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WalterHWTD21,
author = {Marcel Walter and
Winston Haaswijk and
Robert Wille and
Frank Sill Torres and
Rolf Drechsler},
title = {One-pass Synthesis for Field-coupled Nanocomputing Technologies},
booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
Tokyo, Japan, January 18-21, 2021},
pages = {574--580},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3394885.3431607},
doi = {10.1145/3394885.3431607},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WalterHWTD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BurgholzerKW21,
author = {Lukas Burgholzer and
Richard Kueng and
Robert Wille},
title = {Random Stimuli Generation for the Verification of Quantum Circuits},
booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
Tokyo, Japan, January 18-21, 2021},
pages = {767--772},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3394885.3431590},
doi = {10.1145/3394885.3431590},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BurgholzerKW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HillmichZW21,
author = {Stefan Hillmich and
Alwin Zulehner and
Robert Wille},
title = {Exploiting Quantum Teleportation in Quantum Circuit Mapping},
booktitle = {{ASPDAC} '21: 26th Asia and South Pacific Design Automation Conference,
Tokyo, Japan, January 18-21, 2021},
pages = {792--797},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3394885.3431604},
doi = {10.1145/3394885.3431604},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HillmichZW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HillmichKMW21,
author = {Stefan Hillmich and
Richard Kueng and
Igor L. Markov and
Robert Wille},
title = {As Accurate as Needed, as Efficient as Possible: Approximations in
DD-based Quantum Circuit Simulation},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {188--193},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474034},
doi = {10.23919/DATE51398.2021.9474034},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/HillmichKMW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GrurlKFW21,
author = {Thomas Grurl and
Richard Kueng and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Stochastic Quantum Circuit Simulation Using Decision Diagrams},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {194--199},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474135},
doi = {10.23919/DATE51398.2021.9474135},
timestamp = {Wed, 21 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GrurlKFW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PoddarFHW21,
author = {Sudip Poddar and
Gerold Fink and
Werner Haselmayr and
Robert Wille},
title = {Generic Sample Preparation for Different Microfluidic Platforms},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {336--339},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474059},
doi = {10.23919/DATE51398.2021.9474059},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PoddarFHW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KeszoczeMW21,
author = {Oliver Kesz{\"{o}}cze and
Naser Mohammadzadeh and
Robert Wille},
title = {Exact Physical Design of Quantum Circuits for Ion-Trap-based Quantum
Architectures},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {344--349},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474188},
doi = {10.23919/DATE51398.2021.9474188},
timestamp = {Wed, 21 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/KeszoczeMW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleBA21,
author = {Robert Wille and
Lukas Burgholzer and
Michael Artner},
title = {Visualizing Decision Diagrams for Quantum Computing (Special Session
Summary)},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {768--773},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9474236},
doi = {10.23919/DATE51398.2021.9474236},
timestamp = {Wed, 21 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WilleBA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WillePPP21,
author = {Robert Wille and
Tom Peham and
Judith Przigoda and
Nils Przigoda},
title = {Towards Automatic Design and Verification for Level 3 of the European
Train Control System},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {974--979},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9473935},
doi = {10.23919/DATE51398.2021.9473935},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WillePPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HuangPCGWHS21,
author = {Xing Huang and
Youlin Pan and
Zhen Chen and
Wenzhong Guo and
Robert Wille and
Tsung{-}Yi Ho and
Ulf Schlichtmann},
title = {BigIntegr: One-Pass Architectural Synthesis for Continuous-Flow Microfluidic
Lab-on-a-Chip Systems},
booktitle = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
2021, Munich, Germany, November 1-4, 2021},
pages = {1--8},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCAD51958.2021.9643576},
doi = {10.1109/ICCAD51958.2021.9643576},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HuangPCGWHS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PointnerWW21,
author = {Sebastian Pointner and
Sven Wenzek and
Robert Wille},
title = {SMT-Based Placement for System-on-Chip Design},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401608},
doi = {10.1109/ISCAS51556.2021.9401608},
timestamp = {Fri, 02 Jul 2021 12:26:54 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PointnerWW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/GrurlFW21,
author = {Thomas Grurl and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Lessons Learnt in the Implementation of Quantum Circuit Simulation
Using Decision Diagrams},
booktitle = {51st {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2021, Nur-Sultan, Kazakhstan, May 25-27, 2021},
pages = {87--92},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISMVL51352.2021.00024},
doi = {10.1109/ISMVL51352.2021.00024},
timestamp = {Mon, 05 Jul 2021 16:33:33 +0200},
biburl = {https://dblp.org/rec/conf/ismvl/GrurlFW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlcad/LoperaSKHWE21,
author = {Daniela Sanchez Lopera and
Lorenzo Servadei and
Gamze Naz Kiprit and
Souvik Hazra and
Robert Wille and
Wolfgang Ecker},
title = {A Survey of Graph Neural Networks for Electronic Design Automation},
booktitle = {3rd {ACM/IEEE} Workshop on Machine Learning for CAD, {MLCAD} 2021,
Raleigh, NC, USA, August 30 - Sept. 3, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MLCAD52597.2021.9531070},
doi = {10.1109/MLCAD52597.2021.9531070},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mlcad/LoperaSKHWE21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/BornebuschLWD21,
author = {Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Edwin Seidewitz and
Richard Soley},
title = {Performance Aspects of Correctness-oriented Synthesis Flows},
booktitle = {Proceedings of the 9th International Conference on Model-Driven Engineering
and Software Development, {MODELSWARD} 2021, Online Streaming, February
8-10, 2021},
pages = {76--86},
publisher = {{SCITEPRESS}},
year = {2021},
url = {https://doi.org/10.5220/0010235100760086},
doi = {10.5220/0010235100760086},
timestamp = {Tue, 07 May 2024 20:13:16 +0200},
biburl = {https://dblp.org/rec/conf/modelsward/BornebuschLWD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanocom/HamidovicFWSH21,
author = {Medina Hamidovic and
Gerold Fink and
Robert Wille and
Andreas Springer and
Werner Haselmayr},
editor = {Laura Galluccio and
Urbashi Mitra and
Maurizio Magarini and
Sergi Abada and
Michael Taynnan Barros and
Bhuvana Krishnaswamy},
title = {Practical Assessment of Payload- Header Switching in Microfluidic
Networks},
booktitle = {{NANOCOM} '21: The Eighth Annual {ACM} International Conference on
Nanoscale Computing and Communication, Virtual Event, Italy, September
7 - 9, 2021},
pages = {12:1--12:6},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3477206.3477451},
doi = {10.1145/3477206.3477451},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanocom/HamidovicFWSH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/HillmichHRMW21,
author = {Stefan Hillmich and
Charles Hadfield and
Rudy Raymond and
Antonio Mezzacapo and
Robert Wille},
editor = {Hausi A. M{\"{u}}ller and
Greg Byrd and
Candace Culhane and
Travis S. Humble},
title = {Decision Diagrams for Quantum Measurements with Shallow Circuits},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2021, Broomfield, CO, USA, October 17-22, 2021},
pages = {24--34},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/QCE52317.2021.00018},
doi = {10.1109/QCE52317.2021.00018},
timestamp = {Thu, 14 Dec 2023 11:20:44 +0100},
biburl = {https://dblp.org/rec/conf/qce/HillmichHRMW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/BurgholzerBW21,
author = {Lukas Burgholzer and
Hartwig Bauer and
Robert Wille},
editor = {Hausi A. M{\"{u}}ller and
Greg Byrd and
Candace Culhane and
Travis S. Humble},
title = {Hybrid Schr{\"{o}}dinger-Feynman Simulation of Quantum Circuits
With Decision Diagrams},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2021, Broomfield, CO, USA, October 17-22, 2021},
pages = {199--206},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/QCE52317.2021.00037},
doi = {10.1109/QCE52317.2021.00037},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/qce/BurgholzerBW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/BurgholzerR0W21,
author = {Lukas Burgholzer and
Rudy Raymond and
Indranil Sengupta and
Robert Wille},
editor = {Shigeru Yamashita and
Tetsuo Yokoyama},
title = {Efficient Construction of Functional Representations for Quantum Algorithms},
booktitle = {Reversible Computation - 13th International Conference, {RC} 2021,
Virtual Event, July 7-8, 2021, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {12805},
pages = {227--241},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-030-79837-6\_14},
doi = {10.1007/978-3-030-79837-6\_14},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/BurgholzerR0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/MashkoorWES21,
author = {Atif Mashkoor and
Robert Wille and
Alexander Egyed and
Sebastian Stock},
title = {Data for a mapping study about the usage of {MDE} in Safety and Security
Domain (Version 2)},
publisher = {Zenodo},
year = {2021},
month = nov,
howpublished = {\url{https://doi.org/10.5281/zenodo.5785625}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.5785625},
doi = {10.5281/ZENODO.5785625},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/data/10/MashkoorWES21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@misc{DBLP:data/10/MashkoorWES21a,
author = {Atif Mashkoor and
Robert Wille and
Alexander Egyed and
Sebastian Stock},
title = {Data for a mapping study about the usage of {MDE} in Safety and Security
Domain (Version 1)},
publisher = {Zenodo},
year = {2021},
month = nov,
howpublished = {\url{https://doi.org/10.5281/zenodo.5724990}},
note = {Accessed on YYYY-MM-DD.},
url = {https://doi.org/10.5281/zenodo.5724990},
doi = {10.5281/ZENODO.5724990},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/data/10/MashkoorWES21a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2103-08281,
author = {Lukas Burgholzer and
Rudy Raymond and
Indranil Sengupta and
Robert Wille},
title = {Efficient Construction of Functional Representations for Quantum Algorithms},
journal = {CoRR},
volume = {abs/2103.08281},
year = {2021},
url = {https://arxiv.org/abs/2103.08281},
eprinttype = {arXiv},
eprint = {2103.08281},
timestamp = {Wed, 24 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2103-08281.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2105-06932,
author = {Stefan Hillmich and
Charles Hadfield and
Rudy Raymond and
Antonio Mezzacapo and
Robert Wille},
title = {Decision Diagrams for Quantum Measurements with Shallow Circuits},
journal = {CoRR},
volume = {abs/2105.06932},
year = {2021},
url = {https://arxiv.org/abs/2105.06932},
eprinttype = {arXiv},
eprint = {2105.06932},
timestamp = {Tue, 18 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2105-06932.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2105-07045,
author = {Lukas Burgholzer and
Hartwig Bauer and
Robert Wille},
title = {Hybrid Schr{\"{o}}dinger-Feynman Simulation of Quantum Circuits
With Decision Diagrams},
journal = {CoRR},
volume = {abs/2105.07045},
year = {2021},
url = {https://arxiv.org/abs/2105.07045},
eprinttype = {arXiv},
eprint = {2105.07045},
timestamp = {Tue, 18 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2105-07045.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2106-01099,
author = {Lukas Burgholzer and
Robert Wille},
title = {Towards Verification of Dynamic Quantum Circuits},
journal = {CoRR},
volume = {abs/2106.01099},
year = {2021},
url = {https://arxiv.org/abs/2106.01099},
eprinttype = {arXiv},
eprint = {2106.01099},
timestamp = {Fri, 11 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2106-01099.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2110-05876,
author = {Lorenzo Servadei and
Huawei Sun and
Julius Ott and
Michael Stephan and
Souvik Hazra and
Thomas Stadelmayer and
Daniela Sanchez Lopera and
Robert Wille and
Avik Santra},
title = {Label-Aware Ranked Loss for robust People Counting using Automotive
in-cabin Radar},
journal = {CoRR},
volume = {abs/2110.05876},
year = {2021},
url = {https://arxiv.org/abs/2110.05876},
eprinttype = {arXiv},
eprint = {2110.05876},
timestamp = {Mon, 25 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2110-05876.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2112-00045,
author = {Lukas Burgholzer and
Sarah Schneider and
Robert Wille},
title = {Limiting the Search Space in Optimal Quantum Circuit Mapping},
journal = {CoRR},
volume = {abs/2112.00045},
year = {2021},
url = {https://arxiv.org/abs/2112.00045},
eprinttype = {arXiv},
eprint = {2112.00045},
timestamp = {Wed, 08 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2112-00045.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ei/FinkHSWH20,
author = {Gerold Fink and
Medina Hamidovic and
Andreas Springer and
Robert Wille and
Werner Haselmayr},
title = {Design and realization of flexible droplet-based lab-on-a-chip devices},
journal = {Elektrotech. Informationstechnik},
volume = {137},
number = {3},
pages = {113--120},
year = {2020},
url = {https://doi.org/10.1007/s00502-020-00790-0},
doi = {10.1007/S00502-020-00790-0},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ei/FinkHSWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhpca/VermaMPW20,
author = {Kevin Verma and
Christopher McCabe and
Chong Peng and
Robert Wille},
title = {A {PCISPH} implementation using distributed multi-GPU acceleration
for simulating industrial engineering applications},
journal = {Int. J. High Perform. Comput. Appl.},
volume = {34},
number = {4},
year = {2020},
url = {https://doi.org/10.1177/1094342020906199},
doi = {10.1177/1094342020906199},
timestamp = {Thu, 29 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhpca/VermaMPW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ThangkhiewZWDS20,
author = {Phrangboklang Lyngton Thangkhiew and
Alwin Zulehner and
Robert Wille and
Kamalika Datta and
Indranil Sengupta},
title = {An efficient memristor crossbar architecture for mapping Boolean functions
using Binary Decision Diagrams {(BDD)}},
journal = {Integr.},
volume = {71},
pages = {125--133},
year = {2020},
url = {https://doi.org/10.1016/j.vlsi.2019.11.014},
doi = {10.1016/J.VLSI.2019.11.014},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/ThangkhiewZWDS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/TorresNWD20,
author = {Frank Sill Torres and
Philipp Niemann and
Robert Wille and
Rolf Drechsler},
title = {Near Zero-Energy Computation Using Quantum-Dot Cellular Automata},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {16},
number = {1},
pages = {11:1--11:16},
year = {2020},
url = {https://doi.org/10.1145/3365394},
doi = {10.1145/3365394},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/TorresNWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jocs/VermaCMW20,
author = {Kevin Verma and
Hui Cao and
Prithvi Mandapalli and
Robert Wille},
title = {Modeling and simulation of electrophoretic deposition coatings},
journal = {J. Comput. Sci.},
volume = {41},
pages = {101075},
year = {2020},
url = {https://doi.org/10.1016/j.jocs.2020.101075},
doi = {10.1016/J.JOCS.2020.101075},
timestamp = {Mon, 04 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jocs/VermaCMW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/TorresSFWNFNCWN20,
author = {Frank Sill Torres and
Pedro Arthur Silva and
Geraldo Fontes and
Marcel Walter and
Jos{\'{e}} Augusto Miranda Nacif and
Ricardo Santos Ferreira and
Omar Paranaiba Vilela Neto and
Jeferson F. Chaves and
Robert Wille and
Philipp Niemann and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {On the impact of the synchronization constraint and interconnections
in quantum-dot cellular automata},
journal = {Microprocess. Microsystems},
volume = {76},
pages = {103109},
year = {2020},
url = {https://doi.org/10.1016/j.micpro.2020.103109},
doi = {10.1016/J.MICPRO.2020.103109},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/TorresSFWNFNCWN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qip/NiemannWD20,
author = {Philipp Niemann and
Robert Wille and
Rolf Drechsler},
title = {Advanced exact synthesis of Clifford+T circuits},
journal = {Quantum Inf. Process.},
volume = {19},
number = {1},
year = {2020},
url = {https://doi.org/10.1007/s11128-020-02816-0},
doi = {10.1007/S11128-020-02816-0},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qip/NiemannWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ServadeiMZDWEW20,
author = {Lorenzo Servadei and
Edoardo Mosca and
Elena Zennaro and
Keerthikumara Devarajegowda and
Michael Werner and
Wolfgang Ecker and
Robert Wille},
title = {Accurate Cost Estimation of Memory Systems Utilizing Machine Learning
and Solutions from Computer Vision for Design Automation},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {6},
pages = {856--867},
year = {2020},
url = {https://doi.org/10.1109/TC.2020.2968888},
doi = {10.1109/TC.2020.2968888},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ServadeiMZDWEW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrimmerHW20,
author = {Andreas Grimmer and
Werner Haselmayr and
Robert Wille},
title = {Automatic Droplet Sequence Generation for Microfluidic Networks With
Passive Droplet Routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {2},
pages = {387--396},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2018.2887055},
doi = {10.1109/TCAD.2018.2887055},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrimmerHW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BhattacharjeeWH20,
author = {Sukanta Bhattacharjee and
Robert Wille and
Juinn{-}Dar Huang and
Bhargab B. Bhattacharya},
title = {Storage-Aware Algorithms for Dilution and Mixture Preparation With
Flow-Based Lab-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {4},
pages = {816--829},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2907911},
doi = {10.1109/TCAD.2019.2907911},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BhattacharjeeWH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KoleHDWS20,
author = {Abhoy Kole and
Stefan Hillmich and
Kamalika Datta and
Robert Wille and
Indranil Sengupta},
title = {Improved Mapping of Quantum Circuits to {IBM} {QX} Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2375--2383},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962753},
doi = {10.1109/TCAD.2019.2962753},
timestamp = {Tue, 06 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KoleHDWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhuHLHWYWS20,
author = {Ying Zhu and
Xing Huang and
Bing Li and
Tsung{-}Yi Ho and
Qin Wang and
Hailong Yao and
Robert Wille and
Ulf Schlichtmann},
title = {Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2489--2502},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2940688},
doi = {10.1109/TCAD.2019.2940688},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ZhuHLHWYWS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FinkGHHW20,
author = {Gerold Fink and
Andreas Grimmer and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Robustness Analysis for Droplet-Based Microfluidic Networks},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {10},
pages = {2696--2707},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2019.2962777},
doi = {10.1109/TCAD.2019.2962777},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FinkGHHW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiemannZDW20,
author = {Philipp Niemann and
Alwin Zulehner and
Rolf Drechsler and
Robert Wille},
title = {Overcoming the Tradeoff Between Accuracy and Compactness in Decision
Diagrams for Quantum Computation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {12},
pages = {4657--4668},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.2977603},
doi = {10.1109/TCAD.2020.2977603},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NiemannZDW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetc/CuiSZWWDK20,
author = {Xiaotong Cui and
Samah Mohamed Saeed and
Alwin Zulehner and
Robert Wille and
Kaijie Wu and
Rolf Drechsler and
Ramesh Karri},
title = {On the Difficulty of Inserting Trojans in Reversible Computing Architectures},
journal = {{IEEE} Trans. Emerg. Top. Comput.},
volume = {8},
number = {4},
pages = {960--972},
year = {2020},
url = {https://doi.org/10.1109/TETC.2018.2823315},
doi = {10.1109/TETC.2018.2823315},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tetc/CuiSZWWDK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/RoyBWB20,
author = {Pushpita Roy and
Ansuman Banerjee and
Robert Wille and
Bhargab B. Bhattacharya},
title = {Harnessing the Granularity of Micro-Electrode-Dot-Array Architectures
for Optimizing Droplet Routing in Biochips},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {25},
number = {1},
pages = {10:1--10:37},
year = {2020},
url = {https://doi.org/10.1145/3365993},
doi = {10.1145/3365993},
timestamp = {Thu, 27 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/RoyBWB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HillmichZW20,
author = {Stefan Hillmich and
Alwin Zulehner and
Robert Wille},
title = {Concurrency in DD-based Quantum Circuit Simulation},
booktitle = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2020, Beijing, China, January 13-16, 2020},
pages = {115--120},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASP-DAC47756.2020.9045711},
doi = {10.1109/ASP-DAC47756.2020.9045711},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HillmichZW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZulehnerHMW20,
author = {Alwin Zulehner and
Stefan Hillmich and
Igor L. Markov and
Robert Wille},
title = {Approximation of Quantum States Using Decision Diagrams},
booktitle = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2020, Beijing, China, January 13-16, 2020},
pages = {121--126},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASP-DAC47756.2020.9045454},
doi = {10.1109/ASP-DAC47756.2020.9045454},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZulehnerHMW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BurgholzerW20,
author = {Lukas Burgholzer and
Robert Wille},
title = {Improved DD-based Equivalence Checking of Quantum Circuits},
booktitle = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2020, Beijing, China, January 13-16, 2020},
pages = {127--132},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASP-DAC47756.2020.9045153},
doi = {10.1109/ASP-DAC47756.2020.9045153},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BurgholzerW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BornebuschLWD20,
author = {Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
title = {Towards Automatic Hardware Synthesis from Formal Specification to
Implementation},
booktitle = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2020, Beijing, China, January 13-16, 2020},
pages = {375--380},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASP-DAC47756.2020.9045406},
doi = {10.1109/ASP-DAC47756.2020.9045406},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BornebuschLWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BurgholzerW20,
author = {Lukas Burgholzer and
Robert Wille},
title = {The Power of Simulation for Equivalence Checking in Quantum Computing},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218563},
doi = {10.1109/DAC18072.2020.9218563},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/BurgholzerW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HillmichMW20,
author = {Stefan Hillmich and
Igor L. Markov and
Robert Wille},
title = {Just Like the Real Thing: Fast Weak Simulation of Quantum Computation},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218555},
doi = {10.1109/DAC18072.2020.9218555},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/HillmichMW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WalterWTGD20,
author = {Marcel Walter and
Robert Wille and
Frank Sill Torres and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {Verification for Field-coupled Nanocomputing Circuits},
booktitle = {57th {ACM/IEEE} Design Automation Conference, {DAC} 2020, San Francisco,
CA, USA, July 20-24, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DAC18072.2020.9218641},
doi = {10.1109/DAC18072.2020.9218641},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WalterWTGD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DebDW20,
author = {Arighna Deb and
Gerhard W. Dueck and
Robert Wille},
title = {Towards Exploring the Potential of Alternative Quantum Computing Architectures},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {682--685},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116507},
doi = {10.23919/DATE48585.2020.9116507},
timestamp = {Thu, 25 Jun 2020 12:55:44 +0200},
biburl = {https://dblp.org/rec/conf/date/DebDW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AlmudeverLWG20,
author = {Carmen G. Almud{\'{e}}ver and
Lingling Lao and
Robert Wille and
Gian Giacomo Guerreschi},
title = {Realizing Quantum Algorithms on Real Quantum Computing Devices},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {864--872},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116240},
doi = {10.23919/DATE48585.2020.9116240},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AlmudeverLWG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RingBLWD20,
author = {Martin Ring and
Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
title = {Verification Runtime Analysis: Get the Most Out of Partial Verification},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {873--878},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116543},
doi = {10.23919/DATE48585.2020.9116543},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RingBLWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dexaw/PointnerAW20,
author = {Sebastian Pointner and
Pablo Gonz{\'{a}}lez de Aledo and
Robert Wille},
editor = {Gabriele Kotsis and
A Min Tjoa and
Ismail Khalil and
Lukas Fischer and
Bernhard Moser and
Atif Mashkoor and
Johannes Sametinger and
Anna Fensel and
Jorge Mart{\'{\i}}nez Gil},
title = {YASSi: Yet Another Symbolic Simulator Large (Tool Demo)},
booktitle = {Database and Expert Systems Applications - {DEXA} 2020 International
Workshops BIOKDD, {IWCFS} and MLKgraphs, Bratislava, Slovakia, September
14-17, 2020, Proceedings},
series = {Communications in Computer and Information Science},
volume = {1285},
pages = {25--31},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-59028-4\_3},
doi = {10.1007/978-3-030-59028-4\_3},
timestamp = {Mon, 26 Jun 2023 20:42:59 +0200},
biburl = {https://dblp.org/rec/conf/dexaw/PointnerAW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/GarlandoWWRTD20,
author = {Umberto Garlando and
Marcel Walter and
Robert Wille and
Fabrizio Riente and
Frank Sill Torres and
Rolf Drechsler},
title = {ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing},
booktitle = {23rd Euromicro Conference on Digital System Design, {DSD} 2020, Kranj,
Slovenia, August 26-28, 2020},
pages = {408--415},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DSD51259.2020.00071},
doi = {10.1109/DSD51259.2020.00071},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/GarlandoWWRTD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ServadeiMDWEW20,
author = {Lorenzo Servadei and
Edoardo Mosca and
Keerthikumara Devarajegowda and
Michael Werner and
Wolfgang Ecker and
Robert Wille},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Cost Estimation for Configurable Model-Driven SoC Designs Using Machine
Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {405--410},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406950},
doi = {10.1145/3386263.3406950},
timestamp = {Mon, 04 Jul 2022 14:19:34 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ServadeiMDWEW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/GrurlFW20,
author = {Thomas Grurl and
J{\"{u}}rgen Fu{\ss} and
Robert Wille},
title = {Considering Decoherence Errors in the Simulation of Quantum Circuits
Using Decision Diagrams},
booktitle = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
2020, San Diego, CA, USA, November 2-5, 2020},
pages = {140:1--140:7},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1145/3400302.3415622},
doi = {10.1145/3400302.3415622},
timestamp = {Mon, 18 Jan 2021 09:56:56 +0100},
biburl = {https://dblp.org/rec/conf/iccad/GrurlFW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleHB20,
author = {Robert Wille and
Stefan Hillmich and
Lukas Burgholzer},
title = {{JKQ:} {JKU} Tools for Quantum Computing},
booktitle = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
2020, San Diego, CA, USA, November 2-5, 2020},
pages = {154:1--154:5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1145/3400302.3415746},
doi = {10.1145/3400302.3415746},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/WilleHB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeesensors/SchoberCRZW20,
author = {Sebastian A. Schober and
Cecilia Carbonelli and
Alexandra Roth and
Alexander Zoepfl and
Robert Wille},
title = {Towards Drift Modeling of Graphene-Based Gas Sensors Using Stochastic
Simulation Techniques},
booktitle = {2020 {IEEE} Sensors, Rotterdam, The Netherlands, October 25-28, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/SENSORS47125.2020.9278754},
doi = {10.1109/SENSORS47125.2020.9278754},
timestamp = {Tue, 13 Dec 2022 08:56:31 +0100},
biburl = {https://dblp.org/rec/conf/ieeesensors/SchoberCRZW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WilleHB20,
author = {Robert Wille and
Stefan Hillmich and
Lukas Burgholzer},
title = {Efficient and Correct Compilation of Quantum Circuits},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180791},
doi = {10.1109/ISCAS45731.2020.9180791},
timestamp = {Mon, 18 Jan 2021 08:38:59 +0100},
biburl = {https://dblp.org/rec/conf/iscas/WilleHB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isdcs/KeszoczeWD20,
author = {Oliver Kesz{\"{o}}cze and
Robert Wille and
Rolf Drechsler},
title = {One-pass Synthesis for Digital Microfluidic Biochips: {A} Survey},
booktitle = {3rd International Symposium on Devices, Circuits and Systems, {ISDCS}
2020, Howrah, India, March 4-6, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISDCS49393.2020.9263007},
doi = {10.1109/ISDCS49393.2020.9263007},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isdcs/KeszoczeWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/BhattacharjeeBM20,
author = {Anirban Bhattacharjee and
Chandan Bandyopadhyay and
Angshu Mukherjee and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Efficient Implementation of Nearest Neighbor Quantum Circuits Using
Clustering with Genetic Algorithm},
booktitle = {50th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2020, Miyazaki, Japan, November 9-11, 2020},
pages = {40--45},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISMVL49045.2020.00-32},
doi = {10.1109/ISMVL49045.2020.00-32},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ismvl/BhattacharjeeBM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/GrurlFHBW20,
author = {Thomas Grurl and
J{\"{u}}rgen Fu{\ss} and
Stefan Hillmich and
Lukas Burgholzer and
Robert Wille},
title = {Arrays vs. Decision Diagrams: {A} Case Study on Quantum Circuit Simulators},
booktitle = {50th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2020, Miyazaki, Japan, November 9-11, 2020},
pages = {176--181},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISMVL49045.2020.000-9},
doi = {10.1109/ISMVL49045.2020.000-9},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/GrurlFHBW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WalterWTD20,
author = {Marcel Walter and
Robert Wille and
Frank Sill Torres and
Rolf Drechsler},
title = {Bail on Balancing: An Alternative Approach to the Physical Design
of Field-Coupled Nanocomputing Circuits},
booktitle = {2020 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2020,
Limassol, Cyprus, July 6-8, 2020},
pages = {66--71},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISVLSI49217.2020.00022},
doi = {10.1109/ISVLSI49217.2020.00022},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/WalterWTD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlcad/ServadeiZAWEHEW20,
author = {Lorenzo Servadei and
Jiapeng Zheng and
Jose A. Arjona{-}Medina and
Michael Werner and
Volkan Esen and
Sepp Hochreiter and
Wolfgang Ecker and
Robert Wille},
editor = {Ulf Schlichtmann and
Raviv Gal and
Hussam Amrouch and
Hai (Helen) Li},
title = {Cost Optimization at Early Stages of Design Using Deep Reinforcement
Learning},
booktitle = {{MLCAD} '20: 2020 {ACM/IEEE} Workshop on Machine Learning for CAD,
Virtual Event, Iceland, November 16-20, 2020},
pages = {37--42},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3380446.3430619},
doi = {10.1145/3380446.3430619},
timestamp = {Mon, 03 May 2021 16:42:27 +0200},
biburl = {https://dblp.org/rec/conf/mlcad/ServadeiZAWEHEW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlcad/WernerSWE20,
author = {Michael Werner and
Lorenzo Servadei and
Robert Wille and
Wolfgang Ecker},
editor = {Ulf Schlichtmann and
Raviv Gal and
Hussam Amrouch and
Hai (Helen) Li},
title = {Automatic compiler optimization on embedded software through k-means
clustering},
booktitle = {{MLCAD} '20: 2020 {ACM/IEEE} Workshop on Machine Learning for CAD,
Virtual Event, Iceland, November 16-20, 2020},
pages = {157--162},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3380446.3430631},
doi = {10.1145/3380446.3430631},
timestamp = {Mon, 30 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mlcad/WernerSWE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/BornebuschLWD20a,
author = {Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Bran Selic},
title = {Safety First: About the Detection of Arithmetic Overflows in Hardware
Design Specifications},
booktitle = {Model-Driven Engineering and Software Development - 8th International
Conference, {MODELSWARD} 2020, Valletta, Malta, February 25-27, 2020,
Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {1361},
pages = {26--48},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-67445-8\_2},
doi = {10.1007/978-3-030-67445-8\_2},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/modelsward/BornebuschLWD20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/BornebuschLWD20,
author = {Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Bran Selic},
title = {Integer Overflow Detection in Hardware Designs at the Specification
Level},
booktitle = {Proceedings of the 8th International Conference on Model-Driven Engineering
and Software Development, {MODELSWARD} 2020, Valletta, Malta, February
25-27, 2020},
pages = {41--48},
publisher = {{SCITEPRESS}},
year = {2020},
url = {https://doi.org/10.5220/0008960200410048},
doi = {10.5220/0008960200410048},
timestamp = {Tue, 06 Jun 2023 14:58:00 +0200},
biburl = {https://dblp.org/rec/conf/modelsward/BornebuschLWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/qce/BurgholzerRW20,
author = {Lukas Burgholzer and
Rudy Raymond and
Robert Wille},
title = {Verifying Results of the {IBM} Qiskit Quantum Circuit Compilation
Flow},
booktitle = {{IEEE} International Conference on Quantum Computing and Engineering,
{QCE} 2020, Denver, CO, USA, October 12-16, 2020},
pages = {356--365},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/QCE49297.2020.00051},
doi = {10.1109/QCE49297.2020.00051},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/qce/BurgholzerRW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/BandyopadhyayWD20,
author = {Chandan Bandyopadhyay and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Post Synthesis-Optimization of Reversible Circuit using Template Matching},
booktitle = {2020 24th International Symposium on {VLSI} Design and Test (VDAT),
Bhubaneswar, India, July 23-25, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VDAT50263.2020.9190279},
doi = {10.1109/VDAT50263.2020.9190279},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vdat/BandyopadhyayWD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:series/lncs/ZulehnerW20,
author = {Alwin Zulehner and
Robert Wille},
editor = {Irek Ulidowski and
Ivan Lanese and
Ulrik Pagh Schultz and
Carla Ferreira},
title = {Simulation and Design of Quantum Circuits},
booktitle = {Reversible Computation: Extending Horizons of Computing - Selected
Results of the {COST} Action {IC1405}},
series = {Lecture Notes in Computer Science},
volume = {12070},
pages = {60--82},
publisher = {Springer},
year = {2020},
url = {https://doi.org/10.1007/978-3-030-47361-7\_3},
doi = {10.1007/978-3-030-47361-7\_3},
timestamp = {Fri, 14 May 2021 08:30:49 +0200},
biburl = {https://dblp.org/rec/series/lncs/ZulehnerW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2004-08420,
author = {Lukas Burgholzer and
Robert Wille},
title = {Advanced Equivalence Checking for Quantum Circuits},
journal = {CoRR},
volume = {abs/2004.08420},
year = {2020},
url = {https://arxiv.org/abs/2004.08420},
eprinttype = {arXiv},
eprint = {2004.08420},
timestamp = {Sat, 23 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2004-08420.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2004-08471,
author = {Atif Mashkoor and
Alexander Egyed and
Robert Wille},
title = {Model-driven Engineering of Safety and Security Systems: {A} Systematic
Mapping Study},
journal = {CoRR},
volume = {abs/2004.08471},
year = {2020},
url = {https://arxiv.org/abs/2004.08471},
eprinttype = {arXiv},
eprint = {2004.08471},
timestamp = {Wed, 22 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2004-08471.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2007-01000,
author = {Carmen G. Almud{\'{e}}ver and
Lingling Lao and
Robert Wille and
Gian Giacomo Guerreschi},
title = {Realizing Quantum Algorithms on Real Quantum Computing Devices},
journal = {CoRR},
volume = {abs/2007.01000},
year = {2020},
url = {https://arxiv.org/abs/2007.01000},
eprinttype = {arXiv},
eprint = {2007.01000},
timestamp = {Mon, 06 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2007-01000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2011-07288,
author = {Lukas Burgholzer and
Richard Kueng and
Robert Wille},
title = {Random Stimuli Generation for the Verification of Quantum Circuits},
journal = {CoRR},
volume = {abs/2011.07288},
year = {2020},
url = {https://arxiv.org/abs/2011.07288},
eprinttype = {arXiv},
eprint = {2011.07288},
timestamp = {Thu, 19 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2011-07288.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2012-02037,
author = {Lukas Burgholzer and
Robert Wille and
Richard Kueng},
title = {Characteristics of Reversible Circuits for Error Detection},
journal = {CoRR},
volume = {abs/2012.02037},
year = {2020},
url = {https://arxiv.org/abs/2012.02037},
eprinttype = {arXiv},
eprint = {2012.02037},
timestamp = {Fri, 04 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2012-02037.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SaeedMZWK19,
author = {Samah Mohamed Saeed and
Nithin Mahendran and
Alwin Zulehner and
Robert Wille and
Ramesh Karri},
title = {Identification of Synthesis Approaches for {IP/IC} Piracy of Reversible
Circuits},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {15},
number = {3},
pages = {23:1--23:17},
year = {2019},
url = {https://doi.org/10.1145/3289392},
doi = {10.1145/3289392},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/SaeedMZWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/GrimmerHHW19,
author = {Andreas Grimmer and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Advanced Simulation of Droplet Microfluidics},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {15},
number = {3},
pages = {26:1--26:16},
year = {2019},
url = {https://doi.org/10.1145/3313867},
doi = {10.1145/3313867},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/GrimmerHHW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/WalterWGTD19,
author = {Marcel Walter and
Robert Wille and
Daniel Gro{\ss}e and
Frank Sill Torres and
Rolf Drechsler},
title = {Placement and Routing for Tile-based Field-coupled Nanocomputing Circuits
Is \emph{NP}-complete (Research Note)},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {15},
number = {3},
pages = {29:1--29:10},
year = {2019},
url = {https://doi.org/10.1145/3312661},
doi = {10.1145/3312661},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/WalterWGTD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/PalerFW19,
author = {Alexandru Paler and
Austin G. Fowler and
Robert Wille},
title = {Faster manipulation of large quantum circuits using wire label reference
diagrams},
journal = {Microprocess. Microsystems},
volume = {66},
pages = {55--66},
year = {2019},
url = {https://doi.org/10.1016/j.micpro.2019.02.008},
doi = {10.1016/J.MICPRO.2019.02.008},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/PalerFW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/ServadeiZFDEW19,
author = {Lorenzo Servadei and
Elena Zennaro and
Tobias Fritz and
Keerthikumara Devarajegowda and
Wolfgang Ecker and
Robert Wille},
title = {Using Machine Learning for predicting area and Firmware metrics of
hardware designs from abstract specifications},
journal = {Microprocess. Microsystems},
volume = {71},
year = {2019},
url = {https://doi.org/10.1016/j.micpro.2019.102853},
doi = {10.1016/J.MICPRO.2019.102853},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/ServadeiZFDEW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ncn/HamidovicHGWS19,
author = {Medina Hamidovic and
Werner Haselmayr and
Andreas Grimmer and
Robert Wille and
Andreas Springer},
title = {Passive droplet control in microfluidic networks: {A} survey and new
perspectives on their practical realization},
journal = {Nano Commun. Networks},
volume = {19},
pages = {33--46},
year = {2019},
url = {https://doi.org/10.1016/j.nancom.2018.10.002},
doi = {10.1016/J.NANCOM.2018.10.002},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ncn/HamidovicHGWS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZulehnerW19,
author = {Alwin Zulehner and
Robert Wille},
title = {Advanced Simulation of Quantum Computations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {5},
pages = {848--859},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2834427},
doi = {10.1109/TCAD.2018.2834427},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZulehnerW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrimmerHW19,
author = {Andreas Grimmer and
Werner Haselmayr and
Robert Wille},
title = {Automated Dimensioning of Networked Labs-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {7},
pages = {1216--1225},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2834402},
doi = {10.1109/TCAD.2018.2834402},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrimmerHW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZulehnerPW19,
author = {Alwin Zulehner and
Alexandru Paler and
Robert Wille},
title = {An Efficient Methodology for Mapping Quantum Circuits to the {IBM}
{QX} Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {7},
pages = {1226--1236},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2846658},
doi = {10.1109/TCAD.2018.2846658},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZulehnerPW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PoddarWRB19,
author = {Sudip Poddar and
Robert Wille and
Hafizur Rahaman and
Bhargab B. Bhattacharya},
title = {Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {10},
pages = {1886--1899},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2864263},
doi = {10.1109/TCAD.2018.2864263},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PoddarWRB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SaeedWK19,
author = {Samah Mohamed Saeed and
Robert Wille and
Ramesh Karri},
title = {Locking the Design of Building Blocks for Quantum Circuits},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {60:1--60:15},
year = {2019},
url = {https://doi.org/10.1145/3358184},
doi = {10.1145/3358184},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SaeedWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmbmc/FinkHWH19,
author = {Gerold Fink and
Medina Hamidovic and
Robert Wille and
Werner Haselmayr},
title = {Passive Droplet Control in Two-Dimensional Microfluidic Networks},
journal = {{IEEE} Trans. Mol. Biol. Multi Scale Commun.},
volume = {5},
number = {3},
pages = {189--206},
year = {2019},
url = {https://doi.org/10.1109/TMBMC.2020.2988409},
doi = {10.1109/TMBMC.2020.2988409},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmbmc/FinkHWH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HuhnFWD19,
author = {Sebastian Huhn and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
title = {Determining Application-Specific Knowledge for Improving Robustness
of Sequential Circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {4},
pages = {875--887},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2018.2890601},
doi = {10.1109/TVLSI.2018.2890601},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HuhnFWD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SaeedZWDK19,
author = {Samah Mohamed Saeed and
Alwin Zulehner and
Robert Wille and
Rolf Drechsler and
Ramesh Karri},
title = {Reversible Circuits: {IC/IP} Piracy Attacks and Countermeasures},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {11},
pages = {2523--2535},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2934465},
doi = {10.1109/TVLSI.2019.2934465},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SaeedZWDK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acss/PoddarWRB19,
author = {Sudip Poddar and
Robert Wille and
Hafizur Rahaman and
Bhargab B. Bhattacharya},
editor = {Rituparna Chaki and
Agostino Cortesi and
Khalid Saeed and
Nabendu Chaki},
title = {Effect of Volumetric Split-Errors on Reactant-Concentration During
Sample Preparation with Microfluidic Biochips},
booktitle = {Advanced Computing and Systems for Security - Volume Ten, 6th International
Doctoral Symposium on Applied Computation and Security, {ACSS} 2019,
Kolkata, India, 12-13 March, 2019},
series = {Advances in Intelligent Systems and Computing},
volume = {996},
pages = {159--165},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-981-13-8969-6\_10},
doi = {10.1007/978-981-13-8969-6\_10},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/acss/PoddarWRB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZulehnerW19,
author = {Alwin Zulehner and
Robert Wille},
editor = {Toshiyuki Shibuya},
title = {Compiling {SU(4)} quantum circuits to {IBM} {QX} architectures},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {185--190},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3287704},
doi = {10.1145/3287624.3287704},
timestamp = {Sun, 20 Jan 2019 16:08:16 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ZulehnerW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WalterWTGD19,
author = {Marcel Walter and
Robert Wille and
Frank Sill Torres and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Toshiyuki Shibuya},
title = {Scalable design for field-coupled nanocomputing circuits},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {197--202},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3287705},
doi = {10.1145/3287624.3287705},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WalterWTGD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZulehnerD0W19,
author = {Alwin Zulehner and
Kamalika Datta and
Indranil Sengupta and
Robert Wille},
editor = {Toshiyuki Shibuya},
title = {A staircase structure for scalable and efficient synthesis of memristor-aided
logic},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {237--242},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3287672},
doi = {10.1145/3287624.3287672},
timestamp = {Sun, 20 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ZulehnerD0W19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZhongWC19,
author = {Zhanwei Zhong and
Robert Wille and
Krishnendu Chakrabarty},
editor = {Toshiyuki Shibuya},
title = {Robust sample preparation on digital microfluidic biochips},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {474--480},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3287709},
doi = {10.1145/3287624.3287709},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ZhongWC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZulehnerFW19,
author = {Alwin Zulehner and
Michael P. Frank and
Robert Wille},
editor = {Toshiyuki Shibuya},
title = {Design automation for adiabatic circuits},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {669--674},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3287673},
doi = {10.1145/3287624.3287673},
timestamp = {Sun, 20 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ZulehnerFW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WilleBZ19,
author = {Robert Wille and
Lukas Burgholzer and
Alwin Zulehner},
title = {Mapping Quantum Circuits to {IBM} {QX} Architectures Using the Minimal
Number of {SWAP} and {H} Operations},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {142},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3317859},
doi = {10.1145/3316781.3317859},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WilleBZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerW19,
author = {Alwin Zulehner and
Robert Wille},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Matrix-Vector vs. Matrix-Matrix Multiplication: Potential in DD-based
Simulation of Quantum Computations},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {90--95},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714836},
doi = {10.23919/DATE.2019.8714836},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/ZulehnerW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerNDW19,
author = {Alwin Zulehner and
Philipp Niemann and
Rolf Drechsler and
Robert Wille},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Accuracy and Compactness in Decision Diagrams for Quantum Computation},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {280--283},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715040},
doi = {10.23919/DATE.2019.8715040},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ZulehnerNDW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RingBLWD19,
author = {Martin Ring and
Fritjof Bornebusch and
Christoph L{\"{u}}th and
Robert Wille and
Rolf Drechsler},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Better Late Than Never : Verification of Embedded Systems After Deployment},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {890--895},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714967},
doi = {10.23919/DATE.2019.8714967},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RingBLWD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleMN19,
author = {Robert Wille and
Rod Van Meter and
Yehuda Naveh},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {IBM's Qiskit Tool Chain: Working with and Developing for Real Quantum
Computers},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1234--1240},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715261},
doi = {10.23919/DATE.2019.8715261},
timestamp = {Mon, 20 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WilleMN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ServadeiZDMEW19,
author = {Lorenzo Servadei and
Elena Zennaro and
Keerthikumara Devarajegowda and
Martin Manzinger and
Wolfgang Ecker and
Robert Wille},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Accurate Cost Estimation of Memory Systems Inspired by Machine Learning
for Computer Vision},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1277--1280},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8714961},
doi = {10.23919/DATE.2019.8714961},
timestamp = {Mon, 20 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ServadeiZDMEW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/PointnerAW19,
author = {Sebastian Pointner and
Pablo Gonz{\'{a}}lez de Aledo and
Robert Wille},
title = {Generic Error Localization for the Electronic System Level},
booktitle = {22nd {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2019, Cluj-Napoca, Romania, April
24-26, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/DDECS.2019.8724637},
doi = {10.1109/DDECS.2019.8724637},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/PointnerAW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleHAT19,
author = {Robert Wille and
Majid Haghparast and
Smaran Adarsh and
Tanmay Tanmay},
editor = {David Z. Pan},
title = {Towards HDL-based Synthesis of Reversible Circuits with No Additional
Lines},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
pages = {1--7},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1109/ICCAD45719.2019.8942156},
doi = {10.1109/ICCAD45719.2019.8942156},
timestamp = {Tue, 31 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/WilleHAT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ZulehnerHW19,
author = {Alwin Zulehner and
Stefan Hillmich and
Robert Wille},
editor = {David Z. Pan},
title = {How to Efficiently Handle Complex Values? Implementing Decision Diagrams
for Quantum Computing},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2019, Westminster, CO, USA, November 4-7, 2019},
pages = {1--7},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1109/ICCAD45719.2019.8942057},
doi = {10.1109/ICCAD45719.2019.8942057},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/ZulehnerHW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PointnerGW19,
author = {Sebastian Pointner and
Andreas Grimmer and
Robert Wille},
title = {Exact Stimuli Minimization for Simulation-Based Verification},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702140},
doi = {10.1109/ISCAS.2019.8702140},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/PointnerGW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/BanerjeePWB19,
author = {Tapalina Banerjee and
Sudip Poddar and
Robert Wille and
Bhargab B. Bhattacharya},
title = {Flow-Based Passive Microfluidic Architecture for Homogeneous Mixing},
booktitle = {9th International Symposium on Embedded Computing and System Design,
{ISED} 2019, Kollam, India, December 13-14, 2019},
pages = {8138--8143},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISED48680.2019.9096242},
doi = {10.1109/ISED48680.2019.9096242},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ised/BanerjeePWB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/ZulehnerNDW19,
author = {Alwin Zulehner and
Philipp Niemann and
Rolf Drechsler and
Robert Wille},
title = {One Additional Qubit is Enough: Encoded Embeddings for Boolean Components
in Quantum Circuits},
booktitle = {2019 {IEEE} 49th International Symposium on Multiple-Valued Logic
(ISMVL), Fredericton, NB, Canada, May 21-23, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISMVL.2019.00009},
doi = {10.1109/ISMVL.2019.00009},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/ZulehnerNDW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/PrzigodaPW19,
author = {Nils Przigoda and
Judith Przigoda and
Robert Wille},
title = {Four-Valued Logic in {UML/OCL} Models: {A} "Playground"
for the {MVL} Community},
booktitle = {2019 {IEEE} 49th International Symposium on Multiple-Valued Logic
(ISMVL), Fredericton, NB, Canada, May 21-23, 2019},
pages = {61--66},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISMVL.2019.00019},
doi = {10.1109/ISMVL.2019.00019},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ismvl/PrzigodaPW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/PointnerFHW19,
author = {Sebastian Pointner and
Oliver Frank and
Christoph Hazott and
Robert Wille},
title = {Test Your Test Programs Pre-Silicon: {A} Virtual Test Methodology
for Industrial Design Flows},
booktitle = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
Miami, FL, USA, July 15-17, 2019},
pages = {241--246},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISVLSI.2019.00052},
doi = {10.1109/ISVLSI.2019.00052},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/PointnerFHW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/Serajeh-hassani19,
author = {Fatemeh Serajeh{-}hassani and
Mohammad Sadrosadati and
Sebastian Pointner and
Robert Wille and
Hamid Sarbazi{-}Azad},
title = {Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted
Switch Boxes},
booktitle = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
Miami, FL, USA, July 15-17, 2019},
pages = {615--620},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISVLSI.2019.00115},
doi = {10.1109/ISVLSI.2019.00115},
timestamp = {Tue, 24 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/Serajeh-hassani19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WilleWTGD19,
author = {Robert Wille and
Marcel Walter and
Frank Sill Torres and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {Ignore Clocking Constraints: An Alternative Physical Design Methodology
for Field-Coupled Nanotechnologies},
booktitle = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
Miami, FL, USA, July 15-17, 2019},
pages = {651--656},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISVLSI.2019.00121},
doi = {10.1109/ISVLSI.2019.00121},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/WilleWTGD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc-asia/PointnerW19,
author = {Sebastian Pointner and
Robert Wille},
title = {Did We Test Enough? Functional Coverage for Post-Silicon Validation},
booktitle = {{IEEE} International Test Conference in Asia, ITC-Asia 2019, Tokyo,
Japan, September 3-5, 2019},
pages = {31--36},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ITC-Asia.2019.00019},
doi = {10.1109/ITC-ASIA.2019.00019},
timestamp = {Tue, 12 Nov 2019 16:51:04 +0100},
biburl = {https://dblp.org/rec/conf/itc-asia/PointnerW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanocom/HamidovicMFWSH19,
author = {Medina Hamidovic and
Uli Marta and
Gerold Fink and
Robert Wille and
Andreas Springer and
Werner Haselmayr},
title = {Information Encoding in Droplet-Based Microfluidic Systems: First
Practical Study},
booktitle = {Proceedings of the Sixth Annual {ACM} International Conference on
Nanoscale Computing and Communication, {NANOCOM} 2019, Dublin, Ireland,
September 25-27, 2019},
pages = {26:1--26:6},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3345312.3345482},
doi = {10.1145/3345312.3345482},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanocom/HamidovicMFWSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/VermaOW19,
author = {Kevin Verma and
Johannes Oder and
Robert Wille},
title = {Simulating Industrial Electrophoretic Deposition on Distributed Memory
Architectures},
booktitle = {27th Euromicro International Conference on Parallel, Distributed and
Network-Based Processing, {PDP} 2019, Pavia, Italy, February 13-15,
2019},
pages = {414--421},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/EMPDP.2019.8671570},
doi = {10.1109/EMPDP.2019.8671570},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/pdp/VermaOW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/ZulehnerBW19,
author = {Alwin Zulehner and
Hartwig Bauer and
Robert Wille},
editor = {Michael Kirkedal Thomsen and
Mathias Soeken},
title = {Evaluating the Flexibility of A* for Mapping Quantum Circuits},
booktitle = {Reversible Computation - 11th International Conference, {RC} 2019,
Lausanne, Switzerland, June 24-25, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11497},
pages = {171--190},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-21500-2\_11},
doi = {10.1007/978-3-030-21500-2\_11},
timestamp = {Mon, 17 Jun 2019 13:44:07 +0200},
biburl = {https://dblp.org/rec/conf/rc/ZulehnerBW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BhattacharjeeBW19,
author = {Anirban Bhattacharjee and
Chandan Bandyopadhyay and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Improved Look-Ahead Approaches for Nearest Neighbor Synthesis of 1D
Quantum Circuits},
booktitle = {32nd International Conference on {VLSI} Design and 18th International
Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
5-9, 2019},
pages = {203--208},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSID.2019.00054},
doi = {10.1109/VLSID.2019.00054},
timestamp = {Mon, 14 Nov 2022 15:28:06 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BhattacharjeeBW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1901-00353,
author = {Sudip Poddar and
Robert Wille and
Hafizur Rahaman and
Bhargab B. Bhattacharya},
title = {Dilution with Digital Microfluidic Biochips: How Unbalanced Splits
Corrupt Target-Concentration},
journal = {CoRR},
volume = {abs/1901.00353},
year = {2019},
url = {http://arxiv.org/abs/1901.00353},
eprinttype = {arXiv},
eprint = {1901.00353},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1901-00353.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1902-03698,
author = {Alexandru Paler and
Austin G. Fowler and
Robert Wille},
title = {Reliable quantum circuits have defects},
journal = {CoRR},
volume = {abs/1902.03698},
year = {2019},
url = {http://arxiv.org/abs/1902.03698},
eprinttype = {arXiv},
eprint = {1902.03698},
timestamp = {Tue, 21 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1902-03698.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1905-02477,
author = {Marcel Walter and
Robert Wille and
Frank Sill Torres and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {fiction: An Open Source Framework for the Design of Field-coupled
Nanocomputing Circuits},
journal = {CoRR},
volume = {abs/1905.02477},
year = {2019},
url = {http://arxiv.org/abs/1905.02477},
eprinttype = {arXiv},
eprint = {1905.02477},
timestamp = {Mon, 27 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1905-02477.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1906-02352,
author = {Alwin Zulehner and
Philipp Niemann and
Rolf Drechsler and
Robert Wille},
title = {One Additional Qubit is Enough: Encoded Embeddings for Boolean Components
in Quantum Circuits},
journal = {CoRR},
volume = {abs/1906.02352},
year = {2019},
url = {http://arxiv.org/abs/1906.02352},
eprinttype = {arXiv},
eprint = {1906.02352},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1906-02352.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-12691,
author = {Alwin Zulehner and
Stefan Hillmich and
Robert Wille},
title = {How to Efficiently Handle Complex Values? Implementing Decision Diagrams
for Quantum Computing},
journal = {CoRR},
volume = {abs/1911.12691},
year = {2019},
url = {http://arxiv.org/abs/1911.12691},
eprinttype = {arXiv},
eprint = {1911.12691},
timestamp = {Wed, 08 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-12691.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0045943,
author = {Nils Przigoda and
Robert Wille and
Judith Przigoda and
Rolf Drechsler},
title = {Automated Validation {\&} Verification of {UML/OCL} Models Using
Satisfiability Solvers},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-72814-8},
doi = {10.1007/978-3-319-72814-8},
isbn = {978-3-319-72813-1},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0045943.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cl/PrzigodaNFWD18,
author = {Nils Przigoda and
Philipp Niemann and
Jonas Gomes Filho and
Robert Wille and
Rolf Drechsler},
title = {Frame conditions in the automatic validation and verification of {UML/OCL}
models: {A} symbolic formulation of \emph{modifies only} statements},
journal = {Comput. Lang. Syst. Struct.},
volume = {54},
pages = {512--527},
year = {2018},
url = {https://doi.org/10.1016/j.cl.2017.11.002},
doi = {10.1016/J.CL.2017.11.002},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cl/PrzigodaNFWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/flap/WilleL18,
author = {Robert Wille and
Martin Lukac},
title = {Preface to the Special Issue of the 48th {IEEE} International Symposium
on Multiple Valued Logic},
journal = {{FLAP}},
volume = {5},
number = {9},
pages = {1777--1778},
year = {2018},
url = {https://www.collegepublications.co.uk/downloads/ifcolog00029.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/flap/WilleL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/BandyopadhyayDW18,
author = {Chandan Bandyopadhyay and
Rakesh Das and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Synthesis of circuits based on all-optical Mach-Zehnder Interferometers
using Binary Decision Diagrams},
journal = {Microelectron. J.},
volume = {71},
pages = {19--29},
year = {2018},
url = {https://doi.org/10.1016/j.mejo.2017.11.008},
doi = {10.1016/J.MEJO.2017.11.008},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/BandyopadhyayDW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrimmerHSW18,
author = {Andreas Grimmer and
Werner Haselmayr and
Andreas Springer and
Robert Wille},
title = {Design of Application-Specific Architectures for Networked Labs-on-Chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {1},
pages = {193--202},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2702562},
doi = {10.1109/TCAD.2017.2702562},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrimmerHSW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZulehnerW18,
author = {Alwin Zulehner and
Robert Wille},
title = {One-Pass Design of Reversible Circuits: Combining Embedding and Synthesis
for Reversible Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {5},
pages = {996--1008},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2729468},
doi = {10.1109/TCAD.2017.2729468},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZulehnerW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WangZYHWC18,
author = {Qin Wang and
Hao Zou and
Hailong Yao and
Tsung{-}Yi Ho and
Robert Wille and
Yici Cai},
title = {Physical Co-Design of Flow and Control Layers for Flow-Based Microfluidic
Biochips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {6},
pages = {1157--1170},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2748003},
doi = {10.1109/TCAD.2017.2748003},
timestamp = {Tue, 17 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WangZYHWC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TorresWND18,
author = {Frank Sill Torres and
Robert Wille and
Philipp Niemann and
Rolf Drechsler},
title = {An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular
Automata},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {12},
pages = {3031--3041},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2018.2789782},
doi = {10.1109/TCAD.2018.2789782},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/TorresWND18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GrimmerKHW18,
author = {Andreas Grimmer and
Berislav Klepic and
Tsung{-}Yi Ho and
Robert Wille},
editor = {Youngsoo Shin},
title = {Sound valve-control for programmable microfluidic devices},
booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2018, Jeju, Korea (South), January 22-25, 2018},
pages = {40--45},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASPDAC.2018.8297280},
doi = {10.1109/ASPDAC.2018.8297280},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GrimmerKHW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ZulehnerW18,
author = {Alwin Zulehner and
Robert Wille},
editor = {Youngsoo Shin},
title = {Exploiting coding techniques for logic synthesis of reversible circuits},
booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2018, Jeju, Korea (South), January 22-25, 2018},
pages = {670--675},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASPDAC.2018.8297399},
doi = {10.1109/ASPDAC.2018.8297399},
timestamp = {Mon, 09 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ZulehnerW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WalterWGTD18,
author = {Marcel Walter and
Robert Wille and
Daniel Gro{\ss}e and
Frank Sill Torres and
Rolf Drechsler},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {An exact method for design exploration of quantum-dot cellular automata},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {503--508},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342060},
doi = {10.23919/DATE.2018.8342060},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WalterWGTD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NiemannWD18,
author = {Philipp Niemann and
Robert Wille and
Rolf Drechsler},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Improved synthesis of Clifford+T quantum functionality},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {597--600},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342078},
doi = {10.23919/DATE.2018.8342078},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NiemannWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerPW18,
author = {Alwin Zulehner and
Alexandru Paler and
Robert Wille},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Efficient mapping of quantum circuits to the {IBM} {QX} architectures},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1135--1138},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342181},
doi = {10.23919/DATE.2018.8342181},
timestamp = {Tue, 24 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZulehnerPW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerW18,
author = {Alwin Zulehner and
Robert Wille},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Pushing the number of qubits below the "minimum": Realizing
compact boolean components for quantum logic},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1179--1182},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342192},
doi = {10.23919/DATE.2018.8342192},
timestamp = {Tue, 24 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZulehnerW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BhattacharjeeWH18,
author = {Sukanta Bhattacharjee and
Robert Wille and
Juinn{-}Dar Huang and
Bhargab B. Bhattacharya},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Storage-aware sample preparation using flow-based microfluidic Labs-on-Chip},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1399--1404},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342231},
doi = {10.23919/DATE.2018.8342231},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BhattacharjeeWH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/TorresWWNGD18,
author = {Frank Sill Torres and
Robert Wille and
Marcel Walter and
Philipp Niemann and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Martin Novotn{\'{y}} and
Nikos Konofaos and
Amund Skavhaug},
title = {Evaluating the Impact of Interconnections in Quantum-Dot Cellular
Automata},
booktitle = {21st Euromicro Conference on Digital System Design, {DSD} 2018, Prague,
Czech Republic, August 29-31, 2018},
pages = {649--656},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/DSD.2018.00110},
doi = {10.1109/DSD.2018.00110},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/TorresWWNGD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/Wille0DS18,
author = {Robert Wille and
Bing Li and
Rolf Drechsler and
Ulf Schlichtmann},
editor = {Hiren D. Patel and
Tom J. Kazmierski and
Sebastian Steinhorst},
title = {Automatic Design of Microfluidic Devices},
booktitle = {2018 Forum on Specification {\&} Design Languages, {FDL} 2018,
Garching, Germany, September 10-12, 2018},
pages = {5--16},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/FDL.2018.8524091},
doi = {10.1109/FDL.2018.8524091},
timestamp = {Tue, 29 Nov 2022 08:40:57 +0100},
biburl = {https://dblp.org/rec/conf/fdl/Wille0DS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/VermaPSW18,
author = {Kevin Verma and
Chong Peng and
Kamil Szewc and
Robert Wille},
title = {AMulti-GPU {PCISPH} Implementation with Efficient Memory Transfers},
booktitle = {2018 {IEEE} High Performance Extreme Computing Conference, {HPEC}
2018, Waltham, MA, USA, September 25-27, 2018},
pages = {1--7},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/HPEC.2018.8547542},
doi = {10.1109/HPEC.2018.8547542},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpec/VermaPSW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SaeedCZWD0K18,
author = {Samah Mohamed Saeed and
Xiaotong Cui and
Alwin Zulehner and
Robert Wille and
Rolf Drechsler and
Kaijie Wu and
Ramesh Karri},
editor = {Iris Bahar},
title = {{IC/IP} piracy assessment of reversible logic},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
pages = {5},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765.3240817},
doi = {10.1145/3240765.3240817},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/SaeedCZWD0K18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ZhuLHWYWS18,
author = {Ying Zhu and
Bing Li and
Tsung{-}Yi Ho and
Qin Wang and
Hailong Yao and
Robert Wille and
Ulf Schlichtmann},
editor = {Iris Bahar},
title = {Multi-channel and fault-tolerant control multiplexing for flow-based
microfluidic biochips},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
pages = {123},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765.3240830},
doi = {10.1145/3240765.3240830},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ZhuLHWYWS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleFN18,
author = {Robert Wille and
Austin G. Fowler and
Yehuda Naveh},
editor = {Iris Bahar},
title = {Computer-aided design for quantum computation},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
pages = {128},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765.3267469},
doi = {10.1145/3240765.3267469},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/WilleFN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ictai/ServadeiZDEW18,
author = {Lorenzo Servadei and
Elena Zennaro and
Keerthikumara Devarajegowda and
Wolfgang Ecker and
Robert Wille},
editor = {Ioannis Hatzilygeroudis and
Vasile Palade and
Isidoros Perikos},
title = {Quality Assessment of Generated Hardware Designs Using Statistical
Analysis and Machine Learning},
booktitle = {Proceedings of the 8th International Workshop on Combinations of Intelligent
Methods and Applications co-located with 30th International Conference
on Artificial Intelligence Tools {(ICTAI} 2018), Volos, Greece, November
7, 2018},
series = {{CEUR} Workshop Proceedings},
volume = {2252},
pages = {14--27},
publisher = {CEUR-WS.org},
year = {2018},
url = {https://ceur-ws.org/Vol-2252/paper2.pdf},
timestamp = {Fri, 10 Mar 2023 16:23:22 +0100},
biburl = {https://dblp.org/rec/conf/ictai/ServadeiZDEW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/VermaAW18,
author = {Kevin Verma and
Luis Ayuso and
Robert Wille},
title = {Parallel Simulation of Electrophoretic Deposition for Industrial Automotive
Applications},
booktitle = {2018 International Conference on High Performance Computing {\&}
Simulation, {HPCS} 2018, Orleans, France, July 16-20, 2018},
pages = {468--475},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/HPCS.2018.00080},
doi = {10.1109/HPCS.2018.00080},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/ieeehpcs/VermaAW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/Al-WardiWD18,
author = {Zaid Al{-}Wardi and
Robert Wille and
Rolf Drechsler},
title = {Synthesis of Reversible Circuits Using Conventional Hardware Description
Languages},
booktitle = {48th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2018, Linz, Austria, May 16-18, 2018},
pages = {97--102},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISMVL.2018.00025},
doi = {10.1109/ISMVL.2018.00025},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/Al-WardiWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/ZulehnerRDSW18,
author = {Alwin Zulehner and
P. Mercy Nesa Rani and
Kamalika Datta and
Indranil Sengupta and
Robert Wille},
title = {Generalizing the Concept of Scalable Reversible Circuit Synthesis
for Multiple-Valued Logic},
booktitle = {48th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2018, Linz, Austria, May 16-18, 2018},
pages = {115--120},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISMVL.2018.00028},
doi = {10.1109/ISMVL.2018.00028},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/ZulehnerRDSW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BhattacharjeeBW18,
author = {Anirban Bhattacharjee and
Chandan Bandyopadhyay and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits},
booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
Hong Kong, China, July 8-11, 2018},
pages = {305--310},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISVLSI.2018.00063},
doi = {10.1109/ISVLSI.2018.00063},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BhattacharjeeBW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/NiemannPWD18,
author = {Philipp Niemann and
Nils Przigoda and
Robert Wille and
Rolf Drechsler},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Bran Selic},
title = {Analyzing Frame Conditions in {UML/OCL} Models - Consistency Equivalence
and Independence},
booktitle = {Proceedings of the 6th International Conference on Model-Driven Engineering
and Software Development, {MODELSWARD} 2018, Funchal, Madeira - Portugal,
January 22-24, 2018},
pages = {139--151},
publisher = {SciTePress},
year = {2018},
url = {https://doi.org/10.5220/0006602301390151},
doi = {10.5220/0006602301390151},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/modelsward/NiemannPWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/NiemannPWD18a,
author = {Philipp Niemann and
Nils Przigoda and
Robert Wille and
Rolf Drechsler},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Bran Selic},
title = {Generation and Validation of Frame Conditions in Formal Models},
booktitle = {Model-Driven Engineering and Software Development - 6th International
Conference, {MODELSWARD} 2018, Funchal, Madeira, Portugal, January
22-24, 2018, Revised Selected Papers},
series = {Communications in Computer and Information Science},
volume = {991},
pages = {259--283},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-030-11030-7\_12},
doi = {10.1007/978-3-030-11030-7\_12},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/modelsward/NiemannPWD18a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanocom/HamidovicHGWS18,
author = {Medina Hamidovic and
Werner Haselmayr and
Andreas Grimmer and
Robert Wille and
Andreas Springer},
editor = {J{\'{o}}n Atli Benediktsson and
Falko Dressler},
title = {Comparison of switching principles in microfluidic bus networks},
booktitle = {Proceedings of the 5th {ACM} International Conference on Nanoscale
Computing and Communication, {NANOCOM} 2018, Reykjavik, Iceland, September
05-07, 2018},
pages = {23:1--23:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3233188.3233206},
doi = {10.1145/3233188.3233206},
timestamp = {Mon, 28 Jun 2021 15:15:00 +0200},
biburl = {https://dblp.org/rec/conf/nanocom/HamidovicHGWS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/ZulehnerW18,
author = {Alwin Zulehner and
Robert Wille},
editor = {Jarkko Kari and
Irek Ulidowski},
title = {QMDD-Based One-Pass Design of Reversible Logic: Exploring the Available
Degree of Freedom (Work-in-Progress Report)},
booktitle = {Reversible Computation - 10th International Conference, {RC} 2018,
Leicester, UK, September 12-14, 2018, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11106},
pages = {244--250},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-99498-7\_17},
doi = {10.1007/978-3-319-99498-7\_17},
timestamp = {Tue, 14 May 2019 10:00:38 +0200},
biburl = {https://dblp.org/rec/conf/rc/ZulehnerW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KeszoczeIWCD18,
author = {Oliver Kesz{\"{o}}cze and
Mohamed Ibrahim and
Robert Wille and
Krishnendu Chakrabarty and
Rolf Drechsler},
title = {Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways
on Digital Microfluidic Biochips},
booktitle = {31st International Conference on {VLSI} Design and 17th International
Conference on Embedded Systems, {VLSID} 2018, Pune, India, January
6-10, 2018},
pages = {121--126},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/VLSID.2018.48},
doi = {10.1109/VLSID.2018.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KeszoczeIWCD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/18/WilleCDK18,
author = {Robert Wille and
Krishnendu Chakrabarty and
Rolf Drechsler and
Priyank Kalla},
editor = {Andr{\'{e}} In{\'{a}}cio Reis and
Rolf Drechsler},
title = {Emerging Circuit Technologies: An Overview on the Next Generation
of Circuits},
booktitle = {Advanced Logic Synthesis},
pages = {43--67},
publisher = {Springer},
year = {2018},
url = {https://doi.org/10.1007/978-3-319-67295-3\_3},
doi = {10.1007/978-3-319-67295-3\_3},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/sp/18/WilleCDK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1806-07241,
author = {Alexandru Paler and
Alwin Zulehner and
Robert Wille},
title = {{NISQ} circuit compilers: search space structure and heuristics},
journal = {CoRR},
volume = {abs/1806.07241},
year = {2018},
url = {http://arxiv.org/abs/1806.07241},
eprinttype = {arXiv},
eprint = {1806.07241},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1806-07241.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1809-02421,
author = {Alwin Zulehner and
Michael P. Frank and
Robert Wille},
title = {Design Automation for Adiabatic Circuits},
journal = {CoRR},
volume = {abs/1809.02421},
year = {2018},
url = {http://arxiv.org/abs/1809.02421},
eprinttype = {arXiv},
eprint = {1809.02421},
timestamp = {Fri, 05 Oct 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1809-02421.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1810-01164,
author = {Andreas Grimmer and
Medina Hamidovic and
Werner Haselmayr and
Robert Wille},
title = {Advanced Simulation of Droplet Microfluidics},
journal = {CoRR},
volume = {abs/1810.01164},
year = {2018},
url = {http://arxiv.org/abs/1810.01164},
eprinttype = {arXiv},
eprint = {1810.01164},
timestamp = {Thu, 01 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1810-01164.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-03894,
author = {Frank Sill Torres and
Philipp Niemann and
Robert Wille and
Rolf Drechsler},
title = {Breaking Landauer's Limit{\textbackslash}{\textbackslash}Using Quantum-dot
Cellular Automata},
journal = {CoRR},
volume = {abs/1811.03894},
year = {2018},
url = {http://arxiv.org/abs/1811.03894},
eprinttype = {arXiv},
eprint = {1811.03894},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-03894.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1811-06011,
author = {Alexandru Paler and
Austin G. Fowler and
Robert Wille},
title = {Faster manipulation of large quantum circuits using wire label reference
diagrams},
journal = {CoRR},
volume = {abs/1811.06011},
year = {2018},
url = {http://arxiv.org/abs/1811.06011},
eprinttype = {arXiv},
eprint = {1811.06011},
timestamp = {Mon, 26 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1811-06011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijar/GrimmerCW17,
author = {Andreas Grimmer and
Joachim Clemens and
Robert Wille},
title = {Formal methods for reasoning and uncertainty reduction in evidential
grid maps},
journal = {Int. J. Approx. Reason.},
volume = {87},
pages = {23--39},
year = {2017},
url = {https://doi.org/10.1016/j.ijar.2017.04.006},
doi = {10.1016/J.IJAR.2017.04.006},
timestamp = {Fri, 21 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijar/GrimmerCW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/DebWKSD17,
author = {Arighna Deb and
Robert Wille and
Oliver Kesz{\"{o}}cze and
Saeideh Shirinzadeh and
Rolf Drechsler},
title = {Synthesis of optical circuits using binary decision diagrams},
journal = {Integr.},
volume = {59},
pages = {42--51},
year = {2017},
url = {https://doi.org/10.1016/j.vlsi.2017.05.001},
doi = {10.1016/J.VLSI.2017.05.001},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/DebWKSD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/WilleKOTD17,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Lars Othmer and
Michael Kirkedal Thomsen and
Rolf Drechsler},
title = {An Automated Approach for Generating and Checking Control Logic for
Reversible Hardware Description Language-Based Designs},
journal = {J. Low Power Electron.},
volume = {13},
number = {4},
pages = {633--641},
year = {2017},
url = {https://doi.org/10.1166/jolpe.2017.1515},
doi = {10.1166/JOLPE.2017.1515},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jolpe/WilleKOTD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qic/PalerFW17,
author = {Alexandru Paler and
Austin G. Fowler and
Robert Wille},
title = {Online scheduled execution of quantum circuits protected by surface
codes},
journal = {Quantum Inf. Comput.},
volume = {17},
number = {15{\&}16},
pages = {1335--1348},
year = {2017},
url = {https://doi.org/10.26421/QIC17.15-16-5},
doi = {10.26421/QIC17.15-16-5},
timestamp = {Thu, 29 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qic/PalerFW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qip/HaghparastWM17,
author = {Majid Haghparast and
Robert Wille and
Asma Taheri Monfared},
title = {Towards quantum reversible ternary coded decimal adder},
journal = {Quantum Inf. Process.},
volume = {16},
number = {11},
pages = {284},
year = {2017},
url = {https://doi.org/10.1007/s11128-017-1735-3},
doi = {10.1007/S11128-017-1735-3},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qip/HaghparastWM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AledoPWDS17,
author = {Pablo Gonz{\'{a}}lez de Aledo and
Nils Przigoda and
Robert Wille and
Rolf Drechsler and
Pablo S{\'{a}}nchez Espeso},
title = {Towards a Verification Flow Across Abstraction Levels Verifying Implementations
Against Their Formal Specification},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {3},
pages = {475--488},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2016.2611494},
doi = {10.1109/TCAD.2016.2611494},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AledoPWDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HuhnFWD17,
author = {Sebastian Huhn and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
title = {Enhancing robustness of sequential circuits using application-specific
knowledge and formal methods},
booktitle = {22nd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2017, Chiba, Japan, January 16-19, 2017},
pages = {182--187},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASPDAC.2017.7858317},
doi = {10.1109/ASPDAC.2017.7858317},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HuhnFWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GrimmerWYHW17,
author = {Andreas Grimmer and
Qin Wang and
Hailong Yao and
Tsung{-}Yi Ho and
Robert Wille},
title = {Close-to-optimal placement and routing for continuous-flow microfluidic
biochips},
booktitle = {22nd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2017, Chiba, Japan, January 16-19, 2017},
pages = {530--535},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASPDAC.2017.7858377},
doi = {10.1109/ASPDAC.2017.7858377},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GrimmerWYHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KeszoczeLGWCD17,
author = {Oliver Kesz{\"{o}}cze and
Zipeng Li and
Andreas Grimmer and
Robert Wille and
Krishnendu Chakrabarty and
Rolf Drechsler},
title = {Exact routing for micro-electrode-dot-array digital microfluidic biochips},
booktitle = {22nd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2017, Chiba, Japan, January 16-19, 2017},
pages = {708--713},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASPDAC.2017.7858407},
doi = {10.1109/ASPDAC.2017.7858407},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KeszoczeLGWCD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/GrimmerHSW17,
author = {Andreas Grimmer and
Werner Haselmayr and
Andreas Springer and
Robert Wille},
title = {A Discrete Model for Networked Labs-on-Chips: Linking the Physical
World to Design Automation},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {50:1--50:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062186},
doi = {10.1145/3061639.3062186},
timestamp = {Tue, 06 Nov 2018 16:58:15 +0100},
biburl = {https://dblp.org/rec/conf/dac/GrimmerHSW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerW17,
author = {Alwin Zulehner and
Robert Wille},
editor = {David Atienza and
Giorgio Di Natale},
title = {Make it reversible: Efficient embedding of non-reversible functions},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {458--463},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927033},
doi = {10.23919/DATE.2017.7927033},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/ZulehnerW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZulehnerW17a,
author = {Alwin Zulehner and
Robert Wille},
editor = {David Atienza and
Giorgio Di Natale},
title = {Taking one-to-one mappings for granted: Advanced logic design of encoder
circuits},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {818--823},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927101},
doi = {10.23919/DATE.2017.7927101},
timestamp = {Mon, 14 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/ZulehnerW17a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GrimmerHSW17,
author = {Andreas Grimmer and
Werner Haselmayr and
Andreas Springer and
Robert Wille},
editor = {David Atienza and
Giorgio Di Natale},
title = {Verification of networked Labs-on-Chip architectures},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1679--1684},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927264},
doi = {10.23919/DATE.2017.7927264},
timestamp = {Mon, 14 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GrimmerHSW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/RaucheneckerW17,
author = {Andreas Rauchenecker and
Robert Wille},
editor = {Manfred Dietrich and
Ondrej Nov{\'{a}}k},
title = {An efficient physical design of fully-testable BDD-based circuits},
booktitle = {20th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2017, Dresden, Germany, April 19-21,
2017},
pages = {6--11},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/DDECS.2017.7934560},
doi = {10.1109/DDECS.2017.7934560},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ddecs/RaucheneckerW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecmdafa/GogollaHNW17,
author = {Martin Gogolla and
Frank Hilken and
Philipp Niemann and
Robert Wille},
editor = {Anthony Anjorin and
Hu{\'{a}}scar Espinoza},
title = {Formulating Model Verification Tasks Prover-Independently as {UML}
Diagrams},
booktitle = {Modelling Foundations and Applications - 13th European Conference,
ECMFA@STAF 2017, Marburg, Germany, July 19-20, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10376},
pages = {232--247},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-61482-3\_14},
doi = {10.1007/978-3-319-61482-3\_14},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecmdafa/GogollaHNW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurocast/HaselmayrGW17,
author = {Werner Haselmayr and
Andreas Grimmer and
Robert Wille},
editor = {Roberto Moreno{-}D{\'{\i}}az and
Franz Pichler and
Alexis Quesada{-}Arencibia},
title = {Stochastic Computing Using Droplet-Based Microfluidics},
booktitle = {Computer Aided Systems Theory - {EUROCAST} 2017 - 16th International
Conference, Las Palmas de Gran Canaria, Spain, February 19-24, 2017,
Revised Selected Papers, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {10672},
pages = {204--211},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-74727-9\_24},
doi = {10.1007/978-3-319-74727-9\_24},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/eurocast/HaselmayrGW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fmcad/DijkWM17,
author = {Tom van Dijk and
Robert Wille and
Robert Meolic},
editor = {Daryl Stewart and
Georg Weissenbacher},
title = {Tagged BDDs: Combining reduction rules from different decision diagram
types},
booktitle = {2017 Formal Methods in Computer Aided Design, {FMCAD} 2017, Vienna,
Austria, October 2-6, 2017},
pages = {108--115},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/FMCAD.2017.8102248},
doi = {10.23919/FMCAD.2017.8102248},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/fmcad/DijkWM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/VermaSW17,
author = {Kevin Verma and
Kamil Szewc and
Robert Wille},
title = {Advanced load balancing for {SPH} simulations on multi-GPU architectures},
booktitle = {2017 {IEEE} High Performance Extreme Computing Conference, {HPEC}
2017, Waltham, MA, USA, September 12-14, 2017},
pages = {1--7},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/HPEC.2017.8091093},
doi = {10.1109/HPEC.2017.8091093},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/hpec/VermaSW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/HaselmayrBGZSW17,
author = {Werner Haselmayr and
Andrea Biral and
Andreas Grimmer and
Andrea Zanella and
Andreas Springer and
Robert Wille},
title = {Addressing multiple nodes in networked labs-on-chips without payload
re-injection},
booktitle = {{IEEE} International Conference on Communications, {ICC} 2017, Paris,
France, May 21-25, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICC.2017.7997034},
doi = {10.1109/ICC.2017.7997034},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/icc/HaselmayrBGZSW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DebWD17,
author = {Arighna Deb and
Robert Wille and
Rolf Drechsler},
editor = {Sri Parameswaran},
title = {Dedicated synthesis for MZI-based optical circuits based on AND-inverter
graphs},
booktitle = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
pages = {233--238},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICCAD.2017.8203783},
doi = {10.1109/ICCAD.2017.8203783},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DebWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaeedMZWK17,
author = {Samah Mohamed Saeed and
Nithin Mahendran and
Alwin Zulehner and
Robert Wille and
Ramesh Karri},
title = {Identifying Reversible Circuit Synthesis Approaches to Enable {IP}
Piracy Attacks},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {537--540},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.93},
doi = {10.1109/ICCD.2017.93},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SaeedMZWK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/BornebuschWD17,
author = {Fritjof Bornebusch and
Robert Wille and
Rolf Drechsler},
title = {Towards lightweight satisfiability solvers for self-verification},
booktitle = {7th International Symposium on Embedded Computing and System Design,
{ISED} 2017, Durgapur, India, December 18-20, 2017},
pages = {1--5},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISED.2017.8303924},
doi = {10.1109/ISED.2017.8303924},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ised/BornebuschWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/ZulehnerW17,
author = {Alwin Zulehner and
Robert Wille},
title = {Skipping Embedding in the Design of Reversible Circuits},
booktitle = {47th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2017, Novi Sad, Serbia, May 22-24, 2017},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISMVL.2017.19},
doi = {10.1109/ISMVL.2017.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/ZulehnerW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/Al-WardiWD17,
author = {Zaid Al{-}Wardi and
Robert Wille and
Rolf Drechsler},
title = {Extensions to the Reversible Hardware Description Language SyReC},
booktitle = {47th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2017, Novi Sad, Serbia, May 22-24, 2017},
pages = {185--190},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISMVL.2017.41},
doi = {10.1109/ISMVL.2017.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/Al-WardiWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/DebWD17,
author = {Arighna Deb and
Robert Wille and
Rolf Drechsler},
title = {OR-Inverter Graphs for the Synthesis of Optical Circuits},
booktitle = {47th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2017, Novi Sad, Serbia, May 22-24, 2017},
pages = {278--283},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISMVL.2017.31},
doi = {10.1109/ISMVL.2017.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/DebWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/StoppeKLWD17,
author = {Jannis Stoppe and
Oliver Kesz{\"{o}}cze and
Maximilian Luenert and
Robert Wille and
Rolf Drechsler},
title = {BioViz: An Interactive Visualization Engine for the Design of Digital
Microfluidic Biochips},
booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
Bochum, Germany, July 3-5, 2017},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISVLSI.2017.38},
doi = {10.1109/ISVLSI.2017.38},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/StoppeKLWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/GrimmerHSW17,
author = {Andreas Grimmer and
Werner Haselmayr and
Andreas Springer and
Robert Wille},
editor = {Daniel Gro{\ss}e and
Rolf Drechsler},
title = {Verifikation von Networked Labs-on-Chip Architekturen},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen, {MBMV} 2017, Bremen, Germany, February
8-9, 2017},
pages = {41--42},
publisher = {Shaker Verlag},
year = {2017},
timestamp = {Mon, 20 Nov 2017 10:25:21 +0100},
biburl = {https://dblp.org/rec/conf/mbmv/GrimmerHSW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/PrzigodaNPHWD17,
author = {Nils Przigoda and
Philipp Niemann and
Judith Peters and
Frank Hilken and
Robert Wille and
Rolf Drechsler},
editor = {Jean{-}Pierre Talpin and
Patricia Derler and
Klaus Schneider},
title = {More than true or false: native support of irregular values in the
automatic validation {\&} verification of {UML/OCL} models},
booktitle = {Proceedings of the 15th {ACM-IEEE} International Conference on Formal
Methods and Models for System Design, {MEMOCODE} 2017, Vienna, Austria,
September 29 - October 02, 2017},
pages = {77--86},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3127041.3127053},
doi = {10.1145/3127041.3127053},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memocode/PrzigodaNPHWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mixdes/RaucheneckerOW17,
author = {Andreas Rauchenecker and
Timm Ostermann and
Robert Wille},
title = {Exploiting reversible logic design for implementing adiabatic circuits},
booktitle = {24th International Conference Mixed Design of Integrated Circuits
and Systems, {MIXDES} 2017, Bydgoszcz, Poland, June 22-24, 2017},
pages = {264--270},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/MIXDES.2017.8005196},
doi = {10.23919/MIXDES.2017.8005196},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/mixdes/RaucheneckerOW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/Al-WardiWD17,
author = {Zaid Al{-}Wardi and
Robert Wille and
Rolf Drechsler},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Towards VHDL-Based Design of Reversible Circuits - Work in Progress
Report},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {102--108},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_8},
doi = {10.1007/978-3-319-59936-6\_8},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/Al-WardiWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/KoleWD017,
author = {Abhoy Kole and
Robert Wille and
Kamalika Datta and
Indranil Sengupta},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Test Pattern Generation Effort Evaluation of Reversible Circuits},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {162--175},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_13},
doi = {10.1007/978-3-319-59936-6\_13},
timestamp = {Mon, 26 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/KoleWD017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/SurhonneCW17,
author = {Anmol Prakash Surhonne and
Anupam Chattopadhyay and
Robert Wille},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Automatic Test Pattern Generation for Multiple Missing Gate Faults
in Reversible Circuits - Work in Progress Report},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {176--182},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_14},
doi = {10.1007/978-3-319-59936-6\_14},
timestamp = {Mon, 26 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/SurhonneCW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/ZulehnerGW17,
author = {Alwin Zulehner and
Stefan Gasser and
Robert Wille},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Exact Global Reordering for Nearest Neighbor Quantum Circuits Using
{A} {\^{}}* {\({_\ast}\)}},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {185--201},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_15},
doi = {10.1007/978-3-319-59936-6\_15},
timestamp = {Mon, 26 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/ZulehnerGW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/NiemannZWD17,
author = {Philipp Niemann and
Alwin Zulehner and
Robert Wille and
Rolf Drechsler},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Efficient Construction of QMDDs for Irreversible, Reversible, and
Quantum Functions},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {214--231},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_17},
doi = {10.1007/978-3-319-59936-6\_17},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/NiemannZWD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/ZulehnerW17,
author = {Alwin Zulehner and
Robert Wille},
editor = {Iain Phillips and
Hafizur Rahaman},
title = {Improving Synthesis of Reversible Circuits: Exploiting Redundancies
in Paths and Nodes of QMDDs},
booktitle = {Reversible Computation - 9th International Conference, {RC} 2017,
Kolkata, India, July 6-7, 2017, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {10301},
pages = {232--247},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-59936-6\_18},
doi = {10.1007/978-3-319-59936-6\_18},
timestamp = {Mon, 26 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/ZulehnerW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/WilleL17,
author = {Robert Wille and
Bing Li},
editor = {Massimo Alioto and
Hai Helen Li and
J{\"{u}}rgen Becker and
Ulf Schlichtmann and
Ramalingam Sridhar},
title = {Design automation for Labs-on-Chip: {A} new "playground"
for SoC designers},
booktitle = {30th {IEEE} International System-on-Chip Conference, {SOCC} 2017,
Munich, Germany, September 5-8, 2017},
pages = {1--2},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/SOCC.2017.8225986},
doi = {10.1109/SOCC.2017.8225986},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/WilleL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/SaeedCWZ0DK17,
author = {Samah Mohamed Saeed and
Xiaotong Cui and
Robert Wille and
Alwin Zulehner and
Kaijie Wu and
Rolf Drechsler and
Ramesh Karri},
title = {Towards Reverse Engineering Reversible Logic},
journal = {CoRR},
volume = {abs/1704.08397},
year = {2017},
url = {http://arxiv.org/abs/1704.08397},
eprinttype = {arXiv},
eprint = {1704.08397},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SaeedCWZ0DK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/CuiSZWD0K17,
author = {Xiaotong Cui and
Samah Mohamed Saeed and
Alwin Zulehner and
Robert Wille and
Rolf Drechsler and
Kaijie Wu and
Ramesh Karri},
title = {On the Difficulty of Inserting Trojans in Reversible Computing Architectures},
journal = {CoRR},
volume = {abs/1705.00767},
year = {2017},
url = {http://arxiv.org/abs/1705.00767},
eprinttype = {arXiv},
eprint = {1705.00767},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/CuiSZWD0K17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/ZulehnerW17,
author = {Alwin Zulehner and
Robert Wille},
title = {Advanced Simulation of Quantum Computations: Compact Representation
Rather than Hardware Power},
journal = {CoRR},
volume = {abs/1707.00865},
year = {2017},
url = {http://arxiv.org/abs/1707.00865},
eprinttype = {arXiv},
eprint = {1707.00865},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/ZulehnerW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/shonan-reports/YamashitaHWC17,
author = {Shigeru Yamashita and
Tsung{-}Yi Ho and
Robert Wille and
Krishnendu Chakrabarty},
title = {Microfluidic Biochips: Bridging Biochemistry with Computer Science
and Engineering {(NII} Shonan Meeting 2017-1)},
journal = {{NII} Shonan Meet. Rep.},
volume = {2017},
year = {2017},
url = {https://shonan.nii.ac.jp/seminars/081/},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/shonan-reports/YamashitaHWC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/crossroads/PalerFW16,
author = {Alexandru Paler and
Austin G. Fowler and
Robert Wille},
title = {Reliable quantum circuits have defects},
journal = {{XRDS}},
volume = {23},
number = {1},
pages = {34--38},
year = {2016},
url = {https://doi.org/10.1145/2983541},
doi = {10.1145/2983541},
timestamp = {Fri, 03 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/crossroads/PalerFW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esticas/GaudetBWH16,
author = {Vincent C. Gaudet and
Jon T. Butler and
Robert Wille and
Naofumi Homma},
title = {Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications},
journal = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
volume = {6},
number = {1},
pages = {1--4},
year = {2016},
url = {https://doi.org/10.1109/JETCAS.2016.2529507},
doi = {10.1109/JETCAS.2016.2529507},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/esticas/GaudetBWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cps/PrzigodaSWD16,
author = {Nils Przigoda and
Mathias Soeken and
Robert Wille and
Rolf Drechsler},
title = {Verifying the structure and behavior in {UML/OCL} models using satisfiability
solvers},
journal = {{IET} Cyper-Phys. Syst.: Theory {\&} Appl.},
volume = {1},
number = {1},
pages = {49--59},
year = {2016},
url = {https://doi.org/10.1049/iet-cps.2016.0022},
doi = {10.1049/IET-CPS.2016.0022},
timestamp = {Wed, 22 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cps/PrzigodaSWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WilleSSD16,
author = {Robert Wille and
Eleonora Sch{\"{o}}nborn and
Mathias Soeken and
Rolf Drechsler},
title = {SyReC: {A} hardware description language for the specification and
synthesis of reversible circuits},
journal = {Integr.},
volume = {53},
pages = {39--53},
year = {2016},
url = {https://doi.org/10.1016/j.vlsi.2015.10.001},
doi = {10.1016/J.VLSI.2015.10.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/WilleSSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/PrzigodaWD16,
author = {Nils Przigoda and
Robert Wille and
Rolf Drechsler},
title = {Analyzing Inconsistencies in {UML/OCL} Models},
journal = {J. Circuits Syst. Comput.},
volume = {25},
number = {3},
pages = {1640021:1--1640021:21},
year = {2016},
url = {https://doi.org/10.1142/S0218126616400211},
doi = {10.1142/S0218126616400211},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/PrzigodaWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/DebDRWDB16,
author = {Arighna Deb and
Debesh K. Das and
Hafizur Rahaman and
Robert Wille and
Rolf Drechsler and
Bhargab B. Bhattacharya},
title = {Reversible Synthesis of Symmetric Functions with a Simple Regular
Structure and Easy Testability},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {12},
number = {4},
pages = {34:1--34:29},
year = {2016},
url = {https://doi.org/10.1145/2894757},
doi = {10.1145/2894757},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/DebDRWDB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SoekenWKMD16,
author = {Mathias Soeken and
Robert Wille and
Oliver Kesz{\"{o}}cze and
D. Michael Miller and
Rolf Drechsler},
title = {Embedding of Large Boolean Functions for Reversible Logic},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {12},
number = {4},
pages = {41:1--41:26},
year = {2016},
url = {https://doi.org/10.1145/2786982},
doi = {10.1145/2786982},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/SoekenWKMD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/DebWKHD16,
author = {Arighna Deb and
Robert Wille and
Oliver Kesz{\"{o}}cze and
Stefan Hillmich and
Rolf Drechsler},
title = {Gates vs. Splitters: Contradictory Optimization Objectives in the
Synthesis of Optical Circuits},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {13},
number = {1},
pages = {11:1--11:13},
year = {2016},
url = {https://doi.org/10.1145/2904445},
doi = {10.1145/2904445},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/DebWKHD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NiemannWMTD16,
author = {Philipp Niemann and
Robert Wille and
D. Michael Miller and
Mitchell A. Thornton and
Rolf Drechsler},
title = {QMDDs: Efficient Quantum Function Representation and Manipulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {35},
number = {1},
pages = {86--99},
year = {2016},
url = {https://doi.org/10.1109/TCAD.2015.2459034},
doi = {10.1109/TCAD.2015.2459034},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/NiemannWMTD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WilleKWRCD16,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Marcel Walter and
Patrick Rohrs and
Anupam Chattopadhyay and
Rolf Drechsler},
title = {Look-ahead schemes for nearest neighbor optimization of 1D and 2D
quantum circuits},
booktitle = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
2016, Macao, Macao, January 25-28, 2016},
pages = {292--297},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASPDAC.2016.7428026},
doi = {10.1109/ASPDAC.2016.7428026},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WilleKWRCD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AmaruGW16,
author = {Luca Gaetano Amar{\`{u}} and
Pierre{-}Emmanuel Gaillardon and
Robert Wille and
Giovanni De Micheli},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Exploiting inherent characteristics of reversible circuits for faster
combinational equivalence checking},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {175--180},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459300/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/AmaruGW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleKHWO16,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Stefan Hillmich and
Marcel Walter and
Alberto Garc{\'{\i}}a Ortiz},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Synthesis of approximate coders for on-chip interconnects using reversible
logic},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {1140--1143},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459481/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WilleKHWO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleLSD16,
author = {Robert Wille and
Bing Li and
Ulf Schlichtmann and
Rolf Drechsler},
editor = {Frank Liu},
title = {From biochips to quantum circuits: computer-aided design for emerging
technologies},
booktitle = {Proceedings of the 35th International Conference on Computer-Aided
Design, {ICCAD} 2016, Austin, TX, USA, November 7-10, 2016},
pages = {132},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2966986.2980099},
doi = {10.1145/2966986.2980099},
timestamp = {Fri, 23 Jun 2023 22:29:48 +0200},
biburl = {https://dblp.org/rec/conf/iccad/WilleLSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/BurmanDW0D16,
author = {Shuchishman Burman and
Kamalika Datta and
Robert Wille and
Indranil Sengupta and
Rolf Drechsler},
title = {An improved gate library for logic synthesis of optical circuits},
booktitle = {Sixth International Symposium on Embedded Computing and System Design,
{ISED} 2016, Patna, India, December 15-17, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISED.2016.7977044},
doi = {10.1109/ISED.2016.7977044},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ised/BurmanDW0D16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/WilleKOTD16,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Lars Othmer and
Michael Kirkedal Thomsen and
Rolf Drechsler},
title = {Generating and checking control logic in the HDL-based design of reversible
circuits},
booktitle = {Sixth International Symposium on Embedded Computing and System Design,
{ISED} 2016, Patna, India, December 15-17, 2016},
pages = {7--12},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISED.2016.7977045},
doi = {10.1109/ISED.2016.7977045},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ised/WilleKOTD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/FilhoPWD16,
author = {Jonas Gomes Filho and
Nils Przigoda and
Robert Wille and
Rolf Drechsler},
title = {Towards a model-based verification methodology for Complex Swarm Systems
(Invited paper)},
booktitle = {Sixth International Symposium on Embedded Computing and System Design,
{ISED} 2016, Patna, India, December 15-17, 2016},
pages = {18--23},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISED.2016.7977047},
doi = {10.1109/ISED.2016.7977047},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ised/FilhoPWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/Al-WardiWD16,
author = {Zaid Al{-}Wardi and
Robert Wille and
Rolf Drechsler},
title = {Re-Writing {HDL} Descriptions for Line-Aware Synthesis of Reversible
Circuits},
booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2016, Sapporo, Japan, May 18-20, 2016},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISMVL.2016.36},
doi = {10.1109/ISMVL.2016.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/Al-WardiWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/PrzigodaDWD16,
author = {Nils Przigoda and
Gerhard W. Dueck and
Robert Wille and
Rolf Drechsler},
title = {Fault Detection in Parity Preserving Reversible Circuits},
booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2016, Sapporo, Japan, May 18-20, 2016},
pages = {44--49},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISMVL.2016.44},
doi = {10.1109/ISMVL.2016.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/PrzigodaDWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/RahmanDCW16,
author = {Md. Mazder Rahman and
Gerhard W. Dueck and
Anupam Chattopadhyay and
Robert Wille},
title = {Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free {MCT}
Circuits},
booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2016, Sapporo, Japan, May 18-20, 2016},
pages = {144--149},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISMVL.2016.54},
doi = {10.1109/ISMVL.2016.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/RahmanDCW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/BiswalBCWDR16,
author = {Laxmidhar Biswal and
Chandan Bandyopadhyay and
Anupam Chattopadhyay and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation},
booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2016, Sapporo, Japan, May 18-20, 2016},
pages = {156--161},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISMVL.2016.48},
doi = {10.1109/ISMVL.2016.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/BiswalBCWDR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/NiemannDW16,
author = {Philipp Niemann and
Rhitam Datta and
Robert Wille},
title = {Logic Synthesis for Quantum State Generation},
booktitle = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2016, Sapporo, Japan, May 18-20, 2016},
pages = {247--252},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISMVL.2016.30},
doi = {10.1109/ISMVL.2016.30},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/NiemannDW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/PrzigodaFNWD16,
author = {Nils Przigoda and
Jonas Gomes Filho and
Philipp Niemann and
Robert Wille and
Rolf Drechsler},
title = {Frame conditions in symbolic representations of {UML/OCL} models},
booktitle = {2016 {ACM/IEEE} International Conference on Formal Methods and Models
for System Design, {MEMOCODE} 2016, Kanpur, India, November 18-20,
2016},
pages = {65--70},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/MEMCOD.2016.7797747},
doi = {10.1109/MEMCOD.2016.7797747},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memocode/PrzigodaFNWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/PetersPWD16,
author = {Judith Peters and
Nils Przigoda and
Robert Wille and
Rolf Drechsler},
title = {Clocks vs. instants relations: Verifying {CCSL} time constraints in
{UML/MARTE} models},
booktitle = {2016 {ACM/IEEE} International Conference on Formal Methods and Models
for System Design, {MEMOCODE} 2016, Kanpur, India, November 18-20,
2016},
pages = {78--84},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/MEMCOD.2016.7797750},
doi = {10.1109/MEMCOD.2016.7797750},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/memocode/PetersPWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modellierung/HilkenNGW16,
author = {Frank Hilken and
Philipp Niemann and
Martin Gogolla and
Robert Wille},
editor = {Andreas Oberweis and
Ralf H. Reussner},
title = {Towards a Catalog of Structural and Behavioral Verification Tasks
for {UML/OCL} Models},
booktitle = {Modellierung 2016, 2.-4. M{\"{a}}rz 2016, Karlsruhe},
series = {{LNI}},
volume = {{P-254}},
pages = {117--124},
publisher = {{GI}},
year = {2016},
url = {https://dl.gi.de/handle/20.500.12116/834},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/modellierung/HilkenNGW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/PrzigodaHPWGD16,
author = {Nils Przigoda and
Frank Hilken and
Judith Peters and
Robert Wille and
Martin Gogolla and
Rolf Drechsler},
editor = {Michalis Famelis and
Daniel Ratiu and
Gehan M. K. Selim},
title = {Integrating an SMT-Based ModelFinder into {USE}},
booktitle = {Proceedings of the 13th Workshop on Model-Driven Engineering, Verification
and Validation co-located with {ACM/IEEE} 19th International Conference
on Model Driven Engineering Languages and Systems {(MODELS} 2016),
Saint-Malo, France, October 3, 2016},
series = {{CEUR} Workshop Proceedings},
volume = {1713},
pages = {40--45},
publisher = {CEUR-WS.org},
year = {2016},
url = {https://ceur-ws.org/Vol-1713/MoDeVVa\_2016\_paper\_5.pdf},
timestamp = {Fri, 10 Mar 2023 16:22:21 +0100},
biburl = {https://dblp.org/rec/conf/models/PrzigodaHPWGD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/PrzigodaWD16,
author = {Nils Przigoda and
Robert Wille and
Rolf Drechsler},
editor = {Benoit Baudry and
Beno{\^{\i}}t Combemale},
title = {Ground setting properties for an efficient translation of {OCL} in
SMT-based model finding},
booktitle = {Proceedings of the {ACM/IEEE} 19th International Conference on Model
Driven Engineering Languages and Systems, Saint-Malo, France, October
2-7, 2016},
pages = {261--271},
publisher = {{ACM}},
year = {2016},
url = {http://dl.acm.org/citation.cfm?id=2976780},
timestamp = {Tue, 06 Nov 2018 16:57:17 +0100},
biburl = {https://dblp.org/rec/conf/models/PrzigodaWD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/WilleKOTD16,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Lars Othmer and
Michael Kirkedal Thomsen and
Rolf Drechsler},
editor = {Simon J. Devitt and
Ivan Lanese},
title = {Initial Ideas for Automatic Design and Verification of Control Logic
in Reversible HDLs - Work in Progress Report},
booktitle = {Reversible Computation - 8th International Conference, {RC} 2016,
Bologna, Italy, July 7-8, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9720},
pages = {160--166},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-40578-0\_11},
doi = {10.1007/978-3-319-40578-0\_11},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/WilleKOTD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/WilleQIYM16,
author = {Robert Wille and
Nils Quetschlich and
Yuma Inoue and
Norihito Yasuda and
Shin{-}ichi Minato},
editor = {Simon J. Devitt and
Ivan Lanese},
title = {Using {\textbackslash}pi DDs for Nearest Neighbor Optimization of
Quantum Circuits},
booktitle = {Reversible Computation - 8th International Conference, {RC} 2016,
Bologna, Italy, July 7-8, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9720},
pages = {181--196},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-40578-0\_14},
doi = {10.1007/978-3-319-40578-0\_14},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/WilleQIYM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/WilleLN16,
author = {Robert Wille and
Aaron Lye and
Philipp Niemann},
editor = {Simon J. Devitt and
Ivan Lanese},
title = {Checking Reversibility of Boolean Functions},
booktitle = {Reversible Computation - 8th International Conference, {RC} 2016,
Bologna, Italy, July 7-8, 2016, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9720},
pages = {322--337},
publisher = {Springer},
year = {2016},
url = {https://doi.org/10.1007/978-3-319-40578-0\_23},
doi = {10.1007/978-3-319-40578-0\_23},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/WilleLN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/WilleCD16,
author = {Robert Wille and
Anupam Chattopadhyay and
Rolf Drechsler},
editor = {Walid A. Najjar and
Andreas Gerstlauer},
title = {From reversible logic to quantum circuits: Logic design for an emerging
technology},
booktitle = {International Conference on Embedded Computer Systems: Architectures,
Modeling and Simulation, {SAMOS} 2016, Agios Konstantinos, Samos Island,
Greece, July 17-21, 2016},
pages = {268--274},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/SAMOS.2016.7818357},
doi = {10.1109/SAMOS.2016.7818357},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/WilleCD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/se/NiemannHGW16,
author = {Philipp Niemann and
Frank Hilken and
Martin Gogolla and
Robert Wille},
editor = {Jens Knoop and
Uwe Zdun},
title = {Extracting frame conditions from operation contracts},
booktitle = {Software Engineering 2016, Fachtagung des GI-Fachbereichs Softwaretechnik,
23.-26. Februar 2016, Wien, {\"{O}}sterreich},
series = {{LNI}},
volume = {{P-252}},
pages = {89--90},
publisher = {{GI}},
year = {2016},
url = {https://dl.gi.de/handle/20.500.12116/737},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/se/NiemannHGW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BiswalBWDR16,
author = {Laxmidhar Biswal and
Chandan Bandyopadhyay and
Robert Wille and
Rolf Drechsler and
Hafizur Rahaman},
title = {Improving the Realization of Multiple-Control Toffoli Gates Using
the {NCVW} Quantum Gate Library},
booktitle = {29th International Conference on {VLSI} Design and 15th International
Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
4-8, 2016},
pages = {573--574},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VLSID.2016.23},
doi = {10.1109/VLSID.2016.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BiswalBWDR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fdl/2016,
editor = {Rolf Drechsler and
Robert Wille},
title = {2016 Forum on Specification and Design Languages, {FDL} 2016, Bremen,
Germany, September 14-16, 2016},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7879501/proceeding},
isbn = {979-10-92279-17-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/WilleKDBK15,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Rolf Drechsler and
Tobias Boehnisch and
Alexander Kroker},
title = {Scalable One-Pass Synthesis for Digital Microfluidic Biochips},
journal = {{IEEE} Des. Test},
volume = {32},
number = {6},
pages = {41--50},
year = {2015},
url = {https://doi.org/10.1109/MDAT.2015.2455344},
doi = {10.1109/MDAT.2015.2455344},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/WilleKDBK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WilleKHD15,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Clemens Hopfmuller and
Rolf Drechsler},
title = {Reverse BDD-based synthesis for splitter-free optical circuits},
booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2015, Chiba, Japan, January 19-22, 2015},
pages = {172--177},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASPDAC.2015.7059000},
doi = {10.1109/ASPDAC.2015.7059000},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WilleKHD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LyeWD15,
author = {Aaron Lye and
Robert Wille and
Rolf Drechsler},
title = {Determining the minimal number of swap gates for multi-dimensional
nearest neighbor quantum circuits},
booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2015, Chiba, Japan, January 19-22, 2015},
pages = {178--183},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASPDAC.2015.7059001},
doi = {10.1109/ASPDAC.2015.7059001},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LyeWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/PetersWPKD15,
author = {Judith Peters and
Robert Wille and
Nils Przigoda and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
title = {A generic representation of {CCSL} time constraints for {UML/MARTE}
models},
booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco,
CA, USA, June 7-11, 2015},
pages = {122:1--122:6},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2744769.2744775},
doi = {10.1145/2744769.2744775},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/PetersWPKD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/StoppeWD15,
author = {Jannis Stoppe and
Robert Wille and
Rolf Drechsler},
editor = {Wolfgang Nebel and
David Atienza},
title = {Automated feature localization for dynamically generated SystemC designs},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {277--280},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755814},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/StoppeWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NiemannHGW15,
author = {Philipp Niemann and
Frank Hilken and
Martin Gogolla and
Robert Wille},
editor = {Wolfgang Nebel and
David Atienza},
title = {Assisted generation of frame conditions for formal models},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {309--312},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755822},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NiemannHGW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/PrzigodaWD15,
author = {Nils Przigoda and
Robert Wille and
Rolf Drechsler},
editor = {Zoran Stamenkovic and
Witold A. Pleskacz and
Jaan Raik and
Heinrich Theodor Vierhaus},
title = {Contradiction Analysis for Inconsistent Formal Models},
booktitle = {18th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2015, Belgrade, Serbia, April 22-24,
2015},
pages = {171--176},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DDECS.2015.52},
doi = {10.1109/DDECS.2015.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/PrzigodaWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PrzigodaWD15,
author = {Nils Przigoda and
Robert Wille and
Rolf Drechsler},
title = {Leveraging the Analysis for Invariant Independence in Formal System
Models},
booktitle = {2015 Euromicro Conference on Digital System Design, {DSD} 2015, Madeira,
Portugal, August 26-28, 2015},
pages = {359--366},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DSD.2015.85},
doi = {10.1109/DSD.2015.85},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/PrzigodaWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/PrzigodaSSWD15,
author = {Nils Przigoda and
Jannis Stoppe and
Julia Seiter and
Robert Wille and
Rolf Drechsler},
title = {Verification-Driven Design Across Abstraction Levels: {A} Case Study},
booktitle = {2015 Euromicro Conference on Digital System Design, {DSD} 2015, Madeira,
Portugal, August 26-28, 2015},
pages = {375--382},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DSD.2015.88},
doi = {10.1109/DSD.2015.88},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/PrzigodaSSWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/DrechslerW15,
author = {Rolf Drechsler and
Robert Wille},
title = {Reversible computation},
booktitle = {Sixth International Green and Sustainable Computing Conference, {IGSC}
2015, Las Vegas, NV, USA, December 14-16, 2015},
pages = {1--5},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/IGCC.2015.7393687},
doi = {10.1109/IGCC.2015.7393687},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/green/DrechslerW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleD15,
author = {Robert Wille and
Rolf Drechsler},
editor = {Diana Marculescu and
Frank Liu},
title = {Formal Methods for Emerging Technologies},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {65--70},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372551},
doi = {10.1109/ICCAD.2015.7372551},
timestamp = {Mon, 26 Jun 2023 16:43:56 +0200},
biburl = {https://dblp.org/rec/conf/iccad/WilleD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KeszoczeWCD15,
author = {Oliver Kesz{\"{o}}cze and
Robert Wille and
Krishnendu Chakrabarty and
Rolf Drechsler},
editor = {Diana Marculescu and
Frank Liu},
title = {A General and Exact Routing Methodology for Digital Microfluidic Biochips},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {874--881},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372663},
doi = {10.1109/ICCAD.2015.7372663},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/KeszoczeWCD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmt/HilkenNGW15,
author = {Frank Hilken and
Philipp Niemann and
Martin Gogolla and
Robert Wille},
editor = {Dimitris S. Kolovos and
Manuel Wimmer},
title = {From {UML/OCL} to Base Models: Transformation Concepts for Generic
Validation and Verification},
booktitle = {Theory and Practice of Model Transformations - 8th International Conference,
ICMT@STAF 2015, L'Aquila, Italy, July 20-21, 2015. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9152},
pages = {149--165},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-21155-8\_12},
doi = {10.1007/978-3-319-21155-8\_12},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmt/HilkenNGW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/DebWDD15,
author = {Arighna Deb and
Robert Wille and
Rolf Drechsler and
Debesh K. Das},
title = {An Efficient Reduction of Common Control Lines for Reversible Circuit
Optimization},
booktitle = {2015 {IEEE} International Symposium on Multiple-Valued Logic, Waterloo,
ON, Canada, May 18-20, 2015},
pages = {14--19},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISMVL.2015.26},
doi = {10.1109/ISMVL.2015.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/DebWDD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/Allahyari-Abhari15,
author = {Arman Allahyari{-}Abhari and
Robert Wille and
Rolf Drechsler},
title = {An Examination of the NCV-{\(\vert\)}u1 {\textgreater} Quantum Library
Based on Minimal Circuits},
booktitle = {2015 {IEEE} International Symposium on Multiple-Valued Logic, Waterloo,
ON, Canada, May 18-20, 2015},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISMVL.2015.25},
doi = {10.1109/ISMVL.2015.25},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/Allahyari-Abhari15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/PrzigodaWD15,
author = {Nils Przigoda and
Robert Wille and
Rolf Drechsler},
editor = {Ulrich Heinkel and
Daniel Kriesten and
Marko R{\"{o}}{\ss}ler},
title = {Verbesserung der Fehlersuche in inkonsistenten formalen Modellen (Erweiterte
Zusammenfassung)},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen, {MBMV} 2015, Chemnitz, Germany, March
3-4, 2015},
pages = {165--172},
publisher = {S{\"{a}}chsische Landesbibliothek},
year = {2015},
timestamp = {Sat, 17 Jul 2021 09:02:10 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/PrzigodaWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/PrzigodaPSWD15,
author = {Nils Przigoda and
Judith Peters and
Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Michalis Famelis and
Daniel Ratiu and
Martina Seidl and
Gehan M. K. Selim},
title = {Towards an Automatic Approach for Restricting {UML/OCL} Invariability
Clauses},
booktitle = {Proceedings of the 12th Workshop on Model-Driven Engineering, Verification
and Validation co-located with {ACM/IEEE} 18th International Conference
on Model Driven Engineering Languages and Systems, MoDeVVa@MoDELS
2015, Ottawa, Canada, September 29, 2015},
series = {{CEUR} Workshop Proceedings},
volume = {1514},
pages = {44--47},
publisher = {CEUR-WS.org},
year = {2015},
url = {https://ceur-ws.org/Vol-1514/paper6.pdf},
timestamp = {Fri, 10 Mar 2023 16:22:20 +0100},
biburl = {https://dblp.org/rec/conf/models/PrzigodaPSWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/PrzigodaHWPD15,
author = {Nils Przigoda and
Christoph Hilken and
Robert Wille and
Jan Peleska and
Rolf Drechsler},
editor = {Timothy Lethbridge and
Jordi Cabot and
Alexander Egyed},
title = {Checking concurrent behavior in {UML/OCL} models},
booktitle = {18th {ACM/IEEE} International Conference on Model Driven Engineering
Languages and Systems, MoDELS 2015, Ottawa, ON, Canada, September
30 - October 2, 2015},
pages = {176--185},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/MODELS.2015.7338248},
doi = {10.1109/MODELS.2015.7338248},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/models/PrzigodaHWPD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/NiemannHGW15,
author = {Philipp Niemann and
Frank Hilken and
Martin Gogolla and
Robert Wille},
editor = {Timothy Lethbridge and
Jordi Cabot and
Alexander Egyed},
title = {Extracting frame conditions from operation contracts},
booktitle = {18th {ACM/IEEE} International Conference on Model Driven Engineering
Languages and Systems, MoDELS 2015, Ottawa, ON, Canada, September
30 - October 2, 2015},
pages = {266--275},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/MODELS.2015.7338257},
doi = {10.1109/MODELS.2015.7338257},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/models/NiemannHGW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/modelsward/HilkenPW15,
author = {Christoph Hilken and
Jan Peleska and
Robert Wille},
editor = {Slimane Hammoudi and
Lu{\'{\i}}s Ferreira Pires and
Philippe Desfray and
Joaquim Filipe},
title = {A Unified Formulation of Behavioral Semantics for SysML Models},
booktitle = {{MODELSWARD} 2015 - Proceedings of the 3rd International Conference
on Model-Driven Engineering and Software Development, ESEO, Angers,
Loire Valley, France, 9-11 February, 2015},
pages = {263--271},
publisher = {SciTePress},
year = {2015},
url = {https://doi.org/10.5220/0005241602630271},
doi = {10.5220/0005241602630271},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/modelsward/HilkenPW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/Al-WardiWD15,
author = {Zaid Al{-}Wardi and
Robert Wille and
Rolf Drechsler},
editor = {Jean Krivine and
Jean{-}Bernard Stefani},
title = {Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis
of Reversible Circuits},
booktitle = {Reversible Computation - 7th International Conference, {RC} 2015,
Grenoble, France, July 16-17, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9138},
pages = {233--247},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-20860-2\_15},
doi = {10.1007/978-3-319-20860-2\_15},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/Al-WardiWD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/NiemannBCJW15,
author = {Philipp Niemann and
Saikat Basu and
Amlan Chakrabarti and
Niraj K. Jha and
Robert Wille},
editor = {Jean Krivine and
Jean{-}Bernard Stefani},
title = {Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions},
booktitle = {Reversible Computation - 7th International Conference, {RC} 2015,
Grenoble, France, July 16-17, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9138},
pages = {248--264},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-20860-2\_16},
doi = {10.1007/978-3-319-20860-2\_16},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/NiemannBCJW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/KoleDSW15,
author = {Abhoy Kole and
Kamalika Datta and
Indranil Sengupta and
Robert Wille},
editor = {Jean Krivine and
Jean{-}Bernard Stefani},
title = {Towards a Cost Metric for Nearest Neighbor Constraints in Reversible
Circuits},
booktitle = {Reversible Computation - 7th International Conference, {RC} 2015,
Grenoble, France, July 16-17, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9138},
pages = {273--278},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-319-20860-2\_18},
doi = {10.1007/978-3-319-20860-2\_18},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/KoleDSW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/recosoc/DrechslerFW15,
author = {Rolf Drechsler and
Martin Fr{\"{a}}nzle and
Robert Wille},
title = {Envisioning self-verification of electronic systems},
booktitle = {10th International Symposium on Reconfigurable Communication-centric
Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1,
2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ReCoSoC.2015.7238101},
doi = {10.1109/RECOSOC.2015.7238101},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/recosoc/DrechslerFW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SchonbornDWSRD15,
author = {Eleonora Sch{\"{o}}nborn and
Kamalika Datta and
Robert Wille and
Indranil Sengupta and
Hafizur Rahaman and
Rolf Drechsler},
title = {BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits},
booktitle = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore,
India, January 3-7, 2015},
pages = {435--440},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/VLSID.2015.79},
doi = {10.1109/VLSID.2015.79},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SchonbornDWSRD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dagstuhl-reports/ChakrabartyHW15,
author = {Krishnendu Chakrabarty and
Tsung{-}Yi Ho and
Robert Wille},
title = {Design of Microfluidic Biochips (Dagstuhl Seminar 15352)},
journal = {Dagstuhl Reports},
volume = {5},
number = {8},
pages = {34--53},
year = {2015},
url = {https://doi.org/10.4230/DagRep.5.8.34},
doi = {10.4230/DAGREP.5.8.34},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dagstuhl-reports/ChakrabartyHW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WilleSMD14,
author = {Robert Wille and
Mathias Soeken and
D. Michael Miller and
Rolf Drechsler},
title = {Trading off circuit lines and gate costs in the synthesis of reversible
logic},
journal = {Integr.},
volume = {47},
number = {2},
pages = {284--294},
year = {2014},
url = {https://doi.org/10.1016/j.vlsi.2013.08.002},
doi = {10.1016/J.VLSI.2013.08.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/WilleSMD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/WilleDT14,
author = {Robert Wille and
Rolf Drechsler and
Mehdi Baradaran Tahoori},
title = {Introduction to the Special Issue on Reversible Computation},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {11},
number = {2},
pages = {8:1--8:2},
year = {2014},
url = {https://doi.org/10.1145/2663349},
doi = {10.1145/2663349},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/WilleDT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qip/WilleLD14,
author = {Robert Wille and
Aaron Lye and
Rolf Drechsler},
title = {Considering nearest neighbor constraints of quantum circuits at the
reversible circuit level},
journal = {Quantum Inf. Process.},
volume = {13},
number = {2},
pages = {185--199},
year = {2014},
url = {https://doi.org/10.1007/s11128-013-0642-5},
doi = {10.1007/S11128-013-0642-5},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qip/WilleLD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WilleLD14,
author = {Robert Wille and
Aaron Lye and
Rolf Drechsler},
title = {Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {33},
number = {12},
pages = {1818--1831},
year = {2014},
url = {https://doi.org/10.1109/TCAD.2014.2356463},
doi = {10.1109/TCAD.2014.2356463},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WilleLD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/NiemannWD14,
author = {Philipp Niemann and
Robert Wille and
Rolf Drechsler},
title = {Efficient synthesis of quantum circuits implementing clifford group
operations},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {483--488},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742938},
doi = {10.1109/ASPDAC.2014.6742938},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/NiemannWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WilleLD14,
author = {Robert Wille and
Aaron Lye and
Rolf Drechsler},
title = {Optimal {SWAP} gate insertion for nearest neighbor quantum circuits},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {489--494},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742939},
doi = {10.1109/ASPDAC.2014.6742939},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WilleLD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KeszoczeWHD14,
author = {Oliver Kesz{\"{o}}cze and
Robert Wille and
Tsung{-}Yi Ho and
Rolf Drechsler},
title = {Exact One-pass Synthesis of Digital Microfluidic Biochips},
booktitle = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
Francisco, CA, USA, June 1-5, 2014},
pages = {142:1--142:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2593069.2593135},
doi = {10.1145/2593069.2593135},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/KeszoczeWHD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/SchonbornDWSRD14,
author = {Eleonora Sch{\"{o}}nborn and
Kamalika Datta and
Robert Wille and
Indranil Sengupta and
Hafizur Rahaman and
Rolf Drechsler},
title = {Optimizing DD-based synthesis of reversible circuits using negative
control lines},
booktitle = {17th International Symposium on Design and Diagnostics of Electronic
Circuits {\&} Systems, {DDECS} 2014, Warsaw, Poland, 23-25 April,
2014},
pages = {129--134},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DDECS.2014.6868776},
doi = {10.1109/DDECS.2014.6868776},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/SchonbornDWSRD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/YangWD14,
author = {Shuo Yang and
Robert Wille and
Rolf Drechsler},
title = {Improving Coverage of Simulation-Based Verification by Dedicated Stimuli
Generation},
booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona,
Italy, August 27-29, 2014},
pages = {599--606},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DSD.2014.100},
doi = {10.1109/DSD.2014.100},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/YangWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/HilkenSWKD14,
author = {Christoph Hilken and
Julia Seiter and
Robert Wille and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
title = {Verifying consistency between activity diagrams and their corresponding
{OCL} contracts},
booktitle = {Proceedings of the 2014 Forum on Specification and Design Languages,
{FDL} 2014, Munich, Germany, October 14-16, 2014},
pages = {1--7},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FDL.2014.7119340},
doi = {10.1109/FDL.2014.7119340},
timestamp = {Tue, 15 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/HilkenSWKD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/SeiterWKD14,
author = {Julia Seiter and
Robert Wille and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
title = {Automatic refinement checking for formal system models},
booktitle = {Proceedings of the 2014 Forum on Specification and Design Languages,
{FDL} 2014, Munich, Germany, October 14-16, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FDL.2014.7119339},
doi = {10.1109/FDL.2014.7119339},
timestamp = {Tue, 15 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/SeiterWKD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KeszoczeWD14,
author = {Oliver Kesz{\"{o}}cze and
Robert Wille and
Rolf Drechsler},
editor = {Yao{-}Wen Chang},
title = {Exact routing for digital microfluidic biochips with temporary blockages},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2014, San Jose, CA, USA, November 3-6, 2014},
pages = {405--410},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICCAD.2014.7001383},
doi = {10.1109/ICCAD.2014.7001383},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/KeszoczeWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DrechslerSW14,
author = {Rolf Drechsler and
Mathias Soeken and
Robert Wille},
editor = {Yao{-}Wen Chang},
title = {Automated and quality-driven requirements engineering},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2014, San Jose, CA, USA, November 3-6, 2014},
pages = {586--590},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ICCAD.2014.7001410},
doi = {10.1109/ICCAD.2014.7001410},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DrechslerSW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iceccs/PetersWD14,
author = {Judith Peters and
Robert Wille and
Rolf Drechsler},
title = {Generating SystemC Implementations for Clock Constraints Specified
in {UML/MARTE} {CCSL}},
booktitle = {2014 19th International Conference on Engineering of Complex Computer
Systems, Tianjin, China, August 4-7, 2014},
pages = {116--125},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICECCS.2014.24},
doi = {10.1109/ICECCS.2014.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iceccs/PetersWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/HilkenNWG14,
author = {Frank Hilken and
Philipp Niemann and
Robert Wille and
Martin Gogolla},
editor = {Fr{\'{e}}d{\'{e}}ric Boulanger and
Michalis Famelis and
Daniel Ratiu},
title = {Towards a Base Model for {UML} and {OCL} Verification},
booktitle = {Proceedings of the 11th Workshop on Model-Driven Engineering, Verification
and Validation co-located with 17th International Conference on Model
Driven Engineering Languages and Systems, MoDeVVa@MODELS 2014, Valencia,
Spain, September 30, 2014},
series = {{CEUR} Workshop Proceedings},
volume = {1235},
pages = {59--68},
publisher = {CEUR-WS.org},
year = {2014},
url = {https://ceur-ws.org/Vol-1235/paper-08.pdf},
timestamp = {Fri, 10 Mar 2023 16:22:20 +0100},
biburl = {https://dblp.org/rec/conf/models/HilkenNWG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/WilleSSDD14,
author = {Robert Wille and
Jannis Stoppe and
Eleonora Sch{\"{o}}nborn and
Kamalika Datta and
Rolf Drechsler},
editor = {Shigeru Yamashita and
Shin{-}ichi Minato},
title = {RevVis: Visualization of Structures and Properties in Reversible Circuits},
booktitle = {Reversible Computation - 6th International Conference, {RC} 2014,
Kyoto, Japan, July 10-11, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8507},
pages = {111--124},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-08494-7\_9},
doi = {10.1007/978-3-319-08494-7\_9},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/WilleSSDD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/NiemannWD14,
author = {Philipp Niemann and
Robert Wille and
Rolf Drechsler},
editor = {Shigeru Yamashita and
Shin{-}ichi Minato},
title = {Equivalence Checking in Multi-level Quantum Systems},
booktitle = {Reversible Computation - 6th International Conference, {RC} 2014,
Kyoto, Japan, July 10-11, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8507},
pages = {201--215},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-08494-7\_16},
doi = {10.1007/978-3-319-08494-7\_16},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/NiemannWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/YangWD14,
author = {Shuo Yang and
Robert Wille and
Rolf Drechsler},
editor = {Edward David Moreno Ordonez and
Rodolfo Jardim de Azevedo and
Peter R. Kinget},
title = {Determining Cases of Scenarios to Improve Coverage in Simulation-based
Verification},
booktitle = {Proceedings of the 27th Symposium on Integrated Circuits and Systems
Design, Aracaju, Brazil, September 1-5, 2014},
pages = {11:1--11:7},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2660540.2660979},
doi = {10.1145/2660540.2660979},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/YangWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/StoppeWD14,
author = {Jannis Stoppe and
Robert Wille and
Rolf Drechsler},
editor = {Edward David Moreno Ordonez and
Rodolfo Jardim de Azevedo and
Peter R. Kinget},
title = {Validating SystemC Implementations Against Their Formal Specifications},
booktitle = {Proceedings of the 27th Symposium on Integrated Circuits and Systems
Design, Aracaju, Brazil, September 1-5, 2014},
pages = {13:1--13:8},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2660540.2660981},
doi = {10.1145/2660540.2660981},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/StoppeWD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tap/HilkenNGW14,
author = {Frank Hilken and
Philipp Niemann and
Martin Gogolla and
Robert Wille},
editor = {Martina Seidl and
Nikolai Tillmann},
title = {Filmstripping and Unrolling: {A} Comparison of Verification Approaches
for {UML} and {OCL} Behavioral Models},
booktitle = {Tests and Proofs - 8th International Conference, TAP@STAF 2014, York,
UK, July 24-25, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8570},
pages = {99--116},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-09099-3\_8},
doi = {10.1007/978-3-319-09099-3\_8},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/tap/HilkenNGW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/SoekenWKMD14,
author = {Mathias Soeken and
Robert Wille and
Oliver Kesz{\"{o}}cze and
D. Michael Miller and
Rolf Drechsler},
title = {Embedding of Large Boolean Functions for Reversible Logic},
journal = {CoRR},
volume = {abs/1408.3586},
year = {2014},
url = {http://arxiv.org/abs/1408.3586},
eprinttype = {arXiv},
eprint = {1408.3586},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SoekenWKMD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/WilleSPD13,
author = {Robert Wille and
Mathias Soeken and
Nils Przigoda and
Rolf Drechsler},
title = {Effect of Negative Control Lines on the Exact Synthesis of Reversible
Circuits},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {21},
number = {5-6},
pages = {627--640},
year = {2013},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-21-number-5-6-2013/mvlsc-21-5-6-p-627-640/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/WilleSPD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/africon/WillePD13,
author = {Robert Wille and
Nils Przigoda and
Rolf Drechsler},
title = {A compact and efficient {SAT} encoding for quantum circuits},
booktitle = {{AFRICON} 2013, Pointe aux Piments, Mauritius, September 9-12, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/AFRCON.2013.6757630},
doi = {10.1109/AFRCON.2013.6757630},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/africon/WillePD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/africon/WilleSD13,
author = {Robert Wille and
Simon Stelter and
Rolf Drechsler},
title = {Exploiting reversibility in the complete simulation of reversible
circuits},
booktitle = {{AFRICON} 2013, Pointe aux Piments, Mauritius, September 9-12, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/AFRCON.2013.6757629},
doi = {10.1109/AFRCON.2013.6757629},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/africon/WilleSD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/WilleSOD13,
author = {Robert Wille and
Mathias Soeken and
Christian Otterstedt and
Rolf Drechsler},
title = {Improving the mapping of reversible circuits to quantum circuits using
multiple target lines},
booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2013, Yokohama, Japan, January 22-25, 2013},
pages = {145--150},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ASPDAC.2013.6509587},
doi = {10.1109/ASPDAC.2013.6509587},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/WilleSOD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SeiterWSD13,
author = {Julia Seiter and
Robert Wille and
Mathias Soeken and
Rolf Drechsler},
editor = {Enrico Macii},
title = {Determining relevant model elements for the verification of {UML/OCL}
specifications},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1189--1192},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.247},
doi = {10.7873/DATE.2013.247},
timestamp = {Tue, 15 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SeiterWSD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleGSKD13,
author = {Robert Wille and
Martin Gogolla and
Mathias Soeken and
Mirco Kuhlmann and
Rolf Drechsler},
editor = {Enrico Macii},
title = {Towards a generic verification methodology for system models},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1193--1196},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.248},
doi = {10.7873/DATE.2013.248},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/WilleGSKD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/YangWGD13,
author = {Shuo Yang and
Robert Wille and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {Minimal Stimuli Generation in Simulation-Based Verification},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {439--444},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.55},
doi = {10.1109/DSD.2013.55},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/YangWGD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/StoppeWD13,
author = {Jannis Stoppe and
Robert Wille and
Rolf Drechsler},
title = {Cone of Influence Analysis at the Electronic System Level Using Machine
Learning},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {582--587},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.69},
doi = {10.1109/DSD.2013.69},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/StoppeWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gi/DrechslerW13,
author = {Rolf Drechsler and
Mathias Soeken and
Robert Wille},
editor = {Matthias Horbach},
title = {Text statt {C++:} Automatisierung des Systementwurfs mit Hilfe nat{\"{u}}rlicher
Sprachverarbeitung},
booktitle = {43. Jahrestagung der Gesellschaft f{\"{u}}r Informatik, Informatik
angepasst an Mensch, Organisation und Umwelt, {INFORMATIK} 2013, Koblenz,
Germany, September 16-20, 2013},
series = {{LNI}},
volume = {{P-220}},
pages = {151},
publisher = {{GI}},
year = {2013},
url = {https://dl.gi.de/handle/20.500.12116/20699},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gi/DrechslerW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/EggersglussWD13,
author = {Stephan Eggersgl{\"{u}}{\ss} and
Robert Wille and
Rolf Drechsler},
editor = {J{\"{o}}rg Henkel},
title = {Improved SAT-based {ATPG:} more constraints, better compaction},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
pages = {85--90},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICCAD.2013.6691102},
doi = {10.1109/ICCAD.2013.6691102},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/EggersglussWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/WilleZD13,
author = {Robert Wille and
Hongyan Zhang and
Rolf Drechsler},
title = {Fault Ordering for Automatic Test Pattern Generation of Reversible
Circuits},
booktitle = {43rd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2013, Toyama, Japan, May 22-24, 2013},
pages = {29--34},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISMVL.2013.28},
doi = {10.1109/ISMVL.2013.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/WilleZD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/AbdessaiedSWD13,
author = {Nabila Abdessaied and
Mathias Soeken and
Robert Wille and
Rolf Drechsler},
title = {Exact Template Matching Using Boolean Satisfiability},
booktitle = {43rd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2013, Toyama, Japan, May 22-24, 2013},
pages = {328--333},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISMVL.2013.26},
doi = {10.1109/ISMVL.2013.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/AbdessaiedSWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/StoppeWD13,
author = {Jannis Stoppe and
Robert Wille and
Rolf Drechsler},
title = {Data extraction from SystemC designs using debug symbols and the SystemC
{API}},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2013, Natal,
Brazil, August 5-7, 2013},
pages = {26--31},
publisher = {{IEEE} Computer Socity},
year = {2013},
url = {https://doi.org/10.1109/ISVLSI.2013.6654618},
doi = {10.1109/ISVLSI.2013.6654618},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/StoppeWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/DrechslerDEW13,
author = {Rolf Drechsler and
Melanie Diepenbeck and
Stephan Eggersgl{\"{u}}{\ss} and
Robert Wille},
title = {{PASSAT} 2.0: {A} multi-functional SAT-based testing framework},
booktitle = {14th Latin American Test Workshop, {LATW} 2013, Cordoba, Argentina,
3-5 April, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/LATW.2013.6562675},
doi = {10.1109/LATW.2013.6562675},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/latw/DrechslerDEW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/SoekenWKD13,
author = {Mathias Soeken and
Robert Wille and
Eugen Kuksa and
Rolf Drechsler},
editor = {Christian Haubelt and
Dirk Timmermann},
title = {Generierung von OCL-Ausdr{\"{u}}cken aus nat{\"{u}}rlichsprachlichen
Beschreibungen},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Warnem{\"{u}}nde, Germany,
March 12-14, 2013},
pages = {99--103},
publisher = {Institut f{\"{u}}r Angewandte Mikroelektronik und Datentechnik,
Fakult{\"{a}}t f{\"{u}}r Informatik und Elektrotechnik,
Universit{\"{a}}t Rostock},
year = {2013},
timestamp = {Mon, 18 Mar 2013 20:33:43 +0100},
biburl = {https://dblp.org/rec/conf/mbmv/SoekenWKD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/WilleD13,
author = {Robert Wille and
Rolf Drechsler},
title = {The SyReC hardware description language: Enabling scalable synthesis
of reversible circuits},
booktitle = {{IEEE} 56th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2013, Columbus, OH, USA, August 4-7, 2013},
pages = {1063--1066},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/MWSCAS.2013.6674836},
doi = {10.1109/MWSCAS.2013.6674836},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/WilleD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/NiemannWD13,
author = {Philipp Niemann and
Robert Wille and
Rolf Drechsler},
editor = {Gerhard W. Dueck and
D. Michael Miller},
title = {On the "Q" in QMDDs: Efficient Representation of Quantum
Functionality in the {QMDD} Data-Structure},
booktitle = {Reversible Computation - 5th International Conference, {RC} 2013,
Victoria, BC, Canada, July 4-5, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7948},
pages = {125--140},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-38986-3\_11},
doi = {10.1007/978-3-642-38986-3\_11},
timestamp = {Tue, 24 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rc/NiemannWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/DebDRBWD13,
author = {Arighna Deb and
Debesh K. Das and
Hafizur Rahaman and
Bhargab B. Bhattacharya and
Robert Wille and
Rolf Drechsler},
editor = {Gerhard W. Dueck and
D. Michael Miller},
title = {Reversible Circuit Synthesis of Symmetric Functions Using a Simple
Regular Structure},
booktitle = {Reversible Computation - 5th International Conference, {RC} 2013,
Victoria, BC, Canada, July 4-5, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7948},
pages = {182--195},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-38986-3\_15},
doi = {10.1007/978-3-642-38986-3\_15},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/DebDRBWD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/DattaRWSRD13,
author = {Kamalika Datta and
Gaurav Rathi and
Robert Wille and
Indranil Sengupta and
Hafizur Rahaman and
Rolf Drechsler},
editor = {Gerhard W. Dueck and
D. Michael Miller},
title = {Exploiting Negative Control Lines in the Optimization of Reversible
Circuits},
booktitle = {Reversible Computation - 5th International Conference, {RC} 2013,
Victoria, BC, Canada, July 4-5, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7948},
pages = {209--220},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-38986-3\_17},
doi = {10.1007/978-3-642-38986-3\_17},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/DattaRWSRD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/AbdessaiedWSD13,
author = {Nabila Abdessaied and
Robert Wille and
Mathias Soeken and
Rolf Drechsler},
editor = {Gerhard W. Dueck and
D. Michael Miller},
title = {Reducing the Depth of Quantum Circuits Using Additional Circuit Lines},
booktitle = {Reversible Computation - 5th International Conference, {RC} 2013,
Victoria, BC, Canada, July 4-5, 2013. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7948},
pages = {221--233},
publisher = {Springer},
year = {2013},
url = {https://doi.org/10.1007/978-3-642-38986-3\_18},
doi = {10.1007/978-3-642-38986-3\_18},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/AbdessaiedWSD13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/SasanianWM13,
author = {Zahra Sasanian and
Robert Wille and
D. Michael Miller},
title = {Clarification on the Mapping of Reversible Circuits to the NCV-v1
Library},
journal = {CoRR},
volume = {abs/1309.1419},
year = {2013},
url = {http://arxiv.org/abs/1309.1419},
eprinttype = {arXiv},
eprint = {1309.1419},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SasanianWM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/DrechslerUW12,
author = {Rolf Drechsler and
Irek Ulidowski and
Robert Wille},
title = {Foreword: Special Issue on Reversible Computation},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {18},
number = {1},
pages = {1--3},
year = {2012},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-18-number-1-2012/mvlsc-18-1-p-1-3/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/DrechslerUW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/SoekenFWD12,
author = {Mathias Soeken and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
title = {RevKit: {A} Toolkit for Reversible Circuit Design},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {18},
number = {1},
pages = {55--65},
year = {2012},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-18-number-1-2012/mvlsc-18-1-p-55-65/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/SoekenFWD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/MillerWD12,
author = {D. Michael Miller and
Robert Wille and
Rolf Drechsler},
title = {Reducing Reversible Circuit Cost by Adding Lines},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {19},
number = {1-3},
pages = {185--201},
year = {2012},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-19-number-1-3-2012/mvlsc-19-1-3-p-185-201/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/MillerWD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/WilleGMD12,
author = {Robert Wille and
Daniel Gro{\ss}e and
D. Michael Miller and
Rolf Drechsler},
title = {Equivalence Checking of Reversible Circuits},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {19},
number = {4},
pages = {361--378},
year = {2012},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-19-number-4-2012/mvlsc-19-4-p-361-378/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/WilleGMD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SoekenWHPD12,
author = {Mathias Soeken and
Robert Wille and
Christoph Hilken and
Nils Przigoda and
Rolf Drechsler},
title = {Synthesis of reversible circuits with minimal lines for large functions},
booktitle = {Proceedings of the 17th Asia and South Pacific Design Automation Conference,
{ASP-DAC} 2012, Sydney, Australia, January 30 - February 2, 2012},
pages = {85--92},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ASPDAC.2012.6165069},
doi = {10.1109/ASPDAC.2012.6165069},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SoekenWHPD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SasanianWM12,
author = {Zahra Sasanian and
Robert Wille and
D. Michael Miller},
editor = {Patrick Groeneveld and
Donatella Sciuto and
Soha Hassoun},
title = {Realizing reversible circuits using a new class of quantum gates},
booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
Francisco, CA, USA, June 3-7, 2012},
pages = {36--41},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2228360.2228368},
doi = {10.1145/2228360.2228368},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/SasanianWM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleDOO12,
author = {Robert Wille and
Rolf Drechsler and
Christof Osewold and
Alberto Garc{\'{\i}}a Ortiz},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Automatic design of low-power encoders using reversible circuit synthesis},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1036--1041},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176648},
doi = {10.1109/DATE.2012.6176648},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WilleDOO12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleSD12,
author = {Robert Wille and
Mathias Soeken and
Rolf Drechsler},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Debugging of inconsistent {UML/OCL} models},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1078--1083},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176655},
doi = {10.1109/DATE.2012.6176655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WilleSD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoekenWD12,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Eliminating invariants in {UML/OCL} models},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {1142--1145},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176669},
doi = {10.1109/DATE.2012.6176669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SoekenWD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/YangWGD12,
author = {Shuo Yang and
Robert Wille and
Daniel Gro{\ss}e and
Rolf Drechsler},
title = {Coverage-Driven Stimuli Generation},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {525--528},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.37},
doi = {10.1109/DSD.2012.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/YangWGD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/DrechslerSW12a,
author = {Rolf Drechsler and
Mathias Soeken and
Robert Wille},
editor = {Jan Haase},
title = {Formal Specification Level},
booktitle = {Models, Methods, and Tools for Complex Chip Design - Selected Contributions
from {FDL} 2012},
series = {Lecture Notes in Electrical Engineering},
volume = {265},
pages = {37--52},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-319-01418-0\_3},
doi = {10.1007/978-3-319-01418-0\_3},
timestamp = {Sun, 02 Oct 2022 16:01:15 +0200},
biburl = {https://dblp.org/rec/conf/fdl/DrechslerSW12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/DrechslerSW12,
author = {Rolf Drechsler and
Mathias Soeken and
Robert Wille},
title = {Formal Specification Level: Towards verification-driven design based
on natural language processing},
booktitle = {Proceeding of the 2012 Forum on Specification and Design Languages,
Vienna, Austria, September 18-20, 2012},
pages = {53--58},
publisher = {{IEEE}},
year = {2012},
url = {https://ieeexplore.ieee.org/document/6336984/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/DrechslerSW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gg/DrechslerDGKLSSW12,
author = {Rolf Drechsler and
Melanie Diepenbeck and
Daniel Gro{\ss}e and
Ulrich K{\"{u}}hne and
Hoang Minh Le and
Julia Seiter and
Mathias Soeken and
Robert Wille},
editor = {Hartmut Ehrig and
Gregor Engels and
Hans{-}J{\"{o}}rg Kreowski and
Grzegorz Rozenberg},
title = {Completeness-Driven Development},
booktitle = {Graph Transformations - 6th International Conference, {ICGT} 2012,
Bremen, Germany, September 24-29, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7562},
pages = {38--50},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-33654-6\_3},
doi = {10.1007/978-3-642-33654-6\_3},
timestamp = {Tue, 15 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gg/DrechslerDGKLSSW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/DrechslerHW12,
author = {Rolf Drechsler and
Ian G. Harris and
Robert Wille},
title = {Generating formal system models from natural language descriptions},
booktitle = {2012 {IEEE} International High Level Design Validation and Test Workshop,
{HLDVT} 2012, Huntington Beach, CA, USA, November 9-10, 2012},
pages = {164--165},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HLDVT.2012.6418259},
doi = {10.1109/HLDVT.2012.6418259},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/DrechslerHW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/DrechslerW12,
author = {Rolf Drechsler and
Robert Wille},
title = {Synthesis of Reversible Circuits Using Decision Diagrams},
booktitle = {International Symposium on Electronic System Design, ISEDs 2012, Kolkata,
India, December 19-22, 2012},
pages = {1--5},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISED.2012.37},
doi = {10.1109/ISED.2012.37},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ised/DrechslerW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/WilleSPD12,
author = {Robert Wille and
Mathias Soeken and
Nils Przigoda and
Rolf Drechsler},
editor = {D. Michael Miller and
Vincent C. Gaudet},
title = {Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines},
booktitle = {42nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2012, Victoria, BC, Canada, May 14-16, 2012},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISMVL.2012.71},
doi = {10.1109/ISMVL.2012.71},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/WilleSPD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/SoekenSWMD12,
author = {Mathias Soeken and
Zahra Sasanian and
Robert Wille and
D. Michael Miller and
Rolf Drechsler},
editor = {D. Michael Miller and
Vincent C. Gaudet},
title = {Optimizing the Mapping of Reversible Circuits to Four-Valued Quantum
Gate Circuits},
booktitle = {42nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2012, Victoria, BC, Canada, May 14-16, 2012},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISMVL.2012.64},
doi = {10.1109/ISMVL.2012.64},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/SoekenSWMD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/SoekenWOD12,
author = {Mathias Soeken and
Robert Wille and
Christian Otterstedt and
Rolf Drechsler},
editor = {D. Michael Miller and
Vincent C. Gaudet},
title = {A Synthesis Flow for Sequential Reversible Circuits},
booktitle = {42nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2012, Victoria, BC, Canada, May 14-16, 2012},
pages = {299--304},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISMVL.2012.72},
doi = {10.1109/ISMVL.2012.72},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/SoekenWOD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WilleSSD12,
author = {Robert Wille and
Mathias Soeken and
Eleonora Sch{\"{o}}nborn and
Rolf Drechsler},
title = {Circuit Line Minimization in the HDL-Based Synthesis of Reversible
Logic},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2012, Amherst,
MA, USA, August 19-21, 2012},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISVLSI.2012.43},
doi = {10.1109/ISVLSI.2012.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/WilleSSD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/SeiterSWD12,
author = {Julia Seiter and
Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Robert Gl{\"{u}}ck and
Tetsuo Yokoyama},
title = {Property Checking of Quantum Circuits Using Quantum Multiple-Valued
Decision Diagrams},
booktitle = {Reversible Computation, 4th International Workshop, {RC} 2012, Copenhagen,
Denmark, July 2-3, 2012. Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {7581},
pages = {183--196},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-36315-3\_15},
doi = {10.1007/978-3-642-36315-3\_15},
timestamp = {Tue, 15 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/SeiterSWD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/SoekenWMD12,
author = {Mathias Soeken and
Robert Wille and
Shin{-}ichi Minato and
Rolf Drechsler},
editor = {Robert Gl{\"{u}}ck and
Tetsuo Yokoyama},
title = {Using \emph{{\(\pi\)}}DDs in the Design of Reversible Circuits},
booktitle = {Reversible Computation, 4th International Workshop, {RC} 2012, Copenhagen,
Denmark, July 2-3, 2012. Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {7581},
pages = {197--203},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-36315-3\_16},
doi = {10.1007/978-3-642-36315-3\_16},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/SoekenWMD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tools/SoekenWD12,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Carlo A. Furia and
Sebastian Nanz},
title = {Assisted Behavior Driven Development Using Natural Language Processing},
booktitle = {Objects, Models, Components, Patterns - 50th International Conference,
{TOOLS} 2012, Prague, Czech Republic, May 29-31, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7304},
pages = {269--287},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-30561-0\_19},
doi = {10.1007/978-3-642-30561-0\_19},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/tools/SoekenWD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/DrechslerW12,
author = {Rolf Drechsler and
Robert Wille},
editor = {Hafizur Rahaman and
Sanatan Chattopadhyay and
Santanu Chattopadhyay},
title = {Reversible Circuits: Recent Accomplishments and Future Challenges
for an Emerging Technology - (Invited Paper)},
booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium,
{VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7373},
pages = {383--392},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-31494-0\_53},
doi = {10.1007/978-3-642-31494-0\_53},
timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
biburl = {https://dblp.org/rec/conf/vdat/DrechslerW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/rc/2011,
editor = {Alexis De Vos and
Robert Wille},
title = {Reversible Computation - Third International Workshop, {RC} 2011,
Gent, Belgium, July 4-5, 2011. Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {7165},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-29517-1},
doi = {10.1007/978-3-642-29517-1},
isbn = {978-3-642-29516-4},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/rc/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/WilleGFDD11,
author = {Robert Wille and
Daniel Gro{\ss}e and
Stefan Frehse and
Gerhard W. Dueck and
Rolf Drechsler},
title = {Debugging reversible circuits},
journal = {Integr.},
volume = {44},
number = {1},
pages = {51--61},
year = {2011},
url = {https://doi.org/10.1016/j.vlsi.2010.08.002},
doi = {10.1016/J.VLSI.2010.08.002},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/WilleGFDD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qip/SaeediWD11,
author = {Mehdi Saeedi and
Robert Wille and
Rolf Drechsler},
title = {Synthesis of quantum circuits for linear nearest neighbor architectures},
journal = {Quantum Inf. Process.},
volume = {10},
number = {3},
pages = {355--377},
year = {2011},
url = {https://doi.org/10.1007/s11128-010-0201-2},
doi = {10.1007/S11128-010-0201-2},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qip/SaeediWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/africon/ZhangFWD11,
author = {Hongyan Zhang and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
title = {Determining minimal testsets for reversible circuits using Boolean
satisfiability},
booktitle = {{AFRICON} 2011, Victoria Falls, Livingstone, Zambia, September 13-15,
2011},
pages = {1--6},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/AFRCON.2011.6072128},
doi = {10.1109/AFRCON.2011.6072128},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/africon/ZhangFWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/ZhangWD11,
author = {Hongyan Zhang and
Robert Wille and
Rolf Drechsler},
title = {Improved Fault Diagnosis for Reversible Circuits},
booktitle = {Proceedings of the 20th {IEEE} Asian Test Symposium, {ATS} 2011, New
Delhi, India, November 20-23, 2011},
pages = {207--212},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ATS.2011.29},
doi = {10.1109/ATS.2011.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/ZhangWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoekenWD11,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
title = {Verifying dynamic aspects of {UML} models},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {1077--1082},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763177},
doi = {10.1109/DATE.2011.5763177},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SoekenWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleKD11,
author = {Robert Wille and
Oliver Kesz{\"{o}}cze and
Rolf Drechsler},
title = {Determining the minimal number of lines for large reversible circuits},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {1204--1207},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763314},
doi = {10.1109/DATE.2011.5763314},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WilleKD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/evoW/DrechslerFW11,
author = {Rolf Drechsler and
Alexander Finder and
Robert Wille},
editor = {Cecilia Di Chio and
Anthony Brabazon and
Gianni A. Di Caro and
Rolf Drechsler and
Muddassar Farooq and
J{\"{o}}rn Grahl and
Gary Greenfield and
Christian Prins and
Juan Romero and
Giovanni Squillero and
Ernesto Tarantino and
Andrea Tettamanzi and
Neil Urquhart and
A. Sima Etaner{-}Uyar},
title = {Improving ESOP-Based Synthesis of Reversible Logic Using Evolutionary
Algorithms},
booktitle = {Applications of Evolutionary Computation - EvoApplications 2011: EvoCOMNET,
EvoFIN, EvoHOT, EvoMUSART, EvoSTIM, and EvoTRANSLOG, Torino, Italy,
April 27-29, 2011, Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {6625},
pages = {151--161},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-20520-0\_16},
doi = {10.1007/978-3-642-20520-0\_16},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/evoW/DrechslerFW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/OffermannWD11,
author = {Sebastian Offermann and
Robert Wille and
Rolf Drechsler},
title = {Efficient realization of control logic in reversible circuits},
booktitle = {2011 Forum on Specification {\&} Design Languages, {FDL} 2011,
Oldenburg, Germany, September 13-15, 2011},
pages = {1--7},
publisher = {{IEEE}},
year = {2011},
url = {https://ieeexplore.ieee.org/document/6069484/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/OffermannWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/DrechslerW11,
author = {Rolf Drechsler and
Robert Wille},
editor = {Jaakko Astola and
Radomir S. Stankovic},
title = {From Truth Tables to Programming Languages: Progress in the Design
of Reversible Circuits},
booktitle = {41st {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2011, Tuusula, Finland, May 23-25, 2011},
pages = {78--85},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISMVL.2011.40},
doi = {10.1109/ISMVL.2011.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/DrechslerW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/WilleSGSD11,
author = {Robert Wille and
Mathias Soeken and
Daniel Gro{\ss}e and
Eleonora Sch{\"{o}}nborn and
Rolf Drechsler},
editor = {Jaakko Astola and
Radomir S. Stankovic},
title = {Designing a {RISC} {CPU} in Reversible Logic},
booktitle = {41st {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2011, Tuusula, Finland, May 23-25, 2011},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISMVL.2011.39},
doi = {10.1109/ISMVL.2011.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/WilleSGSD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/MillerWS11,
author = {D. Michael Miller and
Robert Wille and
Zahra Sasanian},
editor = {Jaakko Astola and
Radomir S. Stankovic},
title = {Elementary Quantum Gate Realizations for Multiple-Control Toffoli
Gates},
booktitle = {41st {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2011, Tuusula, Finland, May 23-25, 2011},
pages = {288--293},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISMVL.2011.54},
doi = {10.1109/ISMVL.2011.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/MillerWS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WilleZD11,
author = {Robert Wille and
Hongyan Zhang and
Rolf Drechsler},
title = {{ATPG} for Reversible Circuits Using Simulation, Boolean Satisfiability,
and Pseudo Boolean Optimization},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2011, 4-6
July 2011, Chennai, India},
pages = {120--125},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISVLSI.2011.77},
doi = {10.1109/ISVLSI.2011.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/WilleZD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/WilleSGSD11,
author = {Robert Wille and
Mathias Soeken and
Daniel Gro{\ss}e and
Eleonora Sch{\"{o}}nborn and
Rolf Drechsler},
editor = {Frank Oppenheimer},
title = {Designing a {RISC} {CPU} in Reversible Logic},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Oldenburg, Germany, February
21-23, 2011},
pages = {249--258},
publisher = {OFFIS-Institut f{\"{u}}r Informatik},
year = {2011},
timestamp = {Wed, 27 Jun 2012 22:40:36 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/WilleSGSD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/models/SoekenWD11,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Stephan Wei{\ss}leder and
Levi L{\'{u}}cio and
Harald Cichos and
Fr{\'{e}}d{\'{e}}ric Fondement},
title = {Towards automatic determination of problem bounds for object instantiation
in static model verification},
booktitle = {Proceedings of the 8th International Workshop on Model-Driven Engineering,
Verification and Validation, MoDeVVa, Wellington, New Zealand, October
17, 2011},
pages = {2:1--2:4},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2095654.2095657},
doi = {10.1145/2095654.2095657},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/models/SoekenWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rc/SoekenFWD11,
author = {Mathias Soeken and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
editor = {Alexis De Vos and
Robert Wille},
title = {RevKit: An Open Source Toolkit for the Design of Reversible Circuits},
booktitle = {Reversible Computation - Third International Workshop, {RC} 2011,
Gent, Belgium, July 4-5, 2011. Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {7165},
pages = {64--76},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-29517-1\_6},
doi = {10.1007/978-3-642-29517-1\_6},
timestamp = {Sun, 02 Jun 2019 21:17:32 +0200},
biburl = {https://dblp.org/rec/conf/rc/SoekenFWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tap/SoekenWD11,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Martin Gogolla and
Burkhart Wolff},
title = {Encoding {OCL} Data Types for SAT-Based Verification of {UML/OCL}
Models},
booktitle = {Tests and Proofs - 5th International Conference, TAP@TOOLS 2011, Zurich,
Switzerland, June 30 - July 1, 2011. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6706},
pages = {152--170},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-21768-5\_12},
doi = {10.1007/978-3-642-21768-5\_12},
timestamp = {Tue, 23 Jun 2020 17:37:39 +0200},
biburl = {https://dblp.org/rec/conf/tap/SoekenWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/SaeediWD11,
author = {Mehdi Saeedi and
Robert Wille and
Rolf Drechsler},
title = {Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures},
journal = {CoRR},
volume = {abs/1110.6412},
year = {2011},
url = {http://arxiv.org/abs/1110.6412},
eprinttype = {arXiv},
eprint = {1110.6412},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/SaeediWD11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dagstuhl-reports/MoritaW11,
author = {Kenichi Morita and
Robert Wille},
title = {Design of Reversible and Quantum Circuits (Dagstuhl Seminar 11502)},
journal = {Dagstuhl Reports},
volume = {1},
number = {12},
pages = {47--61},
year = {2011},
url = {https://doi.org/10.4230/DagRep.1.12.47},
doi = {10.4230/DAGREP.1.12.47},
timestamp = {Wed, 07 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dagstuhl-reports/MoritaW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:books/daglib/0025733,
author = {Robert Wille and
Rolf Drechsler},
title = {Towards a Design Flow for Reversible Logic},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-90-481-9579-4},
doi = {10.1007/978-90-481-9579-4},
isbn = {978-90-481-9578-7},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0025733.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijamc-igi/WilleD10,
author = {Robert Wille and
Rolf Drechsler},
title = {BDD-Based Synthesis of Reversible Logic},
journal = {Int. J. Appl. Metaheuristic Comput.},
volume = {1},
number = {4},
pages = {25--41},
year = {2010},
url = {https://doi.org/10.4018/jamc.2010100102},
doi = {10.4018/JAMC.2010100102},
timestamp = {Tue, 29 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijamc-igi/WilleD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/WilleD10,
author = {Robert Wille and
Rolf Drechsler},
title = {Synthese reversibler Logik (Synthesizing Reversible Logic)},
journal = {it Inf. Technol.},
volume = {52},
number = {1},
pages = {30--38},
year = {2010},
url = {https://doi.org/10.1524/itit.2010.0568},
doi = {10.1524/ITIT.2010.0568},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/it/WilleD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WilleSD10,
author = {Robert Wille and
Mathias Soeken and
Rolf Drechsler},
editor = {Sachin S. Sapatnekar},
title = {Reducing the number of lines in reversible circuits},
booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010,
Anaheim, California, USA, July 13-18, 2010},
pages = {647--652},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1837274.1837439},
doi = {10.1145/1837274.1837439},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WilleSD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoekenWKGD10,
author = {Mathias Soeken and
Robert Wille and
Mirco Kuhlmann and
Martin Gogolla and
Rolf Drechsler},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Verifying {UML/OCL} models using Boolean satisfiability},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1341--1344},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457017},
doi = {10.1109/DATE.2010.5457017},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/SoekenWKGD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/OffermannWDD10,
author = {Sebastian Offermann and
Robert Wille and
Gerhard W. Dueck and
Rolf Drechsler},
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {Synthesizing multiplier in reversible logic},
booktitle = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
pages = {335--340},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DDECS.2010.5491757},
doi = {10.1109/DDECS.2010.5491757},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/OffermannWDD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/SoekenWDD10,
author = {Mathias Soeken and
Robert Wille and
Gerhard W. Dueck and
Rolf Drechsler},
editor = {Elena Gramatov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Andreas Steininger and
Heinrich Theodor Vierhaus and
Horst Zimmermann},
title = {Window optimization of reversible and quantum circuits},
booktitle = {13th {IEEE} International Symposium on Design and Diagnostics of Electronic
Circuits and Systems, {DDECS} 2010, Vienna, Austria, April 14-16,
2010},
pages = {341--345},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DDECS.2010.5491754},
doi = {10.1109/DDECS.2010.5491754},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/SoekenWDD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/WilleOD10,
author = {Robert Wille and
Sebastian Offermann and
Rolf Drechsler},
editor = {Adam Morawiec and
Jinnie Hinderscheit},
title = {SyReC: {A} Programming Language for Synthesis of Reversible Circuits},
booktitle = {Proceedings of the 2010 Forum on specification {\&} Design Languages,
{FDL} 2010, September 14-16, 2010, Southampton, {UK}},
pages = {184--189},
publisher = {ECSI, Electronic Chips {\&} Systems design Initiative},
year = {2010},
timestamp = {Fri, 25 Feb 2011 17:44:56 +0100},
biburl = {https://dblp.org/rec/conf/fdl/WilleOD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gg/KreowskiKW10,
author = {Hans{-}J{\"{o}}rg Kreowski and
Sabine Kuske and
Robert Wille},
editor = {Hartmut Ehrig and
Arend Rensink and
Grzegorz Rozenberg and
Andy Sch{\"{u}}rr},
title = {Graph Transformation Units Guided by a {SAT} Solver},
booktitle = {Graph Transformations - 5th International Conference, {ICGT} 2010,
Enschede, The Netherlands, September 27 - - October 2, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {6372},
pages = {27--42},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-15928-2\_3},
doi = {10.1007/978-3-642-15928-2\_3},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gg/KreowskiKW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JungFWD10,
author = {Jean Christoph Jung and
Stefan Frehse and
Robert Wille and
Rolf Drechsler},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Enhancing debugging of multiple missing control errors in reversible
logic},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {465--470},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785588},
doi = {10.1145/1785481.1785588},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JungFWD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/SoekenWD10,
author = {Mathias Soeken and
Robert Wille and
Rolf Drechsler},
editor = {Yervant Zorian and
Imtinan Elahi and
Andr{\'{e}} Ivanov and
Ashraf Salem},
title = {Hierarchical synthesis of reversible circuits using positive and negative
Davio decomposition},
booktitle = {5th International Design and Test Workshop, {IDT} 2010, Abu Dhabi,
UAE, 14-15 December 2010},
pages = {143--148},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IDT.2010.5724427},
doi = {10.1109/IDT.2010.5724427},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/idt/SoekenWD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/idt/ZhangWD10,
author = {Hongyan Zhang and
Robert Wille and
Rolf Drechsler},
editor = {Yervant Zorian and
Imtinan Elahi and
Andr{\'{e}} Ivanov and
Ashraf Salem},
title = {SAT-based {ATPG} for reversible circuits},
booktitle = {5th International Design and Test Workshop, {IDT} 2010, Abu Dhabi,
UAE, 14-15 December 2010},
pages = {149--154},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/IDT.2010.5724428},
doi = {10.1109/IDT.2010.5724428},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/idt/ZhangWD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/FrehseWD10,
author = {Stefan Frehse and
Robert Wille and
Rolf Drechsler},
title = {Efficient Simulation-Based Debugging of Reversible Logic},
booktitle = {40th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2010, Barcelona, Spain, 26-28 May 2010},
pages = {156--161},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISMVL.2010.37},
doi = {10.1109/ISMVL.2010.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/FrehseWD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/MillerWD10,
author = {D. Michael Miller and
Robert Wille and
Rolf Drechsler},
title = {Reducing Reversible Circuit Cost by Adding Lines},
booktitle = {40th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
2010, Barcelona, Spain, 26-28 May 2010},
pages = {217--222},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISMVL.2010.48},
doi = {10.1109/ISMVL.2010.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/MillerWD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/WilleOD10,
author = {Robert Wille and
Sebastian Offermann and
Rolf Drechsler},
editor = {Manfred Dietrich},
title = {SyReC: {A} Programming Language for Synthesis of Reversible Circuits},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Dresden, Germany, February 22-24,
2010},
pages = {21--30},
publisher = {Fraunhofer Verlag},
year = {2010},
timestamp = {Thu, 28 Jun 2012 08:20:28 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/WilleOD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/SoekenWKGD10,
author = {Mathias Soeken and
Robert Wille and
Mirco Kuhlmann and
Martin Gogolla and
Rolf Drechsler},
editor = {Manfred Dietrich},
title = {Verifying {UML/OCL} Models Using Boolean Satisfiability},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Dresden, Germany, February 22-24,
2010},
pages = {57--66},
publisher = {Fraunhofer Verlag},
year = {2010},
timestamp = {Thu, 28 Jun 2012 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/SoekenWKGD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/de/Wille2009,
author = {Robert Wille},
title = {Towards a design flow for reversible logic},
school = {University of Bremen},
year = {2009},
url = {https://d-nb.info/100013850X},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/de/Wille2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mvl/GrosseWDD09,
author = {Daniel Gro{\ss}e and
Robert Wille and
Gerhard W. Dueck and
Rolf Drechsler},
title = {Exact Synthesis of Elementary Quantum Gate Circuits},
journal = {J. Multiple Valued Log. Soft Comput.},
volume = {15},
number = {4},
pages = {283--300},
year = {2009},
url = {http://www.oldcitypublishing.com/journals/mvlsc-home/mvlsc-issue-contents/mvlsc-volume-15-number-4-2009/mvlsc-15-4-p-283-300/},
timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mvl/GrosseWDD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GrosseWDD09,
author = {Daniel Gro{\ss}e and
Robert Wille and
Gerhard W. Dueck and
Rolf Drechsler},
title = {Exact Multiple-Control Toffoli Network Synthesis With {SAT} Techniques},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {5},
pages = {703--715},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2017215},
doi = {10.1109/TCAD.2009.2017215},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GrosseWDD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WilleD09,
author = {Robert Wille and
Rolf Drechsler},
title = {BDD-based synthesis of reversible logic for large functions},
booktitle = {Proceedings of the 46th Design Automation Conference, {DAC} 2009,
San Francisco, CA, USA, July 26-31, 2009},
pages = {270--275},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629911.1629984},
doi = {10.1145/1629911.1629984},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/WilleD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleGFDD09,
author = {Robert Wille and
Daniel Gro{\ss}e and
Stefan Frehse and
Gerhard W. Dueck and
Rolf Drechsler},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Debugging of Toffoli networks},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1284--1289},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090863},
doi = {10.1109/DATE.2009.5090863},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/WilleGFDD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MillerWD09,
author = {D. Michael Miller and
Robert Wille and
Gerhard W. Dueck},
editor = {Antonio N{\'{u}}{\~{n}}ez and
Pedro P. Carballo},
title = {Synthesizing Reversible Circuits for Irreversible Functions},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures,
Methods and Tools, {DSD} 2009, 27-29 August 2009, Patras, Greece},
pages = {749--756},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DSD.2009.186},
doi = {10.1109/DSD.2009.186},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MillerWD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/WilleGHD09,
author = {Robert Wille and
Daniel Gro{\ss}e and
Finn Haedicke and
Rolf Drechsler},
title = {SMT-based stimuli generation in the SystemC Verification library},
booktitle = {Forum on specification and Design Languages, {FDL} 2009, September
22-24, 2009, Sophia Antipolis, France, Proceedings},
pages = {1--6},
publisher = {{IEEE}},
year = {2009},
url = {https://ieeexplore.ieee.org/document/5404070/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/WilleGHD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GrosseWKD09,
author = {Daniel Gro{\ss}e and
Robert Wille and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
editor = {Fabrizio Lombardi and
Sanjukta Bhanja and
Yehia Massoud and
R. Iris Bahar},
title = {Contradictory antecedent debugging in bounded model checking},
booktitle = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
Boston Area, MA, USA, May 10-12 2009},
pages = {173--176},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531542.1531586},
doi = {10.1145/1531542.1531586},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GrosseWKD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/SulflowWFD09,
author = {Andr{\'{e}} S{\"{u}}lflow and
Robert Wille and
G{\"{o}}rschwin Fey and
Rolf Drechsler},
title = {Evaluation of Cardinality Constraints on SMT-Based Debugging},
booktitle = {{ISMVL} 2009, 39th International Symposium on Multiple-Valued Logic,
21-23 May 2009, Naha, Okinawaw, Japan},
pages = {298--303},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISMVL.2009.28},
doi = {10.1109/ISMVL.2009.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/SulflowWFD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/WilleGMD09,
author = {Robert Wille and
Daniel Gro{\ss}e and
D. Michael Miller and
Rolf Drechsler},
title = {Equivalence Checking of Reversible Circuits},
booktitle = {{ISMVL} 2009, 39th International Symposium on Multiple-Valued Logic,
21-23 May 2009, Naha, Okinawaw, Japan},
pages = {324--330},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISMVL.2009.19},
doi = {10.1109/ISMVL.2009.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/WilleGMD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/WilleGMD09,
author = {Robert Wille and
Daniel Gro{\ss}e and
D. Michael Miller and
Rolf Drechsler},
editor = {Carsten Gremzow and
Nico Moser},
title = {Equivalence Checking of Reversible Circuits},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Berlin, Germany, March 2-4, 2009},
pages = {67--76},
publisher = {Universit{\"{a}}tsbibliothek Berlin, Germany},
year = {2009},
timestamp = {Thu, 28 Jun 2012 08:33:25 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/WilleGMD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WilleGDD09,
author = {Robert Wille and
Daniel Gro{\ss}e and
Gerhard W. Dueck and
Rolf Drechsler},
title = {Reversible Logic Synthesis with Output Permutation},
booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
The 22nd International Conference on {VLSI} Design, New Delhi, India,
5-9 January 2009},
pages = {189--194},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VLSI.Design.2009.40},
doi = {10.1109/VLSI.DESIGN.2009.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WilleGDD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/entcs/WilleD10,
author = {Robert Wille and
Rolf Drechsler},
editor = {Irek Ulidowski},
title = {Effect of {BDD} Optimization on Synthesis of Reversible and Quantum
Logic},
booktitle = {Proceedings of the Workshop on Reversible Computation, RC@ETAPS 2009,
York, UK, March 22, 2009},
series = {Electronic Notes in Theoretical Computer Science},
volume = {253},
number = {6},
pages = {57--70},
publisher = {Elsevier},
year = {2009},
url = {https://doi.org/10.1016/j.entcs.2010.02.006},
doi = {10.1016/J.ENTCS.2010.02.006},
timestamp = {Fri, 24 Feb 2023 15:38:09 +0100},
biburl = {https://dblp.org/rec/journals/entcs/WilleD10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:conf/gi/Wille09,
author = {Robert Wille},
editor = {Abraham Bernstein and
Steffen H{\"{o}}lldobler and
G{\"{u}}nter Hotz and
Klaus{-}Peter L{\"{o}}hr and
Paul Molitor and
Gustaf Neumann and
R{\"{u}}diger Reischuk and
Dietmar Saupe and
Myra Spiliopoulou and
Harald St{\"{o}}rrle and
Dorothea Wagner},
title = {Ein Entwurfsablauf f{\"{u}}r Reversible Schaltkreise},
booktitle = {Ausgezeichnete Informatikdissertationen 2009},
series = {{LNI}},
volume = {{D-10}},
pages = {291--300},
publisher = {{GI}},
year = {2009},
url = {https://dl.gi.de/handle/20.500.12116/33680},
timestamp = {Tue, 04 Jul 2023 17:43:57 +0200},
biburl = {https://dblp.org/rec/conf/gi/Wille09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dagstuhl/WilleJSD09,
author = {Robert Wille and
Jean Christoph Jung and
Andr{\'{e}} S{\"{u}}lflow and
Rolf Drechsler},
editor = {Bernd Becker and
V. Bertacoo and
Rolf Drechsler and
Masahiro Fujita},
title = {{SWORD} - Module-based {SAT} Solving},
booktitle = {Algorithms and Applications for Next Generation {SAT} Solvers, 08.11.
- 13.11.2009},
series = {Dagstuhl Seminar Proceedings},
volume = {09461},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik, Germany},
year = {2009},
url = {http://drops.dagstuhl.de/opus/volltexte/2010/2506/},
timestamp = {Thu, 10 Jun 2021 13:02:06 +0200},
biburl = {https://dblp.org/rec/conf/dagstuhl/WilleJSD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/WilleLDG08,
author = {Robert Wille and
Hoang Minh Le and
Gerhard W. Dueck and
Daniel Gro{\ss}e},
editor = {Donatella Sciuto},
title = {Quantified Synthesis of Reversible Logic},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {1015--1020},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484814},
doi = {10.1109/DATE.2008.4484814},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/WilleLDG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/WilleFMALD08,
author = {Robert Wille and
G{\"{o}}rschwin Fey and
Marc Messing and
Gerhard Angst and
Lothar Linhard and
Rolf Drechsler},
editor = {Luca Fanucci},
title = {Identifying a Subset of System Verilog Assertions for Efficient Bounded
Model Checking},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {542--549},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.53},
doi = {10.1109/DSD.2008.53},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/WilleFMALD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GrosseWSD08,
author = {Daniel Gro{\ss}e and
Robert Wille and
Robert Siegmund and
Rolf Drechsler},
title = {Contradiction Analysis for Constraint-based Random Simulation},
booktitle = {Forum on specification and Design Languages, {FDL} 2008, September
23-25, 2008, Stuttgart, Germany, Proceedings},
pages = {130--135},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FDL.2008.4641434},
doi = {10.1109/FDL.2008.4641434},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/fdl/GrosseWSD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GrosseWSD08a,
author = {Daniel Gro{\ss}e and
Robert Wille and
Robert Siegmund and
Rolf Drechsler},
editor = {Martin Radetzki},
title = {Debugging Contradictory Constraints in Constraint-Based Random Simulation},
booktitle = {Languages for Embedded Systems and their Applications - Selected Contributions
on Specification, Design, and Verification from FDL'08, September
23-25, 2008, Stuttgart, Germany},
series = {Lecture Notes in Electrical Engineering},
volume = {36},
pages = {273--290},
year = {2008},
url = {https://doi.org/10.1007/978-1-4020-9714-0\_18},
doi = {10.1007/978-1-4020-9714-0\_18},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/GrosseWSD08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/GrosseWDD08,
author = {Daniel Gro{\ss}e and
Robert Wille and
Gerhard W. Dueck and
Rolf Drechsler},
title = {Exact Synthesis of Elementary Quantum Gate Circuits for Reversible
Functions with Don't Cares},
booktitle = {38th {IEEE} International Symposium on Multiple-Valued Logic {(ISMVL}
2008), 22-23 May 2008, Dallas, Texas, {USA}},
pages = {214--219},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISMVL.2008.42},
doi = {10.1109/ISMVL.2008.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/GrosseWDD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ismvl/WilleGTDD08,
author = {Robert Wille and
Daniel Gro{\ss}e and
Lisa Teuber and
Gerhard W. Dueck and
Rolf Drechsler},
title = {RevLib: An Online Resource for Reversible Functions and Reversible
Circuits},
booktitle = {38th {IEEE} International Symposium on Multiple-Valued Logic {(ISMVL}
2008), 22-23 May 2008, Dallas, Texas, {USA}},
pages = {220--225},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISMVL.2008.43},
doi = {10.1109/ISMVL.2008.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ismvl/WilleGTDD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WilleGSD08,
author = {Robert Wille and
Daniel Gro{\ss}e and
Mathias Soeken and
Rolf Drechsler},
title = {Using Higher Levels of Abstraction for Solving Optimization Problems
by Boolean Satisfiability},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {411--416},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.82},
doi = {10.1109/ISVLSI.2008.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/WilleGSD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/GrosseWKD08,
author = {Daniel Gro{\ss}e and
Robert Wille and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
editor = {Christoph Scholl and
Stefan Disch},
title = {Using Contradiction Analysis for Antecedent Debugging in Bounded Model
Checking},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Freiburg, Germany, March 3-5,
2008},
pages = {169--178},
publisher = {Shaker},
year = {2008},
timestamp = {Wed, 03 Aug 2022 12:31:57 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/GrosseWKD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WilleG07,
author = {Robert Wille and
Daniel Gro{\ss}e},
editor = {Georges G. E. Gielen},
title = {Fast exact Toffoli network synthesis of reversible logic},
booktitle = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
San Jose, CA, USA, November 5-8, 2007},
pages = {60--64},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICCAD.2007.4397244},
doi = {10.1109/ICCAD.2007.4397244},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/WilleG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/FeyGEWD07,
author = {G{\"{o}}rschwin Fey and
Daniel Gro{\ss}e and
Stephan Eggersgl{\"{u}}{\ss} and
Robert Wille and
Rolf Drechsler},
editor = {Christian Haubelt and
J{\"{u}}rgen Teich},
title = {Formal Verification on the Word Level using SAT-like Proof Techniques},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Erlangen, Germany, March 5-7,
2007},
series = {Berichte aus der Informatik},
pages = {81--90},
publisher = {Shaker},
year = {2007},
timestamp = {Thu, 11 Jul 2019 13:18:08 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/FeyGEWD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/WilleFGGED07,
author = {Robert Wille and
G{\"{o}}rschwin Fey and
Daniel Gro{\ss}e and
Stephan Eggersgl{\"{u}}{\ss} and
Rolf Drechsler},
title = {{SWORD:} {A} {SAT} like Prover Using Word Level Information},
booktitle = {VLSI-SoC: Advanced Topics on Systems on a Chip - {A} Selection of
Extended Versions of the Best Papers of the Fourteenth International
Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2007),
October 15-17, 2007, Atlanta, {USA}},
series = {{IFIP}},
volume = {291},
pages = {1--17},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-0-387-89558-1\_10},
doi = {10.1007/978-0-387-89558-1\_10},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/WilleFGGED07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/WilleFGED07,
author = {Robert Wille and
G{\"{o}}rschwin Fey and
Daniel Gro{\ss}e and
Stephan Eggersgl{\"{u}}{\ss} and
Rolf Drechsler},
title = {{SWORD:} {A} {SAT} like prover using word level information},
booktitle = {{IFIP} VLSI-SoC 2007, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Atlanta, GA, USA,
15-17 October 2007},
pages = {88--93},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/VLSISOC.2007.4402478},
doi = {10.1109/VLSISOC.2007.4402478},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/WilleFGED07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/BoldingCCEHNW93,
author = {Kevin Bolding and
Sen{-}Ching S. Cheung and
Sung{-}Eun Choi and
Carl Ebeling and
Soha Hassoun and
Ton Anh Ngo and
Robert Wille},
editor = {Kakayuki Yanagawa and
Peter A. Ivey},
title = {The chaos router chip: design and implementation of an adaptive router},
booktitle = {{VLSI} 93, Proceedings of the {IFIP} {TC10/WG} 10.5 International
Conference on Very Large Scale Integration, Grenoble, France, 7-10
September, 1993},
series = {{IFIP} Transactions},
volume = {{A-42}},
pages = {311--320},
publisher = {North-Holland},
year = {1993},
timestamp = {Fri, 15 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/BoldingCCEHNW93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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