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ORCIDBibTeX records: Per Stenström
@article{DBLP:journals/taco/AzharMS23,
author = {Muhammad Waqar Azhar and
Madhavan Manivannan and
Per Stenstr{\"{o}}m},
title = {Approx-RM: Reducing Energy on Heterogeneous Multicore Processors under
Accuracy and Timing Constraints},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {20},
number = {3},
pages = {44:1--44:25},
year = {2023},
url = {https://doi.org/10.1145/3605214},
doi = {10.1145/3605214},
timestamp = {Tue, 28 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AzharMS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/AlvarezRBK0MBAM23,
author = {Lluc Alvarez and
Abraham Ruiz and
Arnau Bigas{-}Soldevilla and
Pavel Kuroedov and
Alberto Gonz{\'{a}}lez and
Hamsika Mahale and
Noe Bustamante and
Albert Aguilera and
Francesco Minervini and
Javier Salamero and
Oscar Palomar and
Vassilis Papaefstathiou and
Antonis Psathakis and
Nikolaos Dimou and
Michalis Giaourtas and
Iasonas Mastorakis and
Georgios Ieronymakis and
Georgios{-}Michail Matzouranis and
Vassilis Flouris and
Nick Kossifidis and
Manolis Marazakis and
Bhavishya Goel and
Madhavan Manivannan and
Ahsen Ejaz and
Panagiotis Strikos and
Mateo V{\'{a}}zquez and
Ioannis Sourdis and
Pedro Trancoso and
Per Stenstr{\"{o}}m and
Jens Hagemeyer and
Lennart Tigges and
Nils Kucza and
Jean{-}Marc Philippe and
Ioannis Papaefstathiou},
editor = {Andrea Bartolini and
Kristian F. D. Rietveld and
Catherine D. Schuman and
Jose Moreira},
title = {eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale,
Extensible, Processor Ecosystem},
booktitle = {Proceedings of the 20th {ACM} International Conference on Computing
Frontiers, {CF} 2023, Bologna, Italy, May 9-11, 2023},
pages = {309--314},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3587135.3592178},
doi = {10.1145/3587135.3592178},
timestamp = {Sat, 30 Sep 2023 09:36:30 +0200},
biburl = {https://dblp.org/rec/conf/cf/AlvarezRBK0MBAM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurosp/HoltrydMS23,
author = {Nadja Ramh{\"{o}}j Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m},
title = {SoK: Analysis of Root Causes and Defense Strategies for Attacks on
Microarchitectural Optimizations},
booktitle = {8th {IEEE} European Symposium on Security and Privacy, EuroS{\&}P
2023, Delft, Netherlands, July 3-7, 2023},
pages = {631--650},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/EuroSP57164.2023.00044},
doi = {10.1109/EUROSP57164.2023.00044},
timestamp = {Mon, 07 Aug 2023 15:56:23 +0200},
biburl = {https://dblp.org/rec/conf/eurosp/HoltrydMS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/host/HoltrydMS23,
author = {Nadja Ramh{\"{o}}j Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m},
title = {{SCALE:} Secure and Scalable Cache Partitioning},
booktitle = {{IEEE} International Symposium on Hardware Oriented Security and Trust,
{HOST} 2023, San Jose, CA, USA, May 1-4, 2023},
pages = {68--79},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HOST55118.2023.10133713},
doi = {10.1109/HOST55118.2023.10133713},
timestamp = {Mon, 11 Sep 2023 17:53:23 +0200},
biburl = {https://dblp.org/rec/conf/host/HoltrydMS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rts/VoudourisSP22,
author = {Petros Voudouris and
Per Stenstr{\"{o}}m and
Risat Pathan},
title = {Bounding the execution time of parallel applications on unrelated
multiprocessors},
journal = {Real Time Syst.},
volume = {58},
number = {2},
pages = {189--232},
year = {2022},
url = {https://doi.org/10.1007/s11241-021-09375-2},
doi = {10.1007/S11241-021-09375-2},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rts/VoudourisSP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/AzharPS22,
author = {Muhammad Waqar Azhar and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Task-RM: {A} Resource Manager for Energy Reduction in Task-Parallel
Applications under Quality of Service Constraints},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {19},
number = {1},
pages = {11:1--11:26},
year = {2022},
url = {https://doi.org/10.1145/3494537},
doi = {10.1145/3494537},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/AzharPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/NejatMPS22,
author = {Mehrzad Nejat and
Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Cooperative Slack Management: Saving Energy of Multicore Processors
by Trading Performance Slack Between QoS-Constrained Applications},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {19},
number = {2},
pages = {21:1--21:27},
year = {2022},
url = {https://doi.org/10.1145/3505559},
doi = {10.1145/3505559},
timestamp = {Wed, 18 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/NejatMPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AngerdASSS22,
author = {Alexandra Angerd and
Angelos Arelakis and
Vasilis Spiliopoulos and
Erik Sintorn and
Per Stenstr{\"{o}}m},
title = {{GBDI:} Going Beyond Base-Delta-Immediate Compression with Global
Bases},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2022, Seoul, South Korea, April 2-6, 2022},
pages = {1115--1127},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/HPCA53966.2022.00085},
doi = {10.1109/HPCA53966.2022.00085},
timestamp = {Mon, 23 May 2022 16:36:22 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AngerdASSS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-10221,
author = {Nadja Ramh{\"{o}}j Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m},
title = {SoK: Analysis of Root Causes and Defense Strategies for Attacks on
Microarchitectural Optimizations},
journal = {CoRR},
volume = {abs/2212.10221},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.10221},
doi = {10.48550/ARXIV.2212.10221},
eprinttype = {arXiv},
eprint = {2212.10221},
timestamp = {Tue, 03 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-10221.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/VoudourisSP21,
author = {Petros Voudouris and
Per Stenstr{\"{o}}m and
Risat Pathan},
title = {Federated Scheduling of Sporadic DAGs on Unrelated Multiprocessors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {87:1--87:25},
year = {2021},
url = {https://doi.org/10.1145/3477018},
doi = {10.1145/3477018},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/VoudourisSP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/HoltrydMSP21,
author = {Nadja Ramh{\"{o}}j Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m and
Miquel Peric{\`{a}}s},
editor = {Jaejin Lee and
Albert Cohen},
title = {{CBP:} Coordinated management of cache partitioning, bandwidth partitioning
and prefetch throttling},
booktitle = {30th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2021, Atlanta, GA, USA, September 26-29, 2021},
pages = {213--225},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/PACT52795.2021.00023},
doi = {10.1109/PACT52795.2021.00023},
timestamp = {Mon, 06 Nov 2023 15:27:23 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/HoltrydMSP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2102-11528,
author = {Nadja Ramh{\"{o}}j Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m and
Miquel Peric{\`{a}}s},
title = {{CBP:} Coordinated management of cache partitioning, bandwidth partitioning
and prefetch throttling},
journal = {CoRR},
volume = {abs/2102.11528},
year = {2021},
url = {https://arxiv.org/abs/2102.11528},
eprinttype = {arXiv},
eprint = {2102.11528},
timestamp = {Wed, 24 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2102-11528.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/NejatMPS20,
author = {Mehrzad Nejat and
Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Coordinated management of {DVFS} and cache partitioning under QoS
constraints to save energy in multi-core systems},
journal = {J. Parallel Distributed Comput.},
volume = {144},
pages = {246--259},
year = {2020},
url = {https://doi.org/10.1016/j.jpdc.2020.05.006},
doi = {10.1016/J.JPDC.2020.05.006},
timestamp = {Fri, 14 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/NejatMPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/AngerdSS20,
author = {Alexandra Angerd and
Erik Sintorn and
Per Stenstr{\"{o}}m},
editor = {Jos{\'{e}} Nelson Amaral and
Lizy Kurian John and
Xipeng Shen},
title = {A {GPU} Register File using Static Data Compression},
booktitle = {{ICPP} 2020: 49th International Conference on Parallel Processing,
Edmonton, AB, Canada, August 17-20, 2020},
pages = {59:1--59:10},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3404397.3404431},
doi = {10.1145/3404397.3404431},
timestamp = {Wed, 12 Aug 2020 17:44:07 +0200},
biburl = {https://dblp.org/rec/conf/icpp/AngerdSS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HoltrydMSP20,
author = {Nadja Holtryd and
Madhavan Manivannan and
Per Stenstr{\"{o}}m and
Miquel Peric{\`{a}}s},
title = {{DELTA:} Distributed Locality-Aware Cache Partitioning for Tile-based
Chip Multiprocessors},
booktitle = {2020 {IEEE} International Parallel and Distributed Processing Symposium
(IPDPS), New Orleans, LA, USA, May 18-22, 2020},
pages = {578--589},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IPDPS47924.2020.00066},
doi = {10.1109/IPDPS47924.2020.00066},
timestamp = {Wed, 22 Jul 2020 15:53:25 +0200},
biburl = {https://dblp.org/rec/conf/ipps/HoltrydMSP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NejatMPS20,
author = {Mehrzad Nejat and
Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Coordinated Management of Processor Configuration and Cache Partitioning
to Optimize Energy under QoS Constraints},
booktitle = {2020 {IEEE} International Parallel and Distributed Processing Symposium
(IPDPS), New Orleans, LA, USA, May 18-22, 2020},
pages = {590--601},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IPDPS47924.2020.00067},
doi = {10.1109/IPDPS47924.2020.00067},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/NejatMPS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2006-05693,
author = {Alexandra Angerd and
Erik Sintorn and
Per Stenstr{\"{o}}m},
title = {A {GPU} Register File using Static Data Compression},
journal = {CoRR},
volume = {abs/2006.05693},
year = {2020},
url = {https://arxiv.org/abs/2006.05693},
eprinttype = {arXiv},
eprint = {2006.05693},
timestamp = {Sat, 13 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2006-05693.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/MeloCSRA19,
author = {Alba de Melo and
Jes{\'{u}}s Carretero and
Per Stenstr{\"{o}}m and
Sanjay Ranka and
Eduard Ayguad{\'{e}}},
title = {Trends on heterogeneous and innovative hardware and software systems},
journal = {J. Parallel Distributed Comput.},
volume = {133},
pages = {362--364},
year = {2019},
url = {https://doi.org/10.1016/j.jpdc.2019.08.001},
doi = {10.1016/J.JPDC.2019.08.001},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/MeloCSRA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/AzharPS19,
author = {Muhammad Waqar Azhar and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {SaC: Exploiting Execution-Time Slack to Save Energy in Heterogeneous
Multicore Systems},
booktitle = {Proceedings of the 48th International Conference on Parallel Processing,
{ICPP} 2019, Kyoto, Japan, August 05-08, 2019},
pages = {26:1--26:12},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3337821.3337865},
doi = {10.1145/3337821.3337865},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/AzharPS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NejatPS19,
author = {Mehrzad Nejat and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {QoS-Driven Coordinated Management of Resources to Save Energy in Multi-core
Systems},
booktitle = {2019 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2019, Rio de Janeiro, Brazil, May 20-24, 2019},
pages = {303--313},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IPDPS.2019.00040},
doi = {10.1109/IPDPS.2019.00040},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/ipps/NejatPS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/appt/2019,
editor = {Pen{-}Chung Yew and
Per Stenstr{\"{o}}m and
Junjie Wu and
Xiaoli Gong and
Tao Li},
title = {Advanced Parallel Processing Technologies - 13th International Symposium,
{APPT} 2019, Tianjin, China, August 15-16, 2019, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {11719},
publisher = {Springer},
year = {2019},
url = {https://doi.org/10.1007/978-3-030-29611-7},
doi = {10.1007/978-3-030-29611-7},
isbn = {978-3-030-29610-0},
timestamp = {Wed, 14 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/appt/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-05101,
author = {Mehrzad Nejat and
Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Coordinated Management of {DVFS} and Cache Partitioning under QoS
Constraints to Save Energy in Multi-Core Systems},
journal = {CoRR},
volume = {abs/1911.05101},
year = {2019},
url = {http://arxiv.org/abs/1911.05101},
eprinttype = {arXiv},
eprint = {1911.05101},
timestamp = {Mon, 02 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-05101.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1911-05114,
author = {Mehrzad Nejat and
Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {Coordinated Management of Processor Configuration and Cache Partitioning
to Optimize Energy under QoS Constraints},
journal = {CoRR},
volume = {abs/1911.05114},
year = {2019},
url = {http://arxiv.org/abs/1911.05114},
eprinttype = {arXiv},
eprint = {1911.05114},
timestamp = {Mon, 02 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1911-05114.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ManivannanPPS18,
author = {Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Vassilis Papaefstathiou and
Per Stenstr{\"{o}}m},
title = {Global Dead-Block Management for Task-Parallel Programs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {15},
number = {3},
pages = {33:1--33:25},
year = {2018},
url = {https://doi.org/10.1145/3234337},
doi = {10.1145/3234337},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ManivannanPPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/PathanVS18,
author = {Risat Pathan and
Petros Voudouris and
Per Stenstr{\"{o}}m},
title = {Scheduling Parallel Real-Time Recurrent Tasks on Multicore Platforms},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {29},
number = {4},
pages = {915--928},
year = {2018},
url = {https://doi.org/10.1109/TPDS.2017.2777449},
doi = {10.1109/TPDS.2017.2777449},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/PathanVS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KnyagininPS18,
author = {Dmitry Knyaginin and
Vassilis Papaefstathiou and
Per Stenstr{\"{o}}m},
title = {ProFess: {A} Probabilistic Hybrid Main Memory Management Framework
for High Performance and Fairness},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2018, Vienna, Austria, February 24-28, 2018},
pages = {143--155},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/HPCA.2018.00022},
doi = {10.1109/HPCA.2018.00022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KnyagininPS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/IEEEpact/2018,
editor = {Skevos Evripidou and
Per Stenstr{\"{o}}m and
Michael F. P. O'Boyle},
title = {Proceedings of the 27th International Conference on Parallel Architectures
and Compilation Techniques, {PACT} 2018, Limassol, Cyprus, November
01-04, 2018},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3243176},
doi = {10.1145/3243176},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ManivannanPPS17,
author = {Madhavan Manivannan and
Miquel Peric{\`{a}}s and
Vassilis Papaefstathiou and
Per Stenstr{\"{o}}m},
title = {Runtime-Assisted Global Cache Management for Task-Based Parallel Programs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {145--148},
year = {2017},
url = {https://doi.org/10.1109/LCA.2016.2606593},
doi = {10.1109/LCA.2016.2606593},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ManivannanPPS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/AzharSP17,
author = {Muhammad Waqar Azhar and
Per Stenstr{\"{o}}m and
Vassilis Papaefstathiou},
title = {{SLOOP:} QoS-Supervised Loop Execution to Reduce Energy on Heterogeneous
Architectures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {14},
number = {4},
pages = {41:1--41:25},
year = {2017},
url = {https://doi.org/10.1145/3148053},
doi = {10.1145/3148053},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AzharSP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/AngerdSS17,
author = {Alexandra Angerd and
Erik Sintorn and
Per Stenstr{\"{o}}m},
title = {A Framework for Automated and Controlled Floating-Point Accuracy Reduction
in Graphics Applications on GPUs},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {14},
number = {4},
pages = {46:1--46:25},
year = {2017},
url = {https://doi.org/10.1145/3151032},
doi = {10.1145/3151032},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AngerdSS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KnyagininS17,
author = {Dmitry Knyaginin and
Per Stenstr{\"{o}}m},
title = {Rock: a framework for pruning the design space of hybrid main memory
systems},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2017, Alexandria, VA, USA, October 02 - 05, 2017},
pages = {337--347},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132402.3132412},
doi = {10.1145/3132402.3132412},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KnyagininS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/VoudourisSP17,
author = {Petros Voudouris and
Per Stenstr{\"{o}}m and
Risat Pathan},
editor = {Gabriel Parmer},
title = {Timing-Anomaly Free Dynamic Scheduling of Task-Based Parallel Applications},
booktitle = {2017 {IEEE} Real-Time and Embedded Technology and Applications Symposium,
{RTAS} 2017, Pittsburg, PA, USA, April 18-21, 2017},
pages = {365--376},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/RTAS.2017.2},
doi = {10.1109/RTAS.2017.2},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/VoudourisSP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiCWLHSZ16,
author = {Minghua Li and
Guancheng Chen and
Qijun Wang and
Yonghua Lin and
H. Peter Hofstee and
Per Stenstr{\"{o}}m and
Dian Zhou},
title = {PATer: {A} Hardware Prefetching Automatic Tuner on {IBM} {POWER8}
Processor},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {15},
number = {1},
pages = {37--40},
year = {2016},
url = {https://doi.org/10.1109/LCA.2015.2442972},
doi = {10.1109/LCA.2015.2442972},
timestamp = {Wed, 30 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/LiCWLHSZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/Stenstrom16,
author = {Per Stenstr{\"{o}}m},
title = {2015 Maurice Wilkes Award Given to Christos Kozyrakis},
journal = {{IEEE} Micro},
volume = {36},
number = {3},
pages = {128--129},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.48},
doi = {10.1109/MM.2016.48},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/Stenstrom16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MarazakisGFCTMB16,
author = {Manolis Marazakis and
John Goodacre and
Didier Fuin and
Paul M. Carpenter and
John Thomson and
Emil Mat{\'{u}}s and
Antimo Bruno and
Per Stenstr{\"{o}}m and
J{\'{e}}r{\^{o}}me Martin and
Yves Durand and
Isabelle Dor},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {{EUROSERVER:} Share-anything scale-out micro-server design},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {678--683},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459395/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MarazakisGFCTMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ManivannanPPS16,
author = {Madhavan Manivannan and
Vassilis Papaefstathiou and
Miquel Peric{\`{a}}s and
Per Stenstr{\"{o}}m},
title = {{RADAR:} Runtime-assisted dead region management for last-level caches},
booktitle = {2016 {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2016, Barcelona, Spain, March 12-16, 2016},
pages = {644--656},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/HPCA.2016.7446101},
doi = {10.1109/HPCA.2016.7446101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ManivannanPPS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/KnyagininPS16,
author = {Dmitry Knyaginin and
Vassilis Papaefstathiou and
Per Stenstr{\"{o}}m},
editor = {Bruce L. Jacob},
title = {Adaptive Row Addressing for Cost-Efficient Parallel Memory Protocols
in Large-Capacity Memories},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {121--132},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989103},
doi = {10.1145/2989081.2989103},
timestamp = {Fri, 13 Nov 2020 09:24:44 +0100},
biburl = {https://dblp.org/rec/conf/memsys/KnyagininPS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/VoudourisSP16,
author = {Petros Voudouris and
Per Stenstr{\"{o}}m and
Risat Pathan},
title = {Timing-anomaly free dynamic scheduling of task-based parallel applications},
booktitle = {2016 {IEEE} Real-Time Systems Symposium, {RTSS} 2016, Porto, Portugal,
November 29 - December 2, 2016},
pages = {371},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/RTSS.2016.050},
doi = {10.1109/RTSS.2016.050},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/VoudourisSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2015Sardashti,
author = {Somayeh Sardashti and
Angelos Arelakis and
Per Stenstr{\"{o}}m and
David A. Wood},
title = {A Primer on Compression in the Memory Hierarchy},
series = {Synthesis Lectures on Computer Architecture},
publisher = {Morgan {\&} Claypool Publishers},
year = {2015},
url = {https://doi.org/10.2200/S00683ED1V01Y201511CAC036},
doi = {10.2200/S00683ED1V01Y201511CAC036},
isbn = {978-3-031-00623-4},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/synthesis/2015Sardashti.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/HollmannGS15,
author = {Jochen Hollmann and
J. Rub{\'{e}}n Titos Gil and
Per Stenstr{\"{o}}m},
title = {Enhancing Garbage Collection Synchronization Using Explicit Bit Barriers},
booktitle = {44th International Conference on Parallel Processing, {ICPP} 2015,
Beijing, China, September 1-4, 2015},
pages = {769--778},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICPP.2015.86},
doi = {10.1109/ICPP.2015.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/HollmannGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/FjallingS15,
author = {Tobias Fjalling and
Per Stenstr{\"{o}}m},
title = {Performance Impact of Batching Web-Application Requests Using Hot-Spot
Processing on GPUs},
booktitle = {2015 {IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} 2015, Hyderabad, India, May 25-29, 2015},
pages = {989--999},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/IPDPS.2015.64},
doi = {10.1109/IPDPS.2015.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/FjallingS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ArelakisDS15,
author = {Angelos Arelakis and
Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
editor = {Milos Prvulovic},
title = {HyComp: a hybrid cache compression method for selection of data-type-specific
compression methods},
booktitle = {Proceedings of the 48th International Symposium on Microarchitecture,
{MICRO} 2015, Waikiki, HI, USA, December 5-9, 2015},
pages = {38--49},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2830772.2830823},
doi = {10.1145/2830772.2830823},
timestamp = {Wed, 11 Aug 2021 11:51:26 +0200},
biburl = {https://dblp.org/rec/conf/micro/ArelakisDS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ArelakisS14,
author = {Angelos Arelakis and
Per Stenstr{\"{o}}m},
title = {A Case for a Value-Aware Cache},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {13},
number = {1},
pages = {1--4},
year = {2014},
url = {https://doi.org/10.1109/L-CA.2012.31},
doi = {10.1109/L-CA.2012.31},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ArelakisS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/WaliullahS14,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
title = {Removal of Conflicts in Hardware Transactional Memory Systems},
journal = {Int. J. Parallel Program.},
volume = {42},
number = {1},
pages = {198--218},
year = {2014},
url = {https://doi.org/10.1007/s10766-012-0210-0},
doi = {10.1007/S10766-012-0210-0},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/WaliullahS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/PrasannaRS14,
author = {Viktor K. Prasanna and
Yves Robert and
Per Stenstr{\"{o}}m},
title = {Introduction to the {JPDC} special issue on Perspectives on Parallel
and Distributed Processing},
journal = {J. Parallel Distributed Comput.},
volume = {74},
number = {7},
pages = {2543},
year = {2014},
url = {https://doi.org/10.1016/j.jpdc.2014.03.001},
doi = {10.1016/J.JPDC.2014.03.001},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/PrasannaRS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/IslamS14,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
title = {Characterizing and Exploiting Small-Value Memory Instructions},
journal = {{IEEE} Trans. Computers},
volume = {63},
number = {7},
pages = {1640--1655},
year = {2014},
url = {https://doi.org/10.1109/TC.2013.39},
doi = {10.1109/TC.2013.39},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/IslamS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/GilNA0S14,
author = {J. Rub{\'{e}}n Titos Gil and
Anurag Negi and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
title = {{ZEBRA:} Data-Centric Contention Management in Hardware Transactional
Memory},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {25},
number = {5},
pages = {1359--1369},
year = {2014},
url = {https://doi.org/10.1109/TPDS.2013.262},
doi = {10.1109/TPDS.2013.262},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tpds/GilNA0S14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Stenstrom14,
author = {Per Stenstr{\"{o}}m},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Effective resource management towards efficient computing},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.148},
doi = {10.7873/DATE.2014.148},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/Stenstrom14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/KnyagininGS14,
author = {Dmitry Knyaginin and
Georgi Gaydadjiev and
Per Stenstr{\"{o}}m},
title = {Crystal: {A} Design-Time Resource Partitioning Method for Hybrid Main
Memory},
booktitle = {43rd International Conference on Parallel Processing, {ICPP} 2014,
Minneapolis, MN, USA, September 9-12, 2014},
pages = {90--100},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ICPP.2014.18},
doi = {10.1109/ICPP.2014.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/KnyagininGS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GoelGNMS14,
author = {Bhavishya Goel and
J. Rub{\'{e}}n Titos Gil and
Anurag Negi and
Sally A. McKee and
Per Stenstr{\"{o}}m},
title = {Performance and Energy Analysis of the Restricted Transactional Memory
Implementation on Haswell},
booktitle = {2014 {IEEE} 28th International Parallel and Distributed Processing
Symposium, Phoenix, AZ, USA, May 19-23, 2014},
pages = {615--624},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/IPDPS.2014.70},
doi = {10.1109/IPDPS.2014.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GoelGNMS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ManivannanS14,
author = {Madhavan Manivannan and
Per Stenstr{\"{o}}m},
title = {Runtime-Guided Cache Coherence Optimizations in Multi-core Architectures},
booktitle = {2014 {IEEE} 28th International Parallel and Distributed Processing
Symposium, Phoenix, AZ, USA, May 19-23, 2014},
pages = {625--636},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/IPDPS.2014.71},
doi = {10.1109/IPDPS.2014.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ManivannanS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ArelakisS14,
author = {Angelos Arelakis and
Per Stenstr{\"{o}}m},
title = {SC\({}^{\mbox{2}}\): {A} statistical compression cache scheme},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {145--156},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853231},
doi = {10.1109/ISCA.2014.6853231},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ArelakisS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/PathanSGHS14,
author = {Risat Mahmud Pathan and
Per Stenstr{\"{o}}m and
Lars{-}Goran Green and
Torbjorn Hult and
Patrik Sandin},
title = {Overhead-aware temporal partitioning on multicore processors},
booktitle = {20th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
{RTAS} 2014, Berlin, Germany, April 15-17, 2014},
pages = {251--262},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/RTAS.2014.6926007},
doi = {10.1109/RTAS.2014.6926007},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/PathanSGHS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ics/2014,
editor = {Arndt Bode and
Michael Gerndt and
Per Stenstr{\"{o}}m and
Lawrence Rauchwerger and
Barton P. Miller and
Martin Schulz},
title = {2014 International Conference on Supercomputing, ICS'14, Muenchen,
Germany, June 10-13, 2014},
publisher = {{ACM}},
year = {2014},
url = {http://dl.acm.org/citation.cfm?id=2597652},
isbn = {978-1-4503-2642-1},
timestamp = {Mon, 06 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/FlynnMMRSTV13,
author = {Michael J. Flynn and
Oskar Mencer and
Veljko M. Milutinovic and
Goran Rakocevic and
Per Stenstr{\"{o}}m and
Roman Trobec and
Mateo Valero},
title = {Moving from petaflops to petadata},
journal = {Commun. {ACM}},
volume = {56},
number = {5},
pages = {39--42},
year = {2013},
url = {https://doi.org/10.1145/2447976.2447989},
doi = {10.1145/2447976.2447989},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/FlynnMMRSTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/GilNAGS13,
author = {J. Rub{\'{e}}n Titos Gil and
Anurag Negi and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
title = {Eager Beats Lazy: Improving Store Management in Eager Hardware Transactional
Memory},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {24},
number = {11},
pages = {2192--2201},
year = {2013},
url = {https://doi.org/10.1109/TPDS.2012.315},
doi = {10.1109/TPDS.2012.315},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tpds/GilNAGS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/Stenstrom13,
author = {Per Stenstr{\"{o}}m},
editor = {Christian Fensch and
Michael F. P. O'Boyle and
Andr{\'{e}} Seznec and
Fran{\c{c}}ois Bodin},
title = {Keynote talk: Towards automatic resource management in parallel architectures},
booktitle = {Proceedings of the 22nd International Conference on Parallel Architectures
and Compilation Techniques, Edinburgh, United Kingdom, September 7-11,
2013},
pages = {5},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/PACT.2013.6618798},
doi = {10.1109/PACT.2013.6618798},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/Stenstrom13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/BardizbanyanGWSLMS13,
author = {Alen Bardizbanyan and
Peter Gavin and
David B. Whalley and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors and
Sally A. McKee and
Per Stenstr{\"{o}}m},
title = {Improving data access efficiency by using a tagless access buffer
{(TAB)}},
booktitle = {Proceedings of the 2013 {IEEE/ACM} International Symposium on Code
Generation and Optimization, {CGO} 2013, Shenzhen, China, February
23-27, 2013},
pages = {28:1--28:11},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CGO.2013.6495003},
doi = {10.1109/CGO.2013.6495003},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgo/BardizbanyanGWSLMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/ArmejachNCUSH13,
author = {Adri{\`{a}} Armejach and
Anurag Negi and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Per Stenstr{\"{o}}m and
Tim Harris},
title = {{HARP:} Adaptive abort recurrence prediction for Hardware Transactional
Memory},
booktitle = {20th Annual International Conference on High Performance Computing,
HiPC 2013, Bengaluru (Bangalore), Karnataka, India, December 18-21,
2013},
pages = {196--205},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HiPC.2013.6799100},
doi = {10.1109/HIPC.2013.6799100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/ArmejachNCUSH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ManivannanNS13,
author = {Madhavan Manivannan and
Anurag Negi and
Per Stenstr{\"{o}}m},
title = {Efficient Forwarding of Producer-Consumer Data in Task-Based Programs},
booktitle = {42nd International Conference on Parallel Processing, {ICPP} 2013,
Lyon, France, October 1-4, 2013},
pages = {517--522},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ICPP.2013.64},
doi = {10.1109/ICPP.2013.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ManivannanNS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/StenstromB12,
author = {Per Stenstr{\"{o}}m and
Koen De Bosschere},
title = {Introduction to the special issue on high-performance and embedded
architectures and compilers},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {4},
pages = {18:1--18:2},
year = {2012},
url = {https://doi.org/10.1145/2086696.2086697},
doi = {10.1145/2086696.2086697},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/StenstromB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/NegiACUS12,
author = {Anurag Negi and
Adri{\`{a}} Armejach and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Per Stenstr{\"{o}}m},
editor = {Pen{-}Chung Yew and
Sangyeun Cho and
Luiz DeRose and
David J. Lilja},
title = {Transactional prefetching: narrowing the window of contention in hardware
transactional memory},
booktitle = {International Conference on Parallel Architectures and Compilation
Techniques, {PACT} '12, Minneapolis, MN, {USA} - September 19 - 23,
2012},
pages = {181--190},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2370816.2370844},
doi = {10.1145/2370816.2370844},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/NegiACUS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NegiGAGS12,
author = {Anurag Negi and
J. Rub{\'{e}}n Titos Gil and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
title = {{\(\pi\)}-TM: Pessimistic invalidation for scalable lazy hardware
transactional memory},
booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
pages = {141--152},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCA.2012.6168951},
doi = {10.1109/HPCA.2012.6168951},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/NegiGAGS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/ChenS12,
author = {Guancheng Chen and
Per Stenstr{\"{o}}m},
editor = {Jeffrey K. Hollingsworth},
title = {Critical lock analysis: diagnosing critical section bottlenecks in
multithreaded applications},
booktitle = {{SC} Conference on High Performance Computing Networking, Storage
and Analysis, {SC} '12, Salt Lake City, UT, {USA} - November 11 -
15, 2012},
pages = {71},
publisher = {{IEEE/ACM}},
year = {2012},
url = {https://doi.org/10.1109/SC.2012.40},
doi = {10.1109/SC.2012.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/ChenS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/NegiSGAG11,
author = {Anurag Negi and
Per Stenstr{\"{o}}m and
J. Rub{\'{e}}n Titos Gil and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a},
editor = {Lawrence Rauchwerger and
Vivek Sarkar},
title = {Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional
Memory},
booktitle = {2011 International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011},
pages = {203--204},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/PACT.2011.41},
doi = {10.1109/PACT.2011.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/NegiSGAG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IslamS11,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {A unified approach to eliminate memory accesses early},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {55--64},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038710},
doi = {10.1145/2038698.2038710},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/IslamS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/NegiGAGS11,
author = {Anurag Negi and
J. Rub{\'{e}}n Titos Gil and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
editor = {Guang R. Gao and
Yu{-}Chee Tseng},
title = {Eager Meets Lazy: The Impact of Write-Buffering on Hardware Transactional
Memory},
booktitle = {International Conference on Parallel Processing, {ICPP} 2011, Taipei,
Taiwan, September 13-16, 2011},
pages = {73--82},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICPP.2011.63},
doi = {10.1109/ICPP.2011.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/NegiGAGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ManivannanJS11,
author = {Madhavan Manivannan and
Ben H. H. Juurlink and
Per Stenstr{\"{o}}m},
editor = {Guang R. Gao and
Yu{-}Chee Tseng},
title = {Implications of Merging Phases on Scalability of Multi-core Architectures},
booktitle = {International Conference on Parallel Processing, {ICPP} 2011, Taipei,
Taiwan, September 13-16, 2011},
pages = {622--631},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICPP.2011.74},
doi = {10.1109/ICPP.2011.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ManivannanJS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/GilNAGS11,
author = {J. Rub{\'{e}}n Titos Gil and
Anurag Negi and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
editor = {David K. Lowenthal and
Bronis R. de Supinski and
Sally A. McKee},
title = {{ZEBRA:} a data-centric, hybrid-policy hardware transactional memory
design},
booktitle = {Proceedings of the 25th International Conference on Supercomputing,
2011, Tucson, AZ, USA, May 31 - June 04, 2011},
pages = {53--62},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1995896.1995906},
doi = {10.1145/1995896.1995906},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/GilNAGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/ManivannanJS11,
author = {Madhavan Manivannan and
Ben H. H. Juurlink and
Per Stenstr{\"{o}}m},
editor = {David K. Lowenthal and
Bronis R. de Supinski and
Sally A. McKee},
title = {Poster: implications of merging phases on scalability of multi-core
architectures},
booktitle = {Proceedings of the 25th International Conference on Supercomputing,
2011, Tucson, AZ, USA, May 31 - June 04, 2011},
pages = {380},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/1995896.1995963},
doi = {10.1145/1995896.1995963},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/ManivannanJS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NegiGAGS11,
author = {Anurag Negi and
J. Rub{\'{e}}n Titos Gil and
Manuel E. Acacio and
Jos{\'{e}} M. Garc{\'{\i}}a and
Per Stenstr{\"{o}}m},
title = {The Impact of Non-coherent Buffers on Lazy Hardware Transactional
Memory Systems},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {700--707},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.205},
doi = {10.1109/IPDPS.2011.205},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/NegiGAGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/StenstromBHKOPS11,
author = {Per Stenstr{\"{o}}m and
Doug Burger and
Wen{-}mei W. Hwu and
Vipin Kumar and
Kunle Olukotun and
David A. Padua and
Burton Smith},
title = {Panel Statement},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May, 2011 - Conference
Proceedings},
pages = {877},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.427},
doi = {10.1109/IPDPS.2011.427},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/StenstromBHKOPS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/WaliullahS11,
author = {Mridha{-}Mohammad Waliullah and
Per Stenstr{\"{o}}m},
editor = {Jean{-}Luc Gaudiot and
Alba C. M. A. Melo and
Alberto F. De Souza and
Lucia Catabriga},
title = {Classification and Elimination of Conflicts in Hardware Transactional
Memory Systems},
booktitle = {23rd International Symposium on Computer Architecture and High Performance
Computing, {SBAC-PAD} 2011, Vit{\'{o}}ria, Esp{\'{\i}}rito
Santo, Brazil, October 26-29, 2011},
pages = {96--103},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/SBAC-PAD.2011.18},
doi = {10.1109/SBAC-PAD.2011.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbac-pad/WaliullahS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2011-3,
editor = {Per Stenstr{\"{o}}m},
title = {Transactions on High-Performance Embedded Architectures and Compilers
{III}},
series = {Lecture Notes in Computer Science},
volume = {6590},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-19448-1},
doi = {10.1007/978-3-642-19448-1},
isbn = {978-3-642-19447-4},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/2011-3.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2011-4,
editor = {Per Stenstr{\"{o}}m},
title = {Transactions on High-Performance Embedded Architectures and Compilers
{IV}},
series = {Lecture Notes in Computer Science},
volume = {6760},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-3-642-24568-8},
doi = {10.1007/978-3-642-24568-8},
isbn = {978-3-642-24567-1},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/2011-4.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/AfekDFFGHRSUMHMDPCHDGKTKSNR10,
author = {Yehuda Afek and
Ulrich Drepper and
Pascal Felber and
Christof Fetzer and
Vincent Gramoli and
Michael Hohmuth and
Etienne Rivi{\`{e}}re and
Per Stenstr{\"{o}}m and
Osman S. Unsal and
Walther Maldonado and
Derin Harmanci and
Patrick Marlier and
Stephan Diestelhorst and
Martin Pohlack and
Adri{\'{a}}n Cristal and
Ibrahim Hur and
Aleksandar Dragojevic and
Rachid Guerraoui and
Michal Kapalka and
Sasa Tomic and
Guy Korland and
Nir Shavit and
Martin Nowack and
Torvald Riegel},
title = {The Velox Transactional Memory Stack},
journal = {{IEEE} Micro},
volume = {30},
number = {5},
pages = {76--87},
year = {2010},
url = {https://doi.org/10.1109/MM.2010.80},
doi = {10.1109/MM.2010.80},
timestamp = {Wed, 15 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/AfekDFFGHRSUMHMDPCHDGKTKSNR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/IslamS10,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
editor = {Vinod Kathail and
Reid Tatge and
Rajeev Barua},
title = {Characterization and exploitation of narrow-width loads: the narrow-width
cache approach},
booktitle = {Proceedings of the 2010 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2010, Scottsdale, AZ,
USA, October 24-29, 2010},
pages = {227--236},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878921.1878955},
doi = {10.1145/1878921.1878955},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/IslamS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifmt/NegiWS10,
author = {Anurag Negi and
M. M. Waliullah and
Per Stenstr{\"{o}}m},
editor = {Hisham El{-}Shishiny and
Erven Rohou},
title = {LV*: a class of lazy versioning HTMs for low-cost integration of transactional
memory systems},
booktitle = {Proceedings of the Second International Forum on Next-Generation Multicore/Manycore
Technologies, {IFMT} '10, Saint-Malo, France, June 19, 2010},
pages = {5:1--5:10},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1882453.1882460},
doi = {10.1145/1882453.1882460},
timestamp = {Thu, 10 Feb 2022 14:35:32 +0100},
biburl = {https://dblp.org/rec/conf/ifmt/NegiWS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/NegiWS10,
author = {Anurag Negi and
M. M. Waliullah and
Per Stenstr{\"{o}}m},
editor = {Fadi J. Kurdahi and
Jarmo Takala},
title = {LV\({}^{\mbox{*}}\): {A} low complexity lazy versioning {HTM} infrastructure},
booktitle = {Proceedings of the 2010 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2010),
Samos, Greece, July 19-22, 2010},
pages = {231--240},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ICSAMOS.2010.5642062},
doi = {10.1109/ICSAMOS.2010.5642062},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/NegiWS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/WaliullahS09,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
title = {Schemes for avoiding starvation in transactional memory systems},
journal = {Concurr. Comput. Pract. Exp.},
volume = {21},
number = {7},
pages = {859--873},
year = {2009},
url = {https://doi.org/10.1002/cpe.1363},
doi = {10.1002/CPE.1363},
timestamp = {Mon, 02 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/concurrency/WaliullahS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/StenstromW09,
author = {Per Stenstr{\"{o}}m and
David B. Whalley},
title = {Introduction},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {2},
pages = {3},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-00904-4\_1},
doi = {10.1007/978-3-642-00904-4\_1},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/StenstromW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ThuressonSBSLS09,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Magnus Bj{\"{o}}rk and
Lars J. Svensson and
Per Larsson{-}Edefors and
Per Stenstr{\"{o}}m},
title = {FlexCore: Utilizing Exposed Datapath Control for Efficient Computing},
journal = {J. Signal Process. Syst.},
volume = {57},
number = {1},
pages = {5--19},
year = {2009},
url = {https://doi.org/10.1007/s11265-008-0172-z},
doi = {10.1007/S11265-008-0172-Z},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ThuressonSBSLS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ACISicis/HollmannS09,
author = {Jochen Hollmann and
Per Stenstr{\"{o}}m},
editor = {Huaikou Miao and
Gongzhu Hu},
title = {Using Hoarding to Increase Availability in Shared File Systems},
booktitle = {8th {IEEE/ACIS} International Conference on Computer and Information
Science, {IEEE/ACIS} {ICIS} 2009, June 1-3, 2009, Shanghai, China},
pages = {422--429},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICIS.2009.164},
doi = {10.1109/ICIS.2009.164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ACISicis/HollmannS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/IslamS09,
author = {Md. Mafijul Islam and
Per Stenstr{\"{o}}m},
title = {Zero-Value Caches: Cancelling Loads that Return Zero},
booktitle = {{PACT} 2009, Proceedings of the 18th International Conference on Parallel
Architectures and Compilation Techniques, 12-16 September 2009, Raleigh,
North Carolina, {USA}},
pages = {237--245},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/PACT.2009.29},
doi = {10.1109/PACT.2009.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/IslamS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/ThuressonSS09,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Per Stenstr{\"{o}}m},
editor = {Andr{\'{e}} Seznec and
Joel S. Emer and
Michael F. P. O'Boyle and
Margaret Martonosi and
Theo Ungerer},
title = {A Flexible Code Compression Scheme Using Partitioned Look-Up Tables},
booktitle = {High Performance Embedded Architectures and Compilers, Fourth International
Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5409},
pages = {95--109},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-540-92990-1\_9},
doi = {10.1007/978-3-540-92990-1\_9},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/ThuressonSS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/IslamMS09,
author = {Md. Mafijul Islam and
Sally A. McKee and
Per Stenstr{\"{o}}m},
editor = {Michael Gschwind and
Alexandru Nicolau and
Valentina Salapura and
Jos{\'{e}} E. Moreira},
title = {Cancellation of loads that return zero using zero-value caches},
booktitle = {Proceedings of the 23rd international conference on Supercomputing,
2009, Yorktown Heights, NY, USA, June 8-12, 2009},
pages = {493--494},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1542275.1542346},
doi = {10.1145/1542275.1542346},
timestamp = {Tue, 06 Nov 2018 11:07:03 +0100},
biburl = {https://dblp.org/rec/conf/ics/IslamMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2009-2,
editor = {Per Stenstr{\"{o}}m},
title = {Transactions on High-Performance Embedded Architectures and Compilers
{II}},
series = {Lecture Notes in Computer Science},
volume = {5470},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-642-00904-4},
doi = {10.1007/978-3-642-00904-4},
isbn = {978-3-642-00903-7},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/2009-2.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/WargS08,
author = {Fredrik Warg and
Per Stenstr{\"{o}}m},
title = {Dual-thread Speculation: {A} Simple Approach to Uncover Thread-level
Parallelism on a Simultaneous Multithreaded Processor},
journal = {Int. J. Parallel Program.},
volume = {36},
number = {2},
pages = {166--183},
year = {2008},
url = {https://doi.org/10.1007/s10766-007-0064-z},
doi = {10.1007/S10766-007-0064-Z},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/WargS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/JeongSD08,
author = {Jaeheon Jeong and
Per Stenstr{\"{o}}m and
Michel Dubois},
title = {Simple Penalty-Sensitive Cache Replacement Policies},
journal = {J. Instr. Level Parallelism},
volume = {10},
year = {2008},
url = {http://www.jilp.org/vol10/v10paper8.pdf},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jilp/JeongSD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/IslamSS08,
author = {Md. Mafijul Islam and
Magnus Sj{\"{a}}lander and
Per Stenstr{\"{o}}m},
title = {Early detection and bypassing of trivial operations to improve energy
efficiency of processors},
journal = {Microprocess. Microsystems},
volume = {32},
number = {4},
pages = {183--196},
year = {2008},
url = {https://doi.org/10.1016/j.micpro.2007.10.001},
doi = {10.1016/J.MICPRO.2007.10.001},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/IslamSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ThuressonSS08,
author = {Martin Thuresson and
Lawrence Spracklen and
Per Stenstr{\"{o}}m},
title = {Memory-Link Compression Schemes: {A} Value Locality Perspective},
journal = {{IEEE} Trans. Computers},
volume = {57},
number = {7},
pages = {916--927},
year = {2008},
url = {https://doi.org/10.1109/TC.2008.28},
doi = {10.1109/TC.2008.28},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ThuressonSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/WilhelmEEHTWBFHMMPPSS08,
author = {Reinhard Wilhelm and
Jakob Engblom and
Andreas Ermedahl and
Niklas Holsti and
Stephan Thesing and
David B. Whalley and
Guillem Bernat and
Christian Ferdinand and
Reinhold Heckmann and
Tulika Mitra and
Frank Mueller and
Isabelle Puaut and
Peter P. Puschner and
Jan Staschulat and
Per Stenstr{\"{o}}m},
title = {The worst-case execution-time problem - overview of methods and survey
of tools},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {7},
number = {3},
pages = {36:1--36:53},
year = {2008},
url = {https://doi.org/10.1145/1347375.1347389},
doi = {10.1145/1347375.1347389},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/WilhelmEEHTWBFHMMPPSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/BardineCFGPS08,
author = {Alessandro Bardine and
Manuel Comparetti and
Pierfrancesco Foglia and
Giacomo Gabrielli and
Cosimo Antonio Prete and
Per Stenstr{\"{o}}m},
editor = {Luca Fanucci},
title = {Leveraging Data Promotion for Low Power {D-NUCA} Caches},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {307--316},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.52},
doi = {10.1109/DSD.2008.52},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/BardineCFGPS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ThuressonS08,
author = {Martin Thuresson and
Per Stenstr{\"{o}}m},
title = {Accommodation of the Bandwidth of Large Cache Blocks Using Cache/Memory
Link Compression},
booktitle = {2008 International Conference on Parallel Processing, {ICPP} 2008,
September 8-12, 2008, Portland, Oregon, {USA}},
pages = {478--486},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICPP.2008.47},
doi = {10.1109/ICPP.2008.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ThuressonS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/WaliullahS08,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
title = {Intermediate checkpointing with conflicting access prediction in transactional
memory systems},
booktitle = {22nd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2008, Miami, Florida USA, April 14-18, 2008},
pages = {1--11},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/IPDPS.2008.4536249},
doi = {10.1109/IPDPS.2008.4536249},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/WaliullahS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/medea/IslamS08,
author = {Mafijul Md. Islam and
Per Stenstr{\"{o}}m},
editor = {Pierfrancesco Foglia and
Cosimo Antonio Prete and
Sandro Bartolini and
Roberto Giorgi},
title = {Zero loads: canceling load requests by tracking zero values},
booktitle = {Proceedings of the 9th workshop on MEmory performance - DEaling with
Applications, systems and architecture, {MEDEA} '08, Toronto, Canada,
October 26, 2008},
pages = {16--23},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1509084.1509087},
doi = {10.1145/1509084.1509087},
timestamp = {Tue, 18 Jan 2022 15:41:02 +0100},
biburl = {https://dblp.org/rec/conf/medea/IslamS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/WaliullahS08,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
editor = {Walid A. Najjar and
Holger Blume},
title = {Efficient management of speculative data in hardware transactional
memory systems},
booktitle = {Proceedings of the 2008 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
Samos, Greece, July 21-24, 2008},
pages = {158--164},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICSAMOS.2008.4664859},
doi = {10.1109/ICSAMOS.2008.4664859},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/WaliullahS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2008,
editor = {Per Stenstr{\"{o}}m and
Michel Dubois and
Manolis Katevenis and
Rajiv Gupta and
Theo Ungerer},
title = {High Performance Embedded Architectures and Compilers, Third International
Conference, HiPEAC 2008, G{\"{o}}teborg, Sweden, January 27-29,
2008, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4917},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-77560-7},
doi = {10.1007/978-3-540-77560-7},
isbn = {978-3-540-77559-1},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/HollmannAS07,
author = {Jochen Hollmann and
Anders Ard{\"{o}} and
Per Stenstr{\"{o}}m},
title = {Effectiveness of caching in a distributed digital library system},
journal = {J. Syst. Archit.},
volume = {53},
number = {7},
pages = {403--416},
year = {2007},
url = {https://doi.org/10.1016/j.sysarc.2006.11.011},
doi = {10.1016/J.SYSARC.2006.11.011},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/HollmannAS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ChenDS07,
author = {Jianwei Chen and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {SimWattch: Integrating Complete-System and User-Level Performance
and Power Simulators},
journal = {{IEEE} Micro},
volume = {27},
number = {4},
pages = {34--48},
year = {2007},
url = {https://doi.org/10.1109/MM.2007.73},
doi = {10.1109/MM.2007.73},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/ChenDS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/WaliullahS07,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
title = {Starvation-free commit arbitration policies for transactional memory
systems},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {1},
pages = {39--46},
year = {2007},
url = {https://doi.org/10.1145/1241601.1241610},
doi = {10.1145/1241601.1241610},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/WaliullahS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/DybdahlSN07,
author = {Haakon Dybdahl and
Per Stenstr{\"{o}}m and
Lasse Natvig},
title = {An LRU-based replacement algorithm augmented with frequency of access
in shared chip-multiprocessor caches},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {4},
pages = {45--52},
year = {2007},
url = {https://doi.org/10.1145/1327312.1327320},
doi = {10.1145/1327312.1327320},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/DybdahlSN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/BardineFGPS07,
author = {Alessandro Bardine and
Pierfrancesco Foglia and
Giacomo Gabrielli and
Cosimo Antonio Prete and
Per Stenstr{\"{o}}m},
title = {Improving power efficiency of {D-NUCA} caches},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {4},
pages = {53--58},
year = {2007},
url = {https://doi.org/10.1145/1327312.1327321},
doi = {10.1145/1327312.1327321},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/BardineFGPS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/BosschereLMNOPRSSST07,
author = {Koen De Bosschere and
Wayne Luk and
Xavier Martorell and
Nacho Navarro and
Michael F. P. O'Boyle and
Dionisios N. Pnevmatikatos and
Alex Ram{\'{\i}}rez and
Pascal Sainrat and
Andr{\'{e}} Seznec and
Per Stenstr{\"{o}}m and
Olivier Temam},
title = {High-Performance Embedded Architecture and Compilation Roadmap},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {1},
pages = {5--29},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71528-3\_2},
doi = {10.1007/978-3-540-71528-3\_2},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/BosschereLMNOPRSSST07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/thipeac/Stenstrom07,
author = {Per Stenstr{\"{o}}m},
title = {Introduction to Part 1},
journal = {Trans. High Perform. Embed. Archit. Compil.},
volume = {1},
pages = {33},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71528-3\_3},
doi = {10.1007/978-3-540-71528-3\_3},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/Stenstrom07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/GalluzziVCVBSSV07,
author = {Marco Galluzzi and
Enrique Vallejo and
Adri{\'{a}}n Cristal and
Fernando Vallejo and
Ram{\'{o}}n Beivide and
Per Stenstr{\"{o}}m and
James E. Smith and
Mateo Valero},
editor = {Lynn Choi and
Yunheung Paek and
Sangyeun Cho},
title = {Implicit Transactional Memory in Kilo-Instruction Multiprocessors},
booktitle = {Advances in Computer Systems Architecture, 12th Asia-Pacific Conference,
{ACSAC} 2007, Seoul, Korea, August 23-25, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4697},
pages = {339--353},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74309-5\_32},
doi = {10.1007/978-3-540-74309-5\_32},
timestamp = {Thu, 09 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aPcsac/GalluzziVCVBSSV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BorkarJS07,
author = {Shekhar Borkar and
Norman P. Jouppi and
Per Stenstr{\"{o}}m},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Microprocessors in the era of terascale integration},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {237--242},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364597},
doi = {10.1109/DATE.2007.364597},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BorkarJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/WaliullahS07,
author = {M. M. Waliullah and
Per Stenstr{\"{o}}m},
editor = {Anne{-}Marie Kermarrec and
Luc Boug{\'{e}} and
Thierry Priol},
title = {Starvation-Free Transactional Memory-System Protocols},
booktitle = {Euro-Par 2007, Parallel Processing, 13th International Euro-Par Conference,
Rennes, France, August 28-31, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4641},
pages = {280--291},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74466-5\_31},
doi = {10.1007/978-3-540-74466-5\_31},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/WaliullahS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DybdahlS07,
author = {Haakon Dybdahl and
Per Stenstr{\"{o}}m},
title = {An Adaptive Shared/Private {NUCA} Cache Partitioning Scheme for Chip
Multiprocessors},
booktitle = {13st International Conference on High-Performance Computer Architecture
{(HPCA-13} 2007), 10-14 February 2007, Phoenix, Arizona, {USA}},
pages = {2--12},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/HPCA.2007.346180},
doi = {10.1109/HPCA.2007.346180},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/DybdahlS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/IslamBELDS07,
author = {Md. Mafijul Islam and
Alexander Busck and
Mikael Engbom and
Simji Lee and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {Loop-level Speculative Parallelism in Embedded Applications},
booktitle = {2007 International Conference on Parallel Processing {(ICPP} 2007),
September 10-14, 2007, Xi-An, China},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICPP.2007.53},
doi = {10.1109/ICPP.2007.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/IslamBELDS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/Stenstrom07,
author = {Per Stenstr{\"{o}}m},
title = {{IPDPS} Panel: Is the Multi-Core Roadmap going to Live Up to its Promises?},
booktitle = {21th International Parallel and Distributed Processing Symposium {(IPDPS}
2007), Proceedings, 26-30 March 2007, Long Beach, California, {USA}},
pages = {14},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IPDPS.2007.370205},
doi = {10.1109/IPDPS.2007.370205},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/Stenstrom07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/medea/BosqueIVSL07,
author = {Ana Bosque and
Pablo Ib{\'{a}}{\~{n}}ez and
V{\'{\i}}ctor Vi{\~{n}}als and
Per Stenstr{\"{o}}m and
Jos{\'{e}} Mar{\'{\i}}a Llaber{\'{\i}}a},
editor = {Pierfrancesco Foglia and
Cosimo Antonio Prete and
Sandro Bartolini and
Roberto Giorgi},
title = {Characterization of Apache web server with Specweb2005},
booktitle = {Proceedings of the 2007 workshop on MEmory performance - DEaling with
Applications, systems and architecture, {MEDEA} '07, Brasov, Romania,
September 16, 2007},
pages = {65--72},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1327171.1327179},
doi = {10.1145/1327171.1327179},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/medea/BosqueIVSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/ThuressonSBSLS07,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Magnus Bj{\"{o}}rk and
Lars J. Svensson and
Per Larsson{-}Edefors and
Per Stenstr{\"{o}}m},
editor = {Holger Blume and
Georgi Gaydadjiev and
C. John Glossner and
Peter M. W. Knijnenburg},
title = {FlexCore: Utilizing Exposed Datapath Control for Efficient Computing},
booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
Samos, Greece, July 16-19, 2007},
pages = {18--25},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICSAMOS.2007.4285729},
doi = {10.1109/ICSAMOS.2007.4285729},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/ThuressonSBSLS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sies/IslamS07,
author = {Md. Mafijul Islam and
Per Stenstr{\"{o}}m},
title = {Energy and Performance Trade-offs between Instruction Reuse and Trivial
Computations for Embedded Applications},
booktitle = {{IEEE} Second International Symposium on Industrial Embedded Systems,
{SIES} 2007, Hotel Costa da Caparica, Lisbon, Portugal, July 4-6,
2007},
pages = {86--93},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SIES.2007.4297321},
doi = {10.1109/SIES.2007.4297321},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/sies/IslamS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/cf/2007,
editor = {Utpal Banerjee and
Jos{\'{e}} Moreira and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia,
Italy, May 7-9, 2007},
publisher = {{ACM}},
year = {2007},
isbn = {978-1-59593-683-7},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hipeac/2007,
editor = {Koen De Bosschere and
David R. Kaeli and
Per Stenstr{\"{o}}m and
David B. Whalley and
Theo Ungerer},
title = {High Performance Embedded Architectures and Compilers, Second International
Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4367},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-69338-3},
doi = {10.1007/978-3-540-69338-3},
isbn = {978-3-540-69337-6},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:journals/thipeac/2007-1,
editor = {Per Stenstr{\"{o}}m and
Michael F. P. O'Boyle and
Fran{\c{c}}ois Bodin and
Marcelo Cintra and
Sally A. McKee},
title = {Transactions on High-Performance Embedded Architectures and Compilers
{I}},
series = {Lecture Notes in Computer Science},
volume = {4050},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-71528-3},
doi = {10.1007/978-3-540-71528-3},
isbn = {978-3-540-71527-6},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/thipeac/2007-1.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/MonienGSSS06,
author = {Burkhard Monien and
Guang Gao and
Horst D. Simon and
Paul G. Spirakis and
Per Stenstr{\"{o}}m},
title = {Introduction},
journal = {J. Parallel Distributed Comput.},
volume = {66},
number = {5},
pages = {615--616},
year = {2006},
url = {https://doi.org/10.1016/j.jpdc.2005.06.006},
doi = {10.1016/J.JPDC.2005.06.006},
timestamp = {Thu, 06 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/MonienGSSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aPcsac/DybdahlS06,
author = {Haakon Dybdahl and
Per Stenstr{\"{o}}m},
editor = {Chris R. Jesshope and
Colin Egan},
title = {Enhancing Last-Level Cache Performance by Block Bypassing and Early
Miss Determination},
booktitle = {Advances in Computer Systems Architecture, 11th Asia-Pacific Conference,
{ACSAC} 2006, Shanghai, China, September 6-8, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4186},
pages = {52--66},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11859802\_6},
doi = {10.1007/11859802\_6},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/aPcsac/DybdahlS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/JeongSD06,
author = {Jaeheon Jeong and
Per Stenstr{\"{o}}m and
Michel Dubois},
title = {Simple penalty-sensitive replacement policies for caches},
booktitle = {Proceedings of the Third Conference on Computing Frontiers, 2006,
Ischia, Italy, May 3-5, 2006},
pages = {341--352},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1128022.1128068},
doi = {10.1145/1128022.1128068},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/JeongSD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/DybdahlSN06,
author = {Haakon Dybdahl and
Per Stenstr{\"{o}}m and
Lasse Natvig},
editor = {Yves Robert and
Manish Parashar and
Ramamurthy Badrinath and
Viktor K. Prasanna},
title = {A Cache-Partitioning Aware Replacement Policy for Chip Multiprocessors},
booktitle = {High Performance Computing - HiPC 2006, 13th International Conference,
Bangalore, India, December 18-21, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4297},
pages = {22--34},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11945918\_9},
doi = {10.1007/11945918\_9},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/hipc/DybdahlSN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Stenstrom06,
author = {Per Stenstr{\"{o}}m},
title = {Chip-multiprocessing and beyond},
booktitle = {12th International Symposium on High-Performance Computer Architecture,
{HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006},
pages = {109},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HPCA.2006.1598117},
doi = {10.1109/HPCA.2006.1598117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Stenstrom06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/medea/DybdahlSN06,
author = {Haakon Dybdahl and
Per Stenstr{\"{o}}m and
Lasse Natvig},
title = {An LRU-based replacement algorithm augmented with frequency of access
in shared chip-multiprocessor caches},
booktitle = {Proceedings of the 2006 workshop on MEmory performance - DEaling with
Applications, systems and architectures, {MEDEA} '06, Seattle, Washington,
USA, September 16-20, 2006},
pages = {45--52},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1166133.1166139},
doi = {10.1145/1166133.1166139},
timestamp = {Mon, 17 Jan 2022 13:38:49 +0100},
biburl = {https://dblp.org/rec/conf/medea/DybdahlSN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/IslamS06,
author = {Md. Mafijul Islam and
Per Stenstr{\"{o}}m},
editor = {Georgi Gaydadjiev and
C. John Glossner and
Jarmo Takala and
Stamatis Vassiliadis},
title = {Reduction of Energy Consumption in Processors by Early Detection and
Bypassing of Trivial Operations},
booktitle = {Proceedings of 2006 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2006),
Samos, Greece, July 17-20, 2006},
pages = {28--34},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICSAMOS.2006.300805},
doi = {10.1109/ICSAMOS.2006.300805},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/IslamS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/WargS06,
author = {Fredrik Warg and
Per Stenstr{\"{o}}m},
title = {Dual-Thread Speculation: Two Threads in the Machine are Worth Eight
in the Bush},
booktitle = {18th Symposium on Computer Architecture and High Performance Computing
{(SBAC-PAD} 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/SBAC-PAD.2006.17},
doi = {10.1109/SBAC-PAD.2006.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbac-pad/WargS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbac-pad/ThuressonS06,
author = {Martin Thuresson and
Per Stenstr{\"{o}}m},
title = {Scalable Value-Cache Based Compression Schemes for Multiprocessors},
booktitle = {18th Symposium on Computer Architecture and High Performance Computing
{(SBAC-PAD} 2006), 17-20 October 2006, Ouro Preto, Minas Gerais, Brazil},
pages = {117--124},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/SBAC-PAD.2006.27},
doi = {10.1109/SBAC-PAD.2006.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbac-pad/ThuressonS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MuellerS05,
author = {Frank Mueller and
Per Stenstr{\"{o}}m},
title = {Introduction to the special issue},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {4},
number = {1},
pages = {1--2},
year = {2005},
url = {https://doi.org/10.1145/1053271.1053272},
doi = {10.1145/1053271.1053272},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MuellerS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/ThuressonS05,
author = {Martin Thuresson and
Per Stenstr{\"{o}}m},
editor = {Nader Bagherzadeh and
Mateo Valero and
Alex Ram{\'{\i}}rez},
title = {Evaluation of extended dictionary-based static code compression schemes},
booktitle = {Proceedings of the Second Conference on Computing Frontiers, 2005,
Ischia, Italy, May 4-6, 2005},
pages = {77--86},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1062261.1062278},
doi = {10.1145/1062261.1062278},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/ThuressonS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/WargS05,
author = {Fredrik Warg and
Per Stenstr{\"{o}}m},
editor = {Nader Bagherzadeh and
Mateo Valero and
Alex Ram{\'{\i}}rez},
title = {Reducing misspeculation overhead for module-level speculative execution},
booktitle = {Proceedings of the Second Conference on Computing Frontiers, 2005,
Ischia, Italy, May 4-6, 2005},
pages = {289--298},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1062261.1062310},
doi = {10.1145/1062261.1062310},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/WargS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/Stenstrom05,
author = {Per Stenstr{\"{o}}m},
editor = {Thomas M. Conte and
Nacho Navarro and
Wen{-}mei W. Hwu and
Mateo Valero and
Theo Ungerer},
title = {The Chip-Multiprocessing Paradigm Shift: Opportunities and Challenges},
booktitle = {High Performance Embedded Architectures and Compilers, First International
Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3793},
pages = {5},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11587514\_2},
doi = {10.1007/11587514\_2},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/Stenstrom05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icps/0001GCVBSSV05,
author = {Enrique Vallejo and
Marco Galluzzi and
Adri{\'{a}}n Cristal and
Fernando Vallejo and
Ram{\'{o}}n Beivide and
Per Stenstr{\"{o}}m and
James E. Smith and
Mateo Valero},
title = {Implementing Kilo-Instruction Multiprocessors},
booktitle = {Proceedings of the International Conference on Pervasive Services
2005, {ICPS} '05, Santorini, Greece, July 11-14, 2005},
pages = {325--336},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/PERSER.2005.1506430},
doi = {10.1109/PERSER.2005.1506430},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icps/0001GCVBSSV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/EkmanS05,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m},
title = {A Cost-Effective Main Memory Organization for Future Servers},
booktitle = {19th International Parallel and Distributed Processing Symposium {(IPDPS}
2005), {CD-ROM} / Abstracts Proceedings, 4-8 April 2005, Denver, CO,
{USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IPDPS.2005.12},
doi = {10.1109/IPDPS.2005.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/EkmanS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/X05,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m},
title = {A Robust Main-Memory Compression Scheme},
booktitle = {32st International Symposium on Computer Architecture {(ISCA} 2005),
4-8 June 2005, Madison, Wisconsin, {USA}},
pages = {74--85},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISCA.2005.6},
doi = {10.1109/ISCA.2005.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/X05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/EkmanS05,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m},
title = {Enhancing Multiprocessor Architecture Simulation Speed Using Matched-Pair
Comparison},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2005, March 20-22, 2005, Austin, Texas, USA,
Proceedings},
pages = {89--99},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISPASS.2005.1430562},
doi = {10.1109/ISPASS.2005.1430562},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/EkmanS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/GrahnS04,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m},
title = {A comparative evaluation of hardware-only and software-only directory
protocols in shared-memory multiprocessors},
journal = {J. Syst. Archit.},
volume = {50},
number = {9},
pages = {537--561},
year = {2004},
url = {https://doi.org/10.1016/j.sysarc.2003.08.014},
doi = {10.1016/J.SYSARC.2003.08.014},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/GrahnS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/JalmingerS04,
author = {Jonas Jalminger and
Per Stenstr{\"{o}}m},
title = {A cache block reuse prediction scheme},
journal = {Microprocess. Microsystems},
volume = {28},
number = {7},
pages = {373--385},
year = {2004},
url = {https://doi.org/10.1016/j.micpro.2004.03.019},
doi = {10.1016/J.MICPRO.2004.03.019},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/JalmingerS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/KampeSD04,
author = {Martin K{\"{a}}mpe and
Per Stenstr{\"{o}}m and
Michel Dubois},
editor = {Stamatis Vassiliadis and
Jean{-}Luc Gaudiot and
Vincenzo Piuri},
title = {Self-correcting {LRU} replacement policies},
booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
Ischia, Italy, April 14-16, 2004},
pages = {181--191},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/977091.977117},
doi = {10.1145/977091.977117},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/KampeSD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wmpi/EkmanS04,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m},
editor = {John B. Carter and
Lixin Zhang},
title = {A case for multi-level main memory},
booktitle = {Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction
with the 31st International Symposium on Computer Architecture 2004,
Munich, Germany, June 20, 2004},
pages = {1--8},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1054943.1054944},
doi = {10.1145/1054943.1054944},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/wmpi/EkmanS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ercimdl/HollmannAS03,
author = {Jochen Hollmann and
Anders Ard{\"{o}} and
Per Stenstr{\"{o}}m},
editor = {Traugott Koch and
Ingeborg S{\o}lvberg},
title = {An Evaluation of Document Prefetching in a Distributed Digital Library},
booktitle = {Research and Advanced Technology for Digital Libraries, 7th European
Conference, {ECDL} 2003, Trondheim, Norway, August 17-22, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2769},
pages = {276--287},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45175-4\_26},
doi = {10.1007/978-3-540-45175-4\_26},
timestamp = {Mon, 28 Aug 2023 21:17:44 +0200},
biburl = {https://dblp.org/rec/conf/ercimdl/HollmannAS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/Stenstrom03,
author = {Per Stenstr{\"{o}}m},
editor = {Timothy Mark Pinkston and
Viktor K. Prasanna},
title = {One Chip, One Server: How Do We Exploit Its Power?},
booktitle = {High Performance Computing - HiPC 2003, 10th International Conference,
Hyderabad, India, December 17-20, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2913},
pages = {405},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-24596-4\_43},
doi = {10.1007/978-3-540-24596-4\_43},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/hipc/Stenstrom03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/JalmingerS03,
author = {Jonas Jalminger and
Per Stenstr{\"{o}}m},
title = {A Novel Approach to Cache Block Reuse Predictions},
booktitle = {32nd International Conference on Parallel Processing {(ICPP} 2003),
6-9 October 2003, Kaohsiung, Taiwan},
pages = {294},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICPP.2003.1240592},
doi = {10.1109/ICPP.2003.1240592},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/JalmingerS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/EkmanS03,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m},
title = {Performance and Power Impact of Issue-width in Chip-Multiprocessor
Cores},
booktitle = {32nd International Conference on Parallel Processing {(ICPP} 2003),
6-9 October 2003, Kaohsiung, Taiwan},
pages = {359--368},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICPP.2003.1240600},
doi = {10.1109/ICPP.2003.1240600},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/EkmanS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/NilssonLS03,
author = {Jim Nilsson and
Anders Landin and
Per Stenstr{\"{o}}m},
title = {The Coherence Predictor Cache: {A} Resource-Efficient and Accurate
Coherence Prediction Infrastructure},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213084},
doi = {10.1109/IPDPS.2003.1213084},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/NilssonLS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/RundbergS03,
author = {Peter Rundberg and
Per Stenstr{\"{o}}m},
title = {Speculative Lock Reordering: Optimistic Out-of-Order Execution of
Critical Sections},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {11},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213086},
doi = {10.1109/IPDPS.2003.1213086},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/RundbergS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/WargS03,
author = {Fredrik Warg and
Per Stenstr{\"{o}}m},
title = {Improving Speculative Thread-Level Parallelism Through Module Run-Length
Prediction},
booktitle = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
pages = {12},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/IPDPS.2003.1213089},
doi = {10.1109/IPDPS.2003.1213089},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/WargS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/ChenDS03,
author = {Jianwei Chen and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {Integrating complete-system and user-level performance/power simulators:
the SimWattch approach},
booktitle = {2003 {IEEE} International Symposium on Performance Analysis of Systems
and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ISPASS.2003.1190227},
doi = {10.1109/ISPASS.2003.1190227},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/ChenDS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/JalmingerS02,
author = {Jonas Jalminger and
Per Stenstr{\"{o}}m},
title = {Improvement of energy-efficiency in off-chip caches by selective prefetching},
journal = {Microprocess. Microsystems},
volume = {26},
number = {3},
pages = {107--121},
year = {2002},
url = {https://doi.org/10.1016/S0141-9331(01)00150-8},
doi = {10.1016/S0141-9331(01)00150-8},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/JalmingerS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KampeSD02,
author = {Martin K{\"{a}}mpe and
Per Stenstr{\"{o}}m and
Michel Dubois},
title = {The {FAB} Predictor: Using Fourier Analysis to Predict the Outcome
of Conditional Branches},
booktitle = {Proceedings of the Eighth International Symposium on High-Performance
Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February
2-6, 2002},
pages = {223--232},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/HPCA.2002.995712},
doi = {10.1109/HPCA.2002.995712},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KampeSD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HollmannAS02,
author = {Jochen Hollmann and
Anders Ard{\"{o}} and
Per Stenstr{\"{o}}m},
title = {Empirical Observations Regarding Predictability in User Access-Behavior
in a Distributed Digital Library System},
booktitle = {16th International Parallel and Distributed Processing Symposium {(IPDPS}
2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts
Proceedings},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/IPDPS.2002.1016636},
doi = {10.1109/IPDPS.2002.1016636},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HollmannAS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/EkmanSD02,
author = {Magnus Ekman and
Per Stenstr{\"{o}}m and
Fredrik Dahlgren},
editor = {Vivek De and
Mary Jane Irwin and
Ingrid Verbauwhede and
Christian Piguet},
title = {{TLB} and snoop energy-reduction using virtual caches in low-power
chip-multiprocessors},
booktitle = {Proceedings of the 2002 International Symposium on Low Power Electronics
and Design, 2002, Monterey, California, USA, August 12-14, 2002},
pages = {243--246},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/566408.566471},
doi = {10.1145/566408.566471},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/EkmanSD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jilp/RundbergS01,
author = {Peter Rundberg and
Per Stenstr{\"{o}}m},
title = {An All-Software Thread-Level Data Dependence Speculation System for
Multiprocessors},
journal = {J. Instr. Level Parallelism},
volume = {3},
year = {2001},
url = {http://www.jilp.org/vol3/rundberg-jilp.pdf},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jilp/RundbergS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WargS01,
author = {Fredrik Warg and
Per Stenstr{\"{o}}m},
title = {Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented
Programs on {CMP} Platforms},
booktitle = {2001 International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2001), 8-12 September 2001, Barcelona, Spain},
pages = {221--230},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/PACT.2001.953302},
doi = {10.1109/PACT.2001.953302},
timestamp = {Tue, 31 May 2022 13:36:22 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/WargS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/AssarssonS01,
author = {Ulf Assarsson and
Per Stenstr{\"{o}}m},
editor = {Rizos Sakellariou and
John A. Keane and
John R. Gurd and
Len Freeman},
title = {A Case Study of Load Distribution in Parallel View Frustum Culling
and Collision Detection},
booktitle = {Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference
Manchester, {UK} August 28-31, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2150},
pages = {663--673},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44681-8\_95},
doi = {10.1007/3-540-44681-8\_95},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/AssarssonS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isca/2001,
editor = {Per Stenstr{\"{o}}m},
title = {Proceedings of the 28th Annual International Symposium on Computer
Architecture, {ISCA} 2001, G{\"{o}}teborg, Sweden, June 30-July
4, 2001},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/379240},
doi = {10.1145/379240},
isbn = {0-7695-1162-7},
timestamp = {Fri, 09 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/2001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ac/StenstromHLMV00,
author = {Per Stenstr{\"{o}}m and
Erik Hagersten and
David J. Lilja and
Margaret Martonosi and
Madan Venugopal},
title = {Shared-memory multiprocessing: Current state and future directions},
journal = {Adv. Comput.},
volume = {53},
pages = {1--53},
year = {2000},
url = {https://doi.org/10.1016/S0065-2458(00)80003-0},
doi = {10.1016/S0065-2458(00)80003-0},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ac/StenstromHLMV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/GrahnS00,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m},
title = {Comparative Evaluation of Latency-Tolerating and -Reducing Techniques
for Hardware-Only and Software-Only Directory Protocols},
journal = {J. Parallel Distributed Comput.},
volume = {60},
number = {7},
pages = {807--834},
year = {2000},
url = {https://doi.org/10.1006/jpdc.1999.1606},
doi = {10.1006/JPDC.1999.1606},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/GrahnS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/MullerSVV00,
author = {Silvia M. M{\"{u}}ller and
Per Stenstr{\"{o}}m and
Mateo Valero and
Stamatis Vassiliadis},
editor = {Arndt Bode and
Thomas Ludwig and
Wolfgang Karl and
Roland Wism{\"{u}}ller},
title = {Parallel Computer Architecture},
booktitle = {Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference,
Munich, Germany, August 29 - September 1, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1900},
pages = {537--538},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44520-X\_72},
doi = {10.1007/3-540-44520-X\_72},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/MullerSVV00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KarlssonDS00,
author = {Magnus Karlsson and
Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {A Prefetching Technique for Irregular Accesses to Linked Data Structures},
booktitle = {Proceedings of the Sixth International Symposium on High-Performance
Computer Architecture, Toulouse, France, January 8-12, 2000},
pages = {206--217},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/HPCA.2000.824351},
doi = {10.1109/HPCA.2000.824351},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KarlssonDS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SaulsburyDS00,
author = {Ashley Saulsbury and
Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
editor = {Alan D. Berenbaum and
Joel S. Emer},
title = {Recency-based {TLB} preloading},
booktitle = {27th International Symposium on Computer Architecture {(ISCA} 2000),
June 10-14, 2000, Vancouver, BC, Canada},
pages = {117--127},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/ISCA.2000.854383},
doi = {10.1109/ISCA.2000.854383},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SaulsburyDS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigmetrics/KarlssonS00,
author = {Magnus Karlsson and
Per Stenstr{\"{o}}m},
editor = {Alexandre Brandwajn and
Jim Kurose and
Philippe Nain},
title = {An analytical model of the working-set sizes in decision-support systems},
booktitle = {Proceedings of the 2000 {ACM} {SIGMETRICS} international conference
on Measurement and modeling of computer systems, Santa Clara, CA,
USA, June 18-21, 2000},
pages = {275--285},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/339331.339423},
doi = {10.1145/339331.339423},
timestamp = {Fri, 30 Jul 2021 16:13:33 +0200},
biburl = {https://dblp.org/rec/conf/sigmetrics/KarlssonS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SkeppstedtDS99,
author = {Jonas Skeppstedt and
Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {Evaluation of Compiler-Controlled Updating to Reduce Coherence-Miss
Penalties in Shared-Memory Multiprocessors},
journal = {J. Parallel Distributed Comput.},
volume = {56},
number = {2},
pages = {122--143},
year = {1999},
url = {https://doi.org/10.1006/jpdc.1998.1510},
doi = {10.1006/JPDC.1998.1510},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jpdc/SkeppstedtDS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/MilutinovicS99,
author = {Veljko Milutinovic and
Per Stenstr{\"{o}}m},
title = {Special Issue On Distributed Shared Memory Systems},
journal = {Proc. {IEEE}},
volume = {87},
number = {3},
pages = {399--404},
year = {1999},
url = {https://doi.org/10.1109/jproc.1999.747860},
doi = {10.1109/JPROC.1999.747860},
timestamp = {Mon, 28 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/MilutinovicS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rts/LundqvistS99,
author = {Thomas Lundqvist and
Per Stenstr{\"{o}}m},
title = {An Integrated Path and Timing Analysis Method based on Cycle-Level
Symbolic Execution},
journal = {Real Time Syst.},
volume = {17},
number = {2-3},
pages = {183--207},
year = {1999},
url = {https://doi.org/10.1023/A:1008138407139},
doi = {10.1023/A:1008138407139},
timestamp = {Thu, 10 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rts/LundqvistS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtcsa/LundqvistS99,
author = {Thomas Lundqvist and
Per Stenstr{\"{o}}m},
title = {A Method to Improve the Estimated Worst-Case Performance of Data Caching},
booktitle = {6th International Workshop on Real-Time Computing and Applications
Symposium {(RTCSA} '99), 13-16 December 1999, Hong Kong, China},
pages = {255--262},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/RTCSA.1999.811244},
doi = {10.1109/RTCSA.1999.811244},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtcsa/LundqvistS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/LundqvistS99,
author = {Thomas Lundqvist and
Per Stenstr{\"{o}}m},
title = {Timing Anomalies in Dynamically Scheduled Microprocessors},
booktitle = {Proceedings of the 20th {IEEE} Real-Time Systems Symposium, Phoenix,
AZ, USA, December 1-3, 1999},
pages = {12--21},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/REAL.1999.818824},
doi = {10.1109/REAL.1999.818824},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/LundqvistS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/DahlgrenSS98,
author = {Fredrik Dahlgren and
Jonas Skeppstedt and
Per Stenstr{\"{o}}m},
title = {An evaluation of hardware-based and compiler-controlled optimizations
of snooping cache protocols},
journal = {Future Gener. Comput. Syst.},
volume = {13},
number = {6},
pages = {469--487},
year = {1998},
url = {https://doi.org/10.1016/S0167-739X(98)00002-8},
doi = {10.1016/S0167-739X(98)00002-8},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/fgcs/DahlgrenSS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/DahlgrenDS98,
author = {Fredrik Dahlgren and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {Performance Evaluation and Cost Analysis of Cache Protocol Extensions
for Shared-Memory Multiprocessors},
journal = {{IEEE} Trans. Computers},
volume = {47},
number = {10},
pages = {1041--1055},
year = {1998},
url = {https://doi.org/10.1109/12.729785},
doi = {10.1109/12.729785},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/DahlgrenDS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/LundqvistS98,
author = {Thomas Lundqvist and
Per Stenstr{\"{o}}m},
editor = {Frank Mueller and
Azer Bestavros},
title = {Integrating Path and Timing Analysis Using Instruction-Level Simulation
Techniques},
booktitle = {Languages, Compilers, and Tools for Embedded Systems, {ACM} {SIGPLAN}
Workshop LCTES'98, Montreal, Canada, June 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1474},
pages = {1--15},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0057776},
doi = {10.1007/BFB0057776},
timestamp = {Mon, 22 Mar 2021 14:03:05 +0100},
biburl = {https://dblp.org/rec/conf/lctrts/LundqvistS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/usenix/MagnussonLMWNSLKDG98,
author = {Peter S. Magnusson and
Fredrik Larsson and
Andreas Moestedt and
Bengt Werner and
Jim Nilsson and
Per Stenstr{\"{o}}m and
Fredrik Lundholm and
Magnus Karlsson and
Fredrik Dahlgren and
H{\aa}kan Grahn},
editor = {Fred Douglis},
title = {SimICS/Sun4m: {A} Virtual Workstation},
booktitle = {1998 {USENIX} Annual Technical Conference, New Orleans, Louisiana,
USA, June 15-19, 1998},
publisher = {{USENIX} Association},
year = {1998},
url = {https://www.usenix.org/conference/1998-usenix-annual-technical-conference/simicssun4m-virtual-workstation},
timestamp = {Mon, 01 Feb 2021 08:43:35 +0100},
biburl = {https://dblp.org/rec/conf/usenix/MagnussonLMWNSLKDG98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wcae/StenstromD98,
author = {Per Stenstr{\"{o}}m and
Fredrik Dahlgren},
title = {A holistic approach to computer system design education based on system
simulation techniques},
booktitle = {Proceedings of the 1998 workshop on Computer architecture education,
WCAE@ISCA 1998, Barcelona, Spain, June 1998},
pages = {13},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/1275182.1275195},
doi = {10.1145/1275182.1275195},
timestamp = {Tue, 06 Nov 2018 16:57:55 +0100},
biburl = {https://dblp.org/rec/conf/wcae/StenstromD98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/DahlgrenSB97,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m and
M{\aa}rten Bj{\"{o}}rkman},
title = {Reducing the Read-Miss Penalty for Flat {COMA} Protocols},
journal = {Comput. J.},
volume = {40},
number = {4},
pages = {208--219},
year = {1997},
url = {https://doi.org/10.1093/comjnl/40.4.208},
doi = {10.1093/COMJNL/40.4.208},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cj/DahlgrenSB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/StenstromBDGD97,
author = {Per Stenstr{\"{o}}m and
Mats Brorsson and
Fredrik Dahlgren and
H{\aa}kan Grahn and
Michel Dubois},
title = {Boosting the Performance of Shared Memory Multiprocessors},
journal = {Computer},
volume = {30},
number = {7},
pages = {63--70},
year = {1997},
url = {https://doi.org/10.1109/2.596630},
doi = {10.1109/2.596630},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/computer/StenstromBDGD97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/StenstromHLMV97,
author = {Per Stenstr{\"{o}}m and
Erik Hagersten and
David J. Lilja and
Margaret Martonosi and
Madan Venugopal},
title = {Trends in Shared Memory Multiprocessing},
journal = {Computer},
volume = {30},
number = {12},
pages = {44--50},
year = {1997},
url = {https://doi.org/10.1109/2.642814},
doi = {10.1109/2.642814},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/StenstromHLMV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/KarlssonS97,
author = {Magnus Karlsson and
Per Stenstr{\"{o}}m},
title = {Effectivness of Dynamic Prefetching in Multiple-Writer Distributed
Virtual Shared-Memory Systems},
journal = {J. Parallel Distributed Comput.},
volume = {43},
number = {2},
pages = {79--93},
year = {1997},
url = {https://doi.org/10.1006/jpdc.1997.1333},
doi = {10.1006/JPDC.1997.1333},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/KarlssonS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/StenstromS97,
author = {Per Stenstr{\"{o}}m and
Jonas Skeppstedt},
editor = {Christian Lengauer and
Martin Griebl and
Sergei Gorlatch},
title = {A Performance Tuning Approach for Shared-Memory Multiprocessors},
booktitle = {Euro-Par '97 Parallel Processing, Third International Euro-Par Conference,
Passau, Germany, August 26-29, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1300},
pages = {72--83},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/BFb0002718},
doi = {10.1007/BFB0002718},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/StenstromS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GrahnS97,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m},
title = {Relative Performance of Hardware and Software-Only Directory Protocols
Under Latency Tolerating and Reducing Techniques},
booktitle = {11th International Parallel Processing Symposium {(IPPS} '97), 1-5
April 1997, Geneva, Switzerland, Proceedings},
pages = {500},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IPPS.1997.580946},
doi = {10.1109/IPPS.1997.580946},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GrahnS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/StenstromD96,
author = {Per Stenstr{\"{o}}m and
Fredrik Dahlgren},
title = {Applications for Shared Memory Multiprocessors (Guest Editors' Introduction)},
journal = {Computer},
volume = {29},
number = {12},
pages = {29--31},
year = {1996},
url = {http://doi.ieeecomputersociety.org/10.1109/MC.1996.10127},
doi = {10.1109/MC.1996.10127},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/StenstromD96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/GrahnS96,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m},
title = {Evaluation of a Competitive-Update Cache Coherence Protocol with Migratory
Data Detection},
journal = {J. Parallel Distributed Comput.},
volume = {39},
number = {2},
pages = {168--180},
year = {1996},
url = {https://doi.org/10.1006/jpdc.1996.0164},
doi = {10.1006/JPDC.1996.0164},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/GrahnS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/StenstromBS96,
author = {Per Stenstr{\"{o}}m and
Magnus Balldin and
Jonas Skeppstedt},
title = {The design of a non-blocking load processor architecture},
journal = {Microprocess. Microsystems},
volume = {20},
number = {2},
pages = {111--123},
year = {1996},
url = {https://doi.org/10.1016/0141-9331(96)01080-0},
doi = {10.1016/0141-9331(96)01080-0},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/StenstromBS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pc/BrorssonS96,
author = {Mats Brorsson and
Per Stenstr{\"{o}}m},
title = {Characterising and Modelling Shared Memory Accesses in Multiprocessor
Programs},
journal = {Parallel Comput.},
volume = {22},
number = {6},
pages = {869--893},
year = {1996},
url = {https://doi.org/10.1016/0167-8191(96)00025-7},
doi = {10.1016/0167-8191(96)00025-7},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pc/BrorssonS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/toplas/SkeppstedtS96,
author = {Jonas Skeppstedt and
Per Stenstr{\"{o}}m},
title = {Using Dataflow Analysis Techniques to Reduce Ownership Overhead in
Cache Coherence Protocols},
journal = {{ACM} Trans. Program. Lang. Syst.},
volume = {18},
number = {6},
pages = {659--682},
year = {1996},
url = {https://doi.org/10.1145/236114.236116},
doi = {10.1145/236114.236116},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/toplas/SkeppstedtS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/DahlgrenS96,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {Evaluation of Hardware-Based Stride and Sequential Prefetching in
Shared-Memory Multiprocessors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {7},
number = {4},
pages = {385--398},
year = {1996},
url = {https://doi.org/10.1109/71.494633},
doi = {10.1109/71.494633},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/DahlgrenS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KarlssonS96,
author = {Magnus Karlsson and
Per Stenstr{\"{o}}m},
title = {Performance Evaluation of a Cluster-Based Multiprocessor Built from
{ATM} Switches and Bus-Based Multiprocessor Servers},
booktitle = {Proceedings of the Second International Symposium on High-Performance
Computer Architecture, San Jose, CA, USA, February 3-7, 1996},
pages = {4--13},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/HPCA.1996.501169},
doi = {10.1109/HPCA.1996.501169},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KarlssonS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fgcs/GrahnSD95,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m and
Michel Dubois},
title = {Implementation and evaluation of update-based cache protocols under
relaxed memory consistency models},
journal = {Future Gener. Comput. Syst.},
volume = {11},
number = {3},
pages = {247--271},
year = {1995},
url = {https://doi.org/10.1016/0167-739X(94)00067-O},
doi = {10.1016/0167-739X(94)00067-O},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fgcs/GrahnSD95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/DahlgrenS95,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {Using Write Caches to Improve Performance of Cache Coherence Protocols
in Shared-Memory Multiprocessors},
journal = {J. Parallel Distributed Comput.},
volume = {26},
number = {2},
pages = {193--210},
year = {1995},
url = {https://doi.org/10.1006/jpdc.1995.1059},
doi = {10.1006/JPDC.1995.1059},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/DahlgrenS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/DuboisSS95,
author = {Michel Dubois and
Jonas Skeppstedt and
Per Stenstr{\"{o}}m},
title = {Essential Misses and Data Traffic in Coherence Protocols},
journal = {J. Parallel Distributed Comput.},
volume = {29},
number = {2},
pages = {108--125},
year = {1995},
url = {https://doi.org/10.1006/jpdc.1995.1112},
doi = {10.1006/JPDC.1995.1112},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/DuboisSS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/DahlgrenDS95,
author = {Fredrik Dahlgren and
Michel Dubois and
Per Stenstr{\"{o}}m},
title = {Sequential Hardware Prefetching in Shared-Memory Multiprocessors},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {6},
number = {7},
pages = {733--746},
year = {1995},
url = {https://doi.org/10.1109/71.395402},
doi = {10.1109/71.395402},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tpds/DahlgrenDS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/SkeppstedtS95,
author = {Jonas Skeppstedt and
Per Stenstr{\"{o}}m},
editor = {Lubomir Bic and
Paraskevas Evripidou and
A. P. Wim B{\"{o}}hm and
Jean{-}Luc Gaudiot},
title = {A compiler algorithm that reduces read latency in ownership-based
cache coherence protocols},
booktitle = {Proceedings of the {IFIP} {WG10.3} working conference on Parallel
architectures and compilation techniques, {PACT} '95, Limassol, Cyprus,
June 27-29, 1995},
pages = {69--78},
publisher = {{IFIP} Working Group on Algol / {ACM}},
year = {1995},
url = {http://dl.acm.org/citation.cfm?id=224690},
timestamp = {Thu, 07 Apr 2016 15:27:42 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/SkeppstedtS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hicss/BjorkmanDS95,
author = {M{\aa}rten Bj{\"{o}}rkman and
Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {Using hints to reduce the read miss penalty for flat {COMA} protocols},
booktitle = {28th Annual Hawaii International Conference on System Sciences (HICSS-28),
January 3-6, 1995, Kihei, Maui, Hawaii, {USA}},
pages = {242--251},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/HICSS.1995.375389},
doi = {10.1109/HICSS.1995.375389},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hicss/BjorkmanDS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DahlgrenS95,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
title = {Effectiveness of Hardware-Based Stride and Sequential Prefetching
in Shared-Memory Multiprocessors},
booktitle = {Proceedings of the 1st {IEEE} Symposium on High-Performance Computer
Architecture {(HPCA} 1995), Raleigh, North Carolina, USA, January
22-25, 1995},
pages = {68--77},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/HPCA.1995.386554},
doi = {10.1109/HPCA.1995.386554},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/DahlgrenS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/GrahnS95,
author = {H{\aa}kan Grahn and
Per Stenstr{\"{o}}m},
editor = {David A. Patterson},
title = {Efficient Strategies for Software-Only Protocols in Shared-Memory
Multiprocessors},
booktitle = {Proceedings of the 22nd Annual International Symposium on Computer
Architecture, {ISCA} '95, Santa Margherita Ligure, Italy, June 22-24,
1995},
pages = {38--47},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/223982.225958},
doi = {10.1145/223982.225958},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/GrahnS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/SkeppstedtS94,
author = {Jonas Skeppstedt and
Per Stenstr{\"{o}}m},
editor = {Forest Baskett and
Douglas W. Clark},
title = {Simple Compiler Algorithms to Reduce Ownership Operhead in Cache Coherence
Protocols},
booktitle = {{ASPLOS-VI} Proceedings - Sixth International Conference on Architectural
Support for Programming Languages and Operating Systems, San Jose,
California, USA, October 4-7, 1994},
pages = {286--296},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/195473.195572},
doi = {10.1145/195473.195572},
timestamp = {Sat, 21 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/SkeppstedtS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hicss/Stenstrom94,
author = {Per Stenstr{\"{o}}m},
title = {Introduction},
booktitle = {27th Annual Hawaii International Conference on System Sciences (HICSS-27),
January 4-7, 1994, Maui, Hawaii, {USA}},
pages = {520--521},
publisher = {{IEEE} Computer Society},
year = {1994},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hicss/Stenstrom94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/PongSD94,
author = {Fong Pong and
Per Stenstr{\"{o}}m and
Michel Dubois},
editor = {Dharma P. Agrawal},
title = {An Integrated Methodology for the Verification of Directory-Based
Cache Protocols},
booktitle = {Proceedings of the 1994 International Conference on Parallel Processing,
North Carolina State University, NC, USA, August 15-19, 1994. Volume
{I:} Architecture},
pages = {158--165},
publisher = {{CRC} Press},
year = {1994},
url = {https://doi.org/10.1109/ICPP.1994.58},
doi = {10.1109/ICPP.1994.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/PongSD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/DahlgrenS94,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
editor = {Dharma P. Agrawal},
title = {Reducing the Write Traffic for a Hybrid Cache Protocol},
booktitle = {Proceedings of the 1994 International Conference on Parallel Processing,
North Carolina State University, NC, USA, August 15-19, 1994. Volume
{I:} Architecture},
pages = {166--173},
publisher = {{CRC} Press},
year = {1994},
url = {https://doi.org/10.1109/ICPP.1994.175},
doi = {10.1109/ICPP.1994.175},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/DahlgrenS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DahlgrenDS94,
author = {Fredrik Dahlgren and
Michel Dubois and
Per Stenstr{\"{o}}m},
editor = {David A. Patterson},
title = {Combined Performance Gains of Simple Cache Protocol Extensions},
booktitle = {Proceedings of the 21st Annual International Symposium on Computer
Architecture. Chicago, IL, USA, April 1994},
pages = {187--197},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ISCA.1994.288150},
doi = {10.1109/ISCA.1994.288150},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/DahlgrenDS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parle/NilssonS94,
author = {H{\aa}kan Nilsson and
Per Stenstr{\"{o}}m},
editor = {Constantine Halatsis and
Dimitris G. Maritsas and
George Philokyprou and
Sergios Theodoridis},
title = {An Adaptive Update-Based Cache Coherence Protocol for Reduction of
Miss Rate and Traffic},
booktitle = {{PARLE} '94: Parallel Architectures and Languages Europe, 6th International
{PARLE} Conference, Athens, Greece, July 4-8, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {817},
pages = {363--374},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58184-7\_115},
doi = {10.1007/3-540-58184-7\_115},
timestamp = {Fri, 17 Jul 2020 16:12:46 +0200},
biburl = {https://dblp.org/rec/conf/parle/NilssonS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/BrorssonS94,
author = {Mats Brorsson and
Per Stenstr{\"{o}}m},
title = {Modelling accesses to migratory and producer-consumer characterised
data in a shared memory multiprocessor},
booktitle = {Proceedings of the Sixth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1994, Dallas, Texas, {USA} , October 26-29, 1994},
pages = {612--619},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/SPDP.1994.346116},
doi = {10.1109/SPDP.1994.346116},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/BrorssonS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/anss/BrorssonDNS93,
author = {Mats Brorsson and
Fredrik Dahlgren and
H{\aa}kan Nilsson and
Per Stenstr{\"{o}}m},
title = {The Cachemire Test Bench {A} Flexible And Effective Approach For Simulation
Of Multiprocessors},
booktitle = {Proceedings 26th Annual Simulation Symposium, {ANSS} 1993, Arlington,
Virginia, USA, March 29 - April 1, 1993},
pages = {41--49},
publisher = {{IEEE}},
year = {1993},
url = {https://doi.org/10.1109/SIMSYM.1993.639054},
doi = {10.1109/SIMSYM.1993.639054},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/anss/BrorssonDNS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/DahlgrenDS93,
author = {Fredrik Dahlgren and
Michel Dubois and
Per Stenstr{\"{o}}m},
editor = {C. Y. Roger Chen and
P. Bruce Berra},
title = {Fixed and Adaptive Sequential Prefetching in Shared Memory Multiprocessors},
booktitle = {Proceedings of the 1993 International Conference on Parallel Processing,
Syracuse University, NY, USA, August 16-20, 1993. Volume {I:} Architecture},
pages = {56--63},
publisher = {{CRC} Press},
year = {1993},
url = {https://doi.org/10.1109/ICPP.1993.92},
doi = {10.1109/ICPP.1993.92},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/DahlgrenDS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/DuboisSRS93,
author = {Michel Dubois and
Jonas Skeppstedt and
Livio Ricciulli and
Krishnan Ramamurthy and
Per Stenstr{\"{o}}m},
editor = {Alan Jay Smith},
title = {The Detection and Elimination of Useless Misses in Multiprocessors},
booktitle = {Proceedings of the 20th Annual International Symposium on Computer
Architecture, San Diego, CA, USA, May 1993},
pages = {88--97},
publisher = {{ACM}},
year = {1993},
url = {https://doi.org/10.1145/165123.165145},
doi = {10.1145/165123.165145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/DuboisSRS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StenstromBS93,
author = {Per Stenstr{\"{o}}m and
Mats Brorsson and
Lars Sandberg},
editor = {Alan Jay Smith},
title = {An Adaptive Cache Coherence Protocol Optimized for Migratory Sharing},
booktitle = {Proceedings of the 20th Annual International Symposium on Computer
Architecture, San Diego, CA, USA, May 1993},
pages = {109--118},
publisher = {{ACM}},
year = {1993},
url = {https://doi.org/10.1145/165123.165147},
doi = {10.1145/165123.165147},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/StenstromBS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/Stenstrom92,
author = {Per Stenstr{\"{o}}m},
editor = {Viktor K. Prasanna and
Larry H. Canter},
title = {A Latency-Hiding Scheme for Multiprocessors with Buffered Multistage
Networks},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium,
Beverly Hills, CA, USA, March 1992},
pages = {39--42},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IPPS.1992.223075},
doi = {10.1109/IPPS.1992.223075},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/Stenstrom92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/StenstromJG92,
author = {Per Stenstr{\"{o}}m and
Truman Joe and
Anoop Gupta},
editor = {Allan Gottlieb},
title = {Comparative Performance Evaluation of Cache-Coherent {NUMA} and {COMA}
Architectures},
booktitle = {Proceedings of the 19th Annual International Symposium on Computer
Architecture. Gold Coast, Australia, May 1992},
pages = {80--91},
publisher = {{ACM}},
year = {1992},
url = {https://doi.org/10.1145/139669.139705},
doi = {10.1145/139669.139705},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/StenstromJG92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/NilssonS92,
author = {H{\aa}kan Nilsson and
Per Stenstr{\"{o}}m},
title = {The Scalable Tree Protocol - {A} Cache Coherence Approach for Large-Scale
Multiprocessors},
booktitle = {Proceedings of the Fourth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1992, Arlington, Texas, USA, December 1-4, 1992},
pages = {498--506},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/SPDP.1992.242703},
doi = {10.1109/SPDP.1992.242703},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/NilssonS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/StenstromDL91,
author = {Per Stenstr{\"{o}}m and
Fredrik Dahlgren and
Lars Lundberg},
title = {A Lockup-Free Multiprocessor Cache Design},
booktitle = {Proceedings of the International Conference on Parallel Processing,
{ICPP} '91, Austin, Texas, USA, August 1991. Volume {I:} Architecture/Hardware},
pages = {246--250},
publisher = {{CRC} Press},
year = {1991},
timestamp = {Mon, 28 Jul 2014 17:06:00 +0200},
biburl = {https://dblp.org/rec/conf/icpp/StenstromDL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/DahlgrenS91,
author = {Fredrik Dahlgren and
Per Stenstr{\"{o}}m},
editor = {Yashwant K. Malaiya},
title = {On Reconfigurable On-Chip Data Caches},
booktitle = {Proceedings of the 24th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 24, Albuquerque, New Mexico, USA, November
18-20, 1991},
pages = {189--198},
publisher = {{ACM/IEEE}},
year = {1991},
url = {https://doi.org/10.1145/123465.123504},
doi = {10.1145/123465.123504},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/DahlgrenS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/Stenstrom90,
author = {Per Stenstr{\"{o}}m},
title = {A Survey of Cache Coherence Schemes for Multiprocessors},
journal = {Computer},
volume = {23},
number = {6},
pages = {12--24},
year = {1990},
url = {https://doi.org/10.1109/2.55497},
doi = {10.1109/2.55497},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/Stenstrom90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Stenstrom89,
author = {Per Stenstr{\"{o}}m},
editor = {Jean{-}Claude Syre},
title = {A Cache Consistency Protocol for Multiprocessors with Multistage Networks},
booktitle = {Proceedings of the 16th Annual International Symposium on Computer
Architecture. Jerusalem, Israel, June 1989},
pages = {407--415},
publisher = {{ACM}},
year = {1989},
url = {https://doi.org/10.1145/74925.74971},
doi = {10.1145/74925.74971},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Stenstrom89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/Stenstrom88,
author = {Per Stenstr{\"{o}}m},
title = {Reducing Contention in Sharde-Memory Multiprocessors},
journal = {Computer},
volume = {21},
number = {11},
pages = {26--37},
year = {1988},
url = {https://doi.org/10.1109/2.86784},
doi = {10.1109/2.86784},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/Stenstrom88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parle/StenstromP87,
author = {Per Stenstr{\"{o}}m and
Lars H. Philipson},
editor = {J. W. de Bakker and
A. J. Nijman and
Philip C. Treleaven},
title = {A Layered Emulator for Design Evaluation of {MIMD} Multiprocessors
with Shared Memory},
booktitle = {PARLE, Parallel Architectures and Languages Europe, Volume {I:} Parallel
Architectures, Eindhoven, The Netherlands, June 15-19, 1987, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {258},
pages = {329--344},
publisher = {Springer},
year = {1987},
url = {https://doi.org/10.1007/3-540-17943-7\_137},
doi = {10.1007/3-540-17943-7\_137},
timestamp = {Wed, 29 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/parle/StenstromP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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