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ORCIDBibTeX records: Magnus Själander
@article{DBLP:journals/taco/SakalisKS23,
author = {Christos Sakalis and
Stefanos Kaxiras and
Magnus Sj{\"{a}}lander},
title = {Delay-on-Squash: Stopping Microarchitectural Replay Attacks in Their
Tracks},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {20},
number = {1},
pages = {9:1--9:24},
year = {2023},
url = {https://doi.org/10.1145/3563695},
doi = {10.1145/3563695},
timestamp = {Sat, 11 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SakalisKS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MetzKS23,
author = {David Metz and
Vineet Kumar and
Magnus Sj{\"{a}}lander},
title = {{BISDU:} {A} Bit-Serial Dot-Product Unit for Microcontrollers},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {22},
number = {5},
pages = {79:1--79:22},
year = {2023},
url = {https://doi.org/10.1145/3608447},
doi = {10.1145/3608447},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MetzKS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SahaCAGSM23,
author = {Sangeet Saha and
Shounak Chakraborty and
Sukarn Agarwal and
Rahul Gangopadhyay and
Magnus Sj{\"{a}}lander and
Klaus D. McDonald{-}Maier},
title = {{DELICIOUS:} Deadline-Aware Approximate Computing in Cache-Conscious
Multicore},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {34},
number = {2},
pages = {718--733},
year = {2023},
url = {https://doi.org/10.1109/TPDS.2022.3228751},
doi = {10.1109/TPDS.2022.3228751},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SahaCAGSM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AgarwalCS23,
author = {Sukarn Agarwal and
Shounak Chakraborty and
Magnus Sj{\"{a}}lander},
title = {Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous
System {(ARMOUR)}},
booktitle = {60th {ACM/IEEE} Design Automation Conference, {DAC} 2023, San Francisco,
CA, USA, July 9-13, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DAC56929.2023.10247878},
doi = {10.1109/DAC56929.2023.10247878},
timestamp = {Sun, 24 Sep 2023 13:31:06 +0200},
biburl = {https://dblp.org/rec/conf/dac/AgarwalCS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KvalsvikAKS23,
author = {Amund Bergland Kvalsvik and
Pavlos Aimoniotis and
Stefanos Kaxiras and
Magnus Sj{\"{a}}lander},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {Doppelganger Loads: {A} Safe, Complexity-Effective Optimization for
Secure Speculation Schemes},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {53:1--53:13},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589088},
doi = {10.1145/3579371.3589088},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/KvalsvikAKS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AimoniotisKCSK23,
author = {Pavlos Aimoniotis and
Amund Bergland Kvalsvik and
Xiaoyue Chen and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {ReCon: Efficient Detection, Management, and Use of Non-Speculative
Information Leakage},
booktitle = {Proceedings of the 56th Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 2023, Toronto, ON, Canada, 28 October
2023 - 1 November 2023},
pages = {828--842},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3613424.3623770},
doi = {10.1145/3613424.3623770},
timestamp = {Sun, 31 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/micro/AimoniotisKCSK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/0001SS22,
author = {Shounak Chakraborty and
Vassos Soteriou and
Magnus Sj{\"{a}}lander},
editor = {Luca Sterpone and
Andrea Bartolini and
Anastasiia Butko},
title = {{STIFF:} thermally safe temperature effect inversion aware FinFET
based multi-core},
booktitle = {{CF} '22: 19th {ACM} International Conference on Computing Frontiers,
Turin, Italy, May 17 - 22, 2022},
pages = {21--29},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3528416.3530223},
doi = {10.1145/3528416.3530223},
timestamp = {Thu, 05 May 2022 15:51:05 +0200},
biburl = {https://dblp.org/rec/conf/cf/0001SS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seed/AimoniotisKSK22,
author = {Pavlos Aimoniotis and
Amund Bergland Kvalsvik and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {Data-Out Instruction-In (DOIN!): Leveraging Inclusive Caches to Attack
Speculative Delay Schemes},
booktitle = {2022 {IEEE} International Symposium on Secure and Private Execution
Environment Design (SEED), Storrs, CT, USA, September 26-27, 2022},
pages = {49--60},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SEED55351.2022.00012},
doi = {10.1109/SEED55351.2022.00012},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/seed/AimoniotisKSK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AimoniotisSSK21,
author = {Pavlos Aimoniotis and
Christos Sakalis and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {Reorder Buffer Contention: {A} Forward Speculative Interference Attack
for Speculation Invariant Instructions},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {20},
number = {2},
pages = {162--165},
year = {2021},
url = {https://doi.org/10.1109/LCA.2021.3123408},
doi = {10.1109/LCA.2021.3123408},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AimoniotisSSK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/ChakrabortyS21,
author = {Shounak Chakraborty and
Magnus Sj{\"{a}}lander},
title = {WaFFLe: Gated Cache-Ways with Per-Core Fine-Grained {DVFS} for Reduced
On-Chip Temperature and Leakage Consumption},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {18},
number = {4},
pages = {55:1--55:25},
year = {2021},
url = {https://doi.org/10.1145/3471908},
doi = {10.1145/3471908},
timestamp = {Tue, 16 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/ChakrabortyS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/0001SSM21,
author = {Shounak Chakraborty and
Sangeet Saha and
Magnus Sj{\"{a}}lander and
Klaus D. McDonald{-}Maier},
title = {Prepare: Power-Aware Approximate Real-time Task Scheduling for Energy-Adaptive
QoS Maximization},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {20},
number = {5s},
pages = {62:1--61:25},
year = {2021},
url = {https://doi.org/10.1145/3476993},
doi = {10.1145/3476993},
timestamp = {Fri, 26 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/0001SSM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seed/SakalisCWARSKK21,
author = {Christos Sakalis and
Zamshed I. Chowdhury and
Shayne Wadle and
Ismail Akturk and
Alberto Ros and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras and
Ulya R. Karpuzcu},
title = {Do Not Predict - Recompute! How Value Recomputation Can Truly Boost
the Performance of Invisible Speculation},
booktitle = {2021 International Symposium on Secure and Private Execution Environment
Design (SEED), Washington, DC, USA, September 20-21, 2021},
pages = {89--100},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/SEED51797.2021.00021},
doi = {10.1109/SEED51797.2021.00021},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/seed/SakalisCWARSKK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seed/SakalisSK21,
author = {Christos Sakalis and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {Seeds of {SEED:} Preventing Priority Inversion in Instruction Scheduling
to Disrupt Speculative Interference},
booktitle = {2021 International Symposium on Secure and Private Execution Environment
Design (SEED), Washington, DC, USA, September 20-21, 2021},
pages = {101--107},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/SEED51797.2021.00022},
doi = {10.1109/SEED51797.2021.00022},
timestamp = {Tue, 08 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/seed/SakalisSK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2102-10932,
author = {Christos Sakalis and
Zamshed I. Chowdhury and
Shayne Wadle and
Ismail Akturk and
Alberto Ros and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras and
Ulya R. Karpuzcu},
title = {On Value Recomputation to Accelerate Invisible Speculation},
journal = {CoRR},
volume = {abs/2102.10932},
year = {2021},
url = {https://arxiv.org/abs/2102.10932},
eprinttype = {arXiv},
eprint = {2102.10932},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2102-10932.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2103-10692,
author = {Christos Sakalis and
Stefanos Kaxiras and
Magnus Sj{\"{a}}lander},
title = {Selectively Delaying Instructions to Prevent Microarchitectural Replay
Attacks},
journal = {CoRR},
volume = {abs/2103.10692},
year = {2021},
url = {https://arxiv.org/abs/2103.10692},
eprinttype = {arXiv},
eprint = {2103.10692},
timestamp = {Wed, 24 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2103-10692.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2109-10774,
author = {Pavlos Aimoniotis and
Christos Sakalis and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {"It's a Trap!"-How Speculation Invariance Can Be Abused
with Forward Speculative Interference},
journal = {CoRR},
volume = {abs/2109.10774},
year = {2021},
url = {https://arxiv.org/abs/2109.10774},
eprinttype = {arXiv},
eprint = {2109.10774},
timestamp = {Mon, 27 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2109-10774.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SakalisJKS20,
author = {Christos Sakalis and
Alexandra Jimborean and
Stefanos Kaxiras and
Magnus Sj{\"{a}}lander},
title = {Evaluating the Potential Applications of Quaternary Logic for Approximate
Computing},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {16},
number = {1},
pages = {5:1--5:25},
year = {2020},
url = {https://doi.org/10.1145/3359620},
doi = {10.1145/3359620},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/SakalisJKS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SakalisKRJS20,
author = {Christos Sakalis and
Stefanos Kaxiras and
Alberto Ros and
Alexandra Jimborean and
Magnus Sj{\"{a}}lander},
title = {Understanding Selective Delay as a Method for Efficient Secure Speculative
Execution},
journal = {{IEEE} Trans. Computers},
volume = {69},
number = {11},
pages = {1584--1595},
year = {2020},
url = {https://doi.org/10.1109/TC.2020.3014456},
doi = {10.1109/TC.2020.3014456},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/SakalisKRJS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/TranSSRKJ20,
author = {Kim{-}Anh Tran and
Christos Sakalis and
Magnus Sj{\"{a}}lander and
Alberto Ros and
Stefanos Kaxiras and
Alexandra Jimborean},
editor = {Vivek Sarkar and
Hyesoon Kim},
title = {Clearing the Shadows: Recovering Lost Performance for Invisible Speculative
Execution through {HW/SW} Co-Design},
booktitle = {{PACT} '20: International Conference on Parallel Architectures and
Compilation Techniques, Virtual Event, GA, USA, October 3-7, 2020},
pages = {241--254},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3410463.3414640},
doi = {10.1145/3410463.3414640},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/TranSSRKJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ChakrabortySSM20,
author = {Shounak Chakraborty and
Sangeet Saha and
Magnus Sj{\"{a}}lander and
Klaus D. McDonald{-}Maier},
title = {RePAiR: {A} Strategy for Reducing Peak Temperature while Maximising
Accuracy of Approximate Real-Time Computing: Work-in-Progress},
booktitle = {International Conference on Hardware/Software Codesign and System
Synthesis, {CODES+ISSS} 2020, Singapore, September 20-25, 2020},
pages = {8--10},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/CODESISSS51650.2020.9244040},
doi = {10.1109/CODESISSS51650.2020.9244040},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/ChakrabortySSM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/NishtalaPCS20,
author = {Rajiv Nishtala and
Vinicius Petrucci and
Paul M. Carpenter and
Magnus Sj{\"{a}}lander},
title = {Twig: Multi-Agent Task Management for Colocated Latency-Critical Cloud
Services},
booktitle = {{IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2020, San Diego, CA, USA, February 22-26, 2020},
pages = {167--179},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/HPCA47549.2020.00023},
doi = {10.1109/HPCA47549.2020.00023},
timestamp = {Tue, 04 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/NishtalaPCS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/UmurogluCRPS19,
author = {Yaman Umuroglu and
Davide Conficconi and
Lahiru Rasnayake and
Thomas B. Preu{\ss}er and
Magnus Sj{\"{a}}lander},
title = {Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {12},
number = {3},
pages = {15:1--15:24},
year = {2019},
url = {https://doi.org/10.1145/3337929},
doi = {10.1145/3337929},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/trets/UmurogluCRPS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/SakalisARJKS19,
author = {Christos Sakalis and
Mehdi Alipour and
Alberto Ros and
Alexandra Jimborean and
Stefanos Kaxiras and
Magnus Sj{\"{a}}lander},
editor = {Francesca Palumbo and
Michela Becchi and
Martin Schulz and
Kento Sato},
title = {Ghost loads: what is the cost of invisible speculation?},
booktitle = {Proceedings of the 16th {ACM} International Conference on Computing
Frontiers, {CF} 2019, Alghero, Italy, April 30 - May 2, 2019},
pages = {153--163},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3310273.3321558},
doi = {10.1145/3310273.3321558},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/SakalisARJKS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icfpt/RasnayakeS19,
author = {Lahiru Rasnayake and
Magnus Sj{\"{a}}lander},
title = {Improving Memory Access Locality for Vectorized Bit-Serial Matrix
Multiplication in Reconfigurable Computing},
booktitle = {International Conference on Field-Programmable Technology, {FPT} 2019,
Tianjin, China, December 9-13, 2019},
pages = {415--418},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICFPT47387.2019.00081},
doi = {10.1109/ICFPT47387.2019.00081},
timestamp = {Mon, 17 Feb 2020 13:32:10 +0100},
biburl = {https://dblp.org/rec/conf/icfpt/RasnayakeS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SakalisKRJS19,
author = {Christos Sakalis and
Stefanos Kaxiras and
Alberto Ros and
Alexandra Jimborean and
Magnus Sj{\"{a}}lander},
editor = {Srilatha Bobbie Manne and
Hillery C. Hunter and
Erik R. Altman},
title = {Efficient invisible speculative execution through selective delay
and value prediction},
booktitle = {Proceedings of the 46th International Symposium on Computer Architecture,
{ISCA} 2019, Phoenix, AZ, USA, June 22-26, 2019},
pages = {723--735},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3307650.3322216},
doi = {10.1145/3307650.3322216},
timestamp = {Wed, 31 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SakalisKRJS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1901-00370,
author = {Yaman Umuroglu and
Davide Conficconi and
Lahiru Rasnayake and
Thomas B. Preu{\ss}er and
Magnus Sj{\"{a}}lander},
title = {Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing},
journal = {CoRR},
volume = {abs/1901.00370},
year = {2019},
url = {http://arxiv.org/abs/1901.00370},
eprinttype = {arXiv},
eprint = {1901.00370},
timestamp = {Thu, 31 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1901-00370.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1912-05036,
author = {Nico Reissmann and
Jan Christian Meyer and
Helge Bahmann and
Magnus Sj{\"{a}}lander},
title = {{RVSDG:} An Intermediate Representation for Optimizing Compilers},
journal = {CoRR},
volume = {abs/1912.05036},
year = {2019},
url = {http://arxiv.org/abs/1912.05036},
eprinttype = {arXiv},
eprint = {1912.05036},
timestamp = {Thu, 02 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1912-05036.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1912-05848,
author = {Magnus Sj{\"{a}}lander and
Magnus Jahre and
Gunnar Tufte and
Nico Reissmann},
title = {{EPIC:} An Energy-Efficient, High-Performance {GPGPU} Computing Research
Infrastructure},
journal = {CoRR},
volume = {abs/1912.05848},
year = {2019},
url = {http://arxiv.org/abs/1912.05848},
eprinttype = {arXiv},
eprint = {1912.05848},
timestamp = {Thu, 02 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1912-05848.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/TranCKSSKJ18,
author = {Kim{-}Anh Tran and
Trevor E. Carlson and
Konstantinos Koukos and
Magnus Sj{\"{a}}lander and
Vasileios Spiliopoulos and
Stefanos Kaxiras and
Alexandra Jimborean},
title = {Static Instruction Scheduling for High Performance on Limited Hardware},
journal = {{IEEE} Trans. Computers},
volume = {67},
number = {4},
pages = {513--527},
year = {2018},
url = {https://doi.org/10.1109/TC.2017.2769641},
doi = {10.1109/TC.2017.2769641},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/TranCKSSKJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UmurogluRS18,
author = {Yaman Umuroglu and
Lahiru Rasnayake and
Magnus Sj{\"{a}}lander},
title = {{BISMO:} {A} Scalable Bit-Serial Matrix Multiplication Overlay for
Reconfigurable Computing},
booktitle = {28th International Conference on Field Programmable Logic and Applications,
{FPL} 2018, Dublin, Ireland, August 27-31, 2018},
pages = {307--314},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/FPL.2018.00059},
doi = {10.1109/FPL.2018.00059},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/UmurogluRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/TranJCKSK18,
author = {Kim{-}Anh Tran and
Alexandra Jimborean and
Trevor E. Carlson and
Konstantinos Koukos and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
editor = {Jeffrey S. Foster and
Dan Grossman},
title = {{SWOOP:} software-hardware co-design for non-speculative, execute-ahead,
in-order cores},
booktitle = {Proceedings of the 39th {ACM} {SIGPLAN} Conference on Programming
Language Design and Implementation, {PLDI} 2018, Philadelphia, PA,
USA, June 18-22, 2018},
pages = {328--343},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3192366.3192393},
doi = {10.1145/3192366.3192393},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pldi/TranJCKSK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1806-08862,
author = {Yaman Umuroglu and
Lahiru Rasnayake and
Magnus Sj{\"{a}}lander},
title = {{BISMO:} {A} Scalable Bit-Serial Matrix Multiplication Overlay for
Reconfigurable Computing},
journal = {CoRR},
volume = {abs/1806.08862},
year = {2018},
url = {http://arxiv.org/abs/1806.08862},
eprinttype = {arXiv},
eprint = {1806.08862},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1806-08862.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CarlsonTJKSK17,
author = {Trevor E. Carlson and
Kim{-}Anh Tran and
Alexandra Jimborean and
Konstantinos Koukos and
Magnus Sj{\"{a}}lander and
Stefanos Kaxiras},
title = {Transcending Hardware Limits with Software Out-of-Order Processing},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {16},
number = {2},
pages = {162--165},
year = {2017},
url = {https://doi.org/10.1109/LCA.2017.2672559},
doi = {10.1109/LCA.2017.2672559},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/CarlsonTJKSK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/TranCKSSKJ17,
author = {Kim{-}Anh Tran and
Trevor E. Carlson and
Konstantinos Koukos and
Magnus Sj{\"{a}}lander and
Vasileios Spiliopoulos and
Stefanos Kaxiras and
Alexandra Jimborean},
editor = {Vijay Janapa Reddi and
Aaron Smith and
Lingjia Tang},
title = {Clairvoyance: look-ahead compile-time scheduling},
booktitle = {Proceedings of the 2017 International Symposium on Code Generation
and Optimization, {CGO} 2017, Austin, TX, USA, February 4-8, 2017},
pages = {171--184},
publisher = {{ACM}},
year = {2017},
url = {http://dl.acm.org/citation.cfm?id=3049852},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgo/TranCKSSKJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/SanchezGMSWLM16,
author = {Carlos Sanchez and
Peter Gavin and
Daniel Moreau and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors and
Sally A. McKee},
title = {Redesigning a tagless access buffer to require minimal {ISA} changes},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {19:1--19:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968504},
doi = {10.1145/2968455.2968504},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/SanchezGMSWLM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cd/SjalanderBKRK16,
author = {Magnus Sj{\"{a}}lander and
Gustaf Borgstr{\"{o}}m and
Mykhailo V. Klymenko and
Fran{\c{c}}oise Remacle and
Stefanos Kaxiras},
editor = {Gianluca Palermo and
John Feo},
title = {Techniques for modulating error resilience in emerging multi-value
technologies},
booktitle = {Proceedings of the {ACM} International Conference on Computing Frontiers,
CF'16, Como, Italy, May 16-19, 2016},
pages = {55--63},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2903150.2903154},
doi = {10.1145/2903150.2903154},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cd/SjalanderBKRK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MoreauBSWL16,
author = {Daniel Moreau and
Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Practical way halting by speculatively accessing halt tags},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {1375--1380},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459523/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/MoreauBSWL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ewsn/VoigtSH16,
author = {Thiemo Voigt and
Magnus Sj{\"{a}}lander and
Frederik Hermans},
editor = {Kay R{\"{o}}mer and
Koen Langendoen and
Thiemo Voigt},
title = {Poster: Approximation: {A} New Paradigm also for Wireless Sensing},
booktitle = {Proceedings of the International Conference on Embedded Wireless Systems
and Networks, {EWSN} 2016, Graz, Austria, 15-17 February 2016},
pages = {221--222},
publisher = {Junction Publishing, Canada / {ACM}},
year = {2016},
url = {http://dl.acm.org/citation.cfm?id=2893743},
timestamp = {Mon, 14 Mar 2016 14:41:52 +0100},
biburl = {https://dblp.org/rec/conf/ewsn/VoigtSH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DavisBGSFRCUWT15,
author = {B. Davis and
Ryan Baird and
Peter Gavin and
Magnus Sj{\"{a}}lander and
Ian Finlayson and
F. Rasapour and
G. Cook and
Gang{-}Ryung Uh and
David B. Whalley and
Gary S. Tyson},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Scheduling instruction effects for a statically pipelined processor},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {167--176},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324557},
doi = {10.1109/CASES.2015.7324557},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/DavisBGSFRCUWT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/BairdGSWU15,
author = {Ryan Baird and
Peter Gavin and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Gang{-}Ryung Uh},
editor = {Sam H. Noh and
Sebastian Fischmeister and
Jason Xue},
title = {Optimizing Transfers of Control in the Static Pipeline Architecture},
booktitle = {Proceedings of the 16th {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers and Tools for Embedded Systems, {LCTES} 2015, CD-ROM, Portland,
OR, USA, June 18 - 19, 2015},
pages = {1:1--1:10},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2670529.2754952},
doi = {10.1145/2670529.2754952},
timestamp = {Wed, 23 Jun 2021 16:58:51 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/BairdGSWU15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/BardizbanyanSWL15,
author = {Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors},
editor = {Sam H. Noh and
Sebastian Fischmeister and
Jason Xue},
title = {Improving Data Access Efficiency by Using Context-Aware Loads and
Stores},
booktitle = {Proceedings of the 16th {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers and Tools for Embedded Systems, {LCTES} 2015, CD-ROM, Portland,
OR, USA, June 18 - 19, 2015},
pages = {3:1--3:10},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2670529.2754960},
doi = {10.1145/2670529.2754960},
timestamp = {Wed, 23 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/BardizbanyanSWL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2014Sjalander,
author = {Magnus Sj{\"{a}}lander and
Margaret Martonosi and
Stefanos Kaxiras},
title = {Power-Efficient Computer Architectures: Recent Advances},
series = {Synthesis Lectures on Computer Architecture},
publisher = {Morgan {\&} Claypool Publishers},
year = {2014},
url = {https://doi.org/10.2200/S00611ED1V01Y201411CAC030},
doi = {10.2200/S00611ED1V01Y201411CAC030},
isbn = {978-3-031-00617-3},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/synthesis/2014Sjalander.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BardizbanyanSWL14,
author = {Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Reducing set-associative {L1} data cache energy by early load data
dependence detection (ELD\({}^{\mbox{3}}\))},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.095},
doi = {10.7873/DATE.2014.095},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BardizbanyanSWL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/SjalanderNK14,
author = {Magnus Sj{\"{a}}lander and
Nina Shariati Nilsson and
Stefanos Kaxiras},
editor = {Jacques{-}Olivier Klein and
Csaba Andras Moritz and
Sorin Cotofana},
title = {A tunable cache for approximate computing},
booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
2014, Paris, France, July 8-10, 2014},
pages = {88--89},
publisher = {{IEEE} Computer Society/ACM},
year = {2014},
url = {https://doi.org/10.1109/NANOARCH.2014.6880480},
doi = {10.1109/NANOARCH.2014.6880480},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/SjalanderNK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BardizbanyanSWL13,
author = {Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors},
title = {Designing a practical data filter cache to improve both energy efficiency
and performance},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {10},
number = {4},
pages = {54:1--54:25},
year = {2013},
url = {https://doi.org/10.1145/2541228.2555310},
doi = {10.1145/2541228.2555310},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/BardizbanyanSWL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/GavinWS13,
author = {Peter Gavin and
David B. Whalley and
Magnus Sj{\"{a}}lander},
title = {Reducing instruction fetch energy in multi-issue processors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {10},
number = {4},
pages = {64:1--64:24},
year = {2013},
url = {https://doi.org/10.1145/2541228.2555318},
doi = {10.1145/2541228.2555318},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/GavinWS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cgo/BardizbanyanGWSLMS13,
author = {Alen Bardizbanyan and
Peter Gavin and
David B. Whalley and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors and
Sally A. McKee and
Per Stenstr{\"{o}}m},
title = {Improving data access efficiency by using a tagless access buffer
{(TAB)}},
booktitle = {Proceedings of the 2013 {IEEE/ACM} International Symposium on Code
Generation and Optimization, {CGO} 2013, Shenzhen, China, February
23-27, 2013},
pages = {28:1--28:11},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/CGO.2013.6495003},
doi = {10.1109/CGO.2013.6495003},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cgo/BardizbanyanGWSLMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BardizbanyanSWL13,
author = {Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
David B. Whalley and
Per Larsson{-}Edefors},
title = {Speculative tag access for reduced energy dissipation in set-associative
{L1} data caches},
booktitle = {2013 {IEEE} 31st International Conference on Computer Design, {ICCD}
2013, Asheville, NC, USA, October 6-9, 2013},
pages = {302--308},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ICCD.2013.6657057},
doi = {10.1109/ICCD.2013.6657057},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BardizbanyanSWL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/FinlaysonDGUWST13,
author = {Ian Finlayson and
Brandon Davis and
Peter Gavin and
Gang{-}Ryung Uh and
David B. Whalley and
Magnus Sj{\"{a}}lander and
Gary S. Tyson},
editor = {Bj{\"{o}}rn Franke and
Jingling Xue},
title = {Improving processor efficiency by statically pipelining instructions},
booktitle = {{SIGPLAN/SIGBED} Conference on Languages, Compilers and Tools for
Embedded Systems 2013, {LCTES} '13, Seattle, WA, USA, June 20-21,
2013},
pages = {33--44},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2491899.2465559},
doi = {10.1145/2491899.2465559},
timestamp = {Thu, 24 Jun 2021 16:19:30 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/FinlaysonDGUWST13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/SjalanderL13,
author = {Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {FlexCore: Implementing an exposed datapath processor},
booktitle = {2013 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos
Island, Greece, July 15-18, 2013},
pages = {306--313},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/SAMOS.2013.6621139},
doi = {10.1109/SAMOS.2013.6621139},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/SjalanderL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ac/GoelMS12,
author = {Bhavishya Goel and
Sally A. McKee and
Magnus Sj{\"{a}}lander},
title = {Techniques to Measure, Model, and Manage Power},
journal = {Adv. Comput.},
volume = {87},
pages = {7--54},
year = {2012},
url = {https://doi.org/10.1016/B978-0-12-396528-8.00002-X},
doi = {10.1016/B978-0-12-396528-8.00002-X},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ac/GoelMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AzharSAVHAL12,
author = {Muhammad Waqar Azhar and
Magnus Sj{\"{a}}lander and
Hasan Ali and
Akshay Vijayashekar and
Tung Thanh Hoang and
Kashan Khurshid Ansari and
Per Larsson{-}Edefors},
title = {Viterbi Accelerator for Embedded Processor Datapaths},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {133--140},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.24},
doi = {10.1109/ASAP.2012.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AzharSAVHAL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/SjalanderMBEV12,
author = {Magnus Sj{\"{a}}lander and
Sally A. McKee and
Peter Brauer and
David Engdal and
Andr{\'{a}}s Vajda},
editor = {Rajeev Balasubramonian and
Vijayalakshmi Srinivasan},
title = {An {LTE} Uplink Receiver {PHY} benchmark and subframe-based power
management},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, New Brunswick, NJ, USA, April 1-3, 2012},
pages = {25--34},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISPASS.2012.6189203},
doi = {10.1109/ISPASS.2012.6189203},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/SjalanderMBEV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/SaljooghiBSL12,
author = {Vahid Saljooghi and
Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {Configurable {RTL} model for level-1 caches},
booktitle = {{NORCHIP} 2012, Copenhagen, Denmark, November 12-13, 2012},
pages = {1--4},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/NORCHP.2012.6403112},
doi = {10.1109/NORCHP.2012.6403112},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/norchip/SaljooghiBSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/BardizbanyanSL11,
author = {Alen Bardizbanyan and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {Reconfigurable Instruction Decoding for a Wide-Control-Word Processor},
booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings},
pages = {322--325},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/IPDPS.2011.155},
doi = {10.1109/IPDPS.2011.155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/BardizbanyanSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mascots/SjalanderMGBEV11,
author = {Magnus Sj{\"{a}}lander and
Sally A. McKee and
Bhavishya Goel and
Peter Brauer and
David Engdal and
Andr{\'{a}}s Vajda},
title = {Power-Aware Resource Scheduling in Base Stations},
booktitle = {{MASCOTS} 2011, 19th Annual {IEEE/ACM} International Symposium on
Modeling, Analysis and Simulation of Computer and Telecommunication
Systems, Singapore, 25-27 July, 2011},
pages = {462--465},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/MASCOTS.2011.51},
doi = {10.1109/MASCOTS.2011.51},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mascots/SjalanderMGBEV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/HoangSL10,
author = {Tung Thanh Hoang and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {A High-Speed, Energy-Efficient Two-Cycle Multiply-Accumulate {(MAC)}
Architecture and Its Application to a Double-Throughput {MAC} Unit},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {12},
pages = {3073--3081},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2010.2091191},
doi = {10.1109/TCSI.2010.2091191},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/HoangSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HoangJHSSL10,
author = {Tung Thanh Hoang and
Ulf Jalmbrant and
Erik der Hagopian and
Kasyab P. Subramaniyan and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Design space exploration for an embedded processor with flexible datapath
interconnect},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {55--62},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540812},
doi = {10.1109/ASAP.2010.5540812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HoangJHSSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SjalanderL09,
author = {Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {Multiplication Acceleration Through Twin Precision},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {9},
pages = {1233--1246},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2002107},
doi = {10.1109/TVLSI.2008.2002107},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SjalanderL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/ThuressonSBSLS09,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Magnus Bj{\"{o}}rk and
Lars J. Svensson and
Per Larsson{-}Edefors and
Per Stenstr{\"{o}}m},
title = {FlexCore: Utilizing Exposed Datapath Control for Efficient Computing},
journal = {J. Signal Process. Syst.},
volume = {57},
number = {1},
pages = {5--19},
year = {2009},
url = {https://doi.org/10.1007/s11265-008-0172-z},
doi = {10.1007/S11265-008-0172-Z},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/ThuressonSBSLS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/ThuressonSS09,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Per Stenstr{\"{o}}m},
editor = {Andr{\'{e}} Seznec and
Joel S. Emer and
Michael F. P. O'Boyle and
Margaret Martonosi and
Theo Ungerer},
title = {A Flexible Code Compression Scheme Using Partitioned Look-Up Tables},
booktitle = {High Performance Embedded Architectures and Compilers, Fourth International
Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5409},
pages = {95--109},
publisher = {Springer},
year = {2009},
url = {https://doi.org/10.1007/978-3-540-92990-1\_9},
doi = {10.1007/978-3-540-92990-1\_9},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hipeac/ThuressonSS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/KimforsBHSSEL09,
author = {Patrik Kimfors and
Niklas Broman and
Andreas Haraldsson and
Kasyab P. Subramaniyan and
Magnus Sj{\"{a}}lander and
Henrik Eriksson and
Per Larsson{-}Edefors},
title = {Custom layout strategy for rectangle-shaped log-depth multiplier reduction
tree},
booktitle = {16th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
2009},
pages = {77--80},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICECS.2009.5410927},
doi = {10.1109/ICECS.2009.5410927},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/KimforsBHSSEL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HoangSL09,
author = {Tung Thanh Hoang and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {Double Throughput Multiply-Accumulate unit for FlexCore processor
enhancements},
booktitle = {23rd {IEEE} International Symposium on Parallel and Distributed Processing,
{IPDPS} 2009, Rome, Italy, May 23-29, 2009},
pages = {1--7},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/IPDPS.2009.5161212},
doi = {10.1109/IPDPS.2009.5161212},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HoangSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SchillingSL09,
author = {Thomas Schilling and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {Scheduling for an Embedded Architecture with a Flexible Datapath},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2009, 13-15
May 2009, Tampa, Florida, {USA}},
pages = {151--156},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISVLSI.2009.6},
doi = {10.1109/ISVLSI.2009.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/SchillingSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/HoangSL09,
author = {Tung Thanh Hoang and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {High-speed, energy-efficient 2-cycle Multiply-Accumulate architecture},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11,
2009, Belfast, Northern Ireland, UK, Proceedings},
pages = {119--122},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/SOCCON.2009.5398079},
doi = {10.1109/SOCCON.2009.5398079},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/socc/HoangSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/IslamSS08,
author = {Md. Mafijul Islam and
Magnus Sj{\"{a}}lander and
Per Stenstr{\"{o}}m},
title = {Early detection and bypassing of trivial operations to improve energy
efficiency of processors},
journal = {Microprocess. Microsystems},
volume = {32},
number = {4},
pages = {183--196},
year = {2008},
url = {https://doi.org/10.1016/j.micpro.2007.10.001},
doi = {10.1016/J.MICPRO.2007.10.001},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/IslamSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SjalanderTD08,
author = {Magnus Sj{\"{a}}lander and
Andrei Sergeevich Terechko and
Marc Duranton},
editor = {Luca Fanucci},
title = {A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {149--157},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.45},
doi = {10.1109/DSD.2008.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SjalanderTD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SjalanderL08,
author = {Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
title = {High-speed and low-power multipliers using the Baugh-Wooley algorithm
and {HPM} reduction tree},
booktitle = {15th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2008, St. Julien's, Malta, August 31 2008-September
3, 2008},
pages = {33--36},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICECS.2008.4674784},
doi = {10.1109/ICECS.2008.4674784},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/SjalanderL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/SjalanderLB07,
author = {Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors and
Magnus Bj{\"{o}}rk},
title = {A Flexible Datapath Interconnect for Embedded Applications},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {15--20},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.4},
doi = {10.1109/ISVLSI.2007.4},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/SjalanderLB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/ThuressonSBSLS07,
author = {Martin Thuresson and
Magnus Sj{\"{a}}lander and
Magnus Bj{\"{o}}rk and
Lars J. Svensson and
Per Larsson{-}Edefors and
Per Stenstr{\"{o}}m},
editor = {Holger Blume and
Georgi Gaydadjiev and
C. John Glossner and
Peter M. W. Knijnenburg},
title = {FlexCore: Utilizing Exposed Datapath Control for Efficient Computing},
booktitle = {Proceedings of the 2007 International Conference on Embedded Computer
Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2007),
Samos, Greece, July 16-19, 2007},
pages = {18--25},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICSAMOS.2007.4285729},
doi = {10.1109/ICSAMOS.2007.4285729},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/ThuressonSBSLS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ErikssonLSSJS06,
author = {Henrik Eriksson and
Per Larsson{-}Edefors and
Mary Sheeran and
Magnus Sj{\"{a}}lander and
Daniel Johansson and
Martin Scholin},
title = {Multiplier reduction tree with logarithmic logic depth and regular
connectivity},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1692508},
doi = {10.1109/ISCAS.2006.1692508},
timestamp = {Wed, 13 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ErikssonLSSJS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SjalanderDLE05,
author = {Magnus Sj{\"{a}}lander and
Mindaugas Drazdziulis and
Per Larsson{-}Edefors and
Henrik Eriksson},
title = {A low-leakage twin-precision multiplier using reconfigurable power
gating},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {1654--1657},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1464922},
doi = {10.1109/ISCAS.2005.1464922},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SjalanderDLE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SjalanderEL04,
author = {Magnus Sj{\"{a}}lander and
Henrik Eriksson and
Per Larsson{-}Edefors},
title = {An Efficient Twin-Precision Multiplier},
booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in
Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San
Jose, CA, USA, Proceedings},
pages = {30--33},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICCD.2004.1347894},
doi = {10.1109/ICCD.2004.1347894},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SjalanderEL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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