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ORCIDBibTeX records: Aviral Shrivastava
@article{DBLP:journals/iotm/ShrivastavaKI24,
author = {Aviral Shrivastava and
Mohammad Khayatian and
Bob Iannucci},
title = {Design Methodology for Robust, Distributed Time-Sensitive Applications},
journal = {{IEEE} Internet Things Mag.},
volume = {7},
number = {1},
pages = {104--110},
year = {2024},
url = {https://doi.org/10.1109/IOTM.001.2300048},
doi = {10.1109/IOTM.001.2300048},
timestamp = {Thu, 25 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iotm/ShrivastavaKI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/WillisSMDCB24,
author = {Benjamin R. Willis and
Aviral Shrivastava and
Joshua Mack and
Shail Dave and
Chaitali Chakrabarti and
John S. Brunhaver},
title = {Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs},
journal = {{IEEE} Trans. Computers},
volume = {73},
number = {1},
pages = {221--234},
year = {2024},
url = {https://doi.org/10.1109/TC.2023.3327504},
doi = {10.1109/TC.2023.3327504},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/WillisSMDCB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/DidehbanSGSL24,
author = {Moslem Didehban and
Hwisoo So and
Prudhvi Gali and
Aviral Shrivastava and
Kyoungwoo Lee},
title = {Generic Soft Error Data and Control Flow Error Detection by Instruction
Duplication},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {21},
number = {1},
pages = {78--92},
year = {2024},
url = {https://doi.org/10.1109/TDSC.2023.3245842},
doi = {10.1109/TDSC.2023.3245842},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tdsc/DidehbanSGSL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tiv/ParkAS24,
author = {Sanggu Park and
Edward Andert and
Aviral Shrivastava},
title = {Blame-Free Motion Planning in Hybrid Traffic},
journal = {{IEEE} Trans. Intell. Veh.},
volume = {9},
number = {1},
pages = {259--268},
year = {2024},
url = {https://doi.org/10.1109/TIV.2023.3264684},
doi = {10.1109/TIV.2023.3264684},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tiv/ParkAS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ShrivastavaH23,
author = {Aviral Shrivastava and
Xiaobo Sharon Hu},
title = {Report on the 2022 Embedded Systems Week {(ESWEEK)}},
journal = {{IEEE} Des. Test},
volume = {40},
number = {1},
pages = {108--111},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2022.3222451},
doi = {10.1109/MDAT.2022.3222451},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/ShrivastavaH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/MehrabianKSDA23,
author = {Mohammadreza Mehrabian and
Mohammad Khayatian and
Aviral Shrivastava and
Patricia Derler and
Hugo A. Andrade},
title = {A run-time verification method with consideration of uncertainties
for cyber-physical systems},
journal = {Microprocess. Microsystems},
volume = {101},
pages = {104890},
year = {2023},
url = {https://doi.org/10.1016/j.micpro.2023.104890},
doi = {10.1016/J.MICPRO.2023.104890},
timestamp = {Thu, 29 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/MehrabianKSDA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ShrivastavaC0023,
author = {Aviral Shrivastava and
Jian{-}Jia Chen and
Akash Kumar and
Anup Das},
title = {{ACM} {TECS} Special Issue on Embedded System Security Tutorials},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {22},
number = {3},
pages = {41:1--41:2},
year = {2023},
url = {https://doi.org/10.1145/3594872},
doi = {10.1145/3594872},
timestamp = {Wed, 12 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ShrivastavaC0023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/SzetoASRLR23,
author = {Matthew Szeto and
Edward Andert and
Aviral Shrivastava and
Martin Reisslein and
Chung{-}Wei Lin and
Christ D. Richmond},
title = {{B-AWARE:} Blockage Aware {RSU} Scheduling for 5G Enabled Autonomous
Vehicles},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {22},
number = {5s},
pages = {154:1--154:23},
year = {2023},
url = {https://doi.org/10.1145/3609133},
doi = {10.1145/3609133},
timestamp = {Fri, 27 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/SzetoASRLR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/DaveNS23,
author = {Shail Dave and
Tony Nowatzki and
Aviral Shrivastava},
editor = {Tor M. Aamodt and
Michael M. Swift and
Natalie D. Enright Jerger},
title = {Explainable-DSE: An Agile and Explainable Exploration of Efficient
{HW/SW} Codesigns of Deep Learning Accelerators Using Bottleneck Analysis},
booktitle = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 4,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
pages = {87--107},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3623278.3624772},
doi = {10.1145/3623278.3624772},
timestamp = {Sat, 10 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/DaveNS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RanjbarKGAJDSLSLWMCBK23,
author = {Behnaz Ranjbar and
Florian Klemme and
Paul R. Genssler and
Hussam Amrouch and
Jinhyo Jung and
Shail Dave and
Hwisoo So and
Kyongwoo Lee and
Aviral Shrivastava and
Ji{-}Yung Lin and
Pieter Weckx and
Subrat Mishra and
Francky Catthoor and
Dwaipayan Biswas and
Akash Kumar},
title = {Learning-Oriented Reliability Improvement of Computing Systems From
Transistor to Application Level},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
pages = {1--10},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/DATE56975.2023.10137182},
doi = {10.23919/DATE56975.2023.10137182},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RanjbarKGAJDSLSLWMCBK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2305-14562,
author = {Yi Hu and
Chaoran Zhang and
Edward Andert and
Harshul Singh and
Aviral Shrivastava and
James Laudon and
Yanqi Zhou and
Bob Iannucci and
Carlee Joe{-}Wong},
title = {GiPH: Generalizable Placement Learning for Adaptive Heterogeneous
Computing},
journal = {CoRR},
volume = {abs/2305.14562},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2305.14562},
doi = {10.48550/ARXIV.2305.14562},
eprinttype = {arXiv},
eprint = {2305.14562},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2305-14562.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2312-01655,
author = {Vinayak Sharma and
Aviral Shrivastava},
title = {Quantum Polar Metric Learning: Efficient Classically Learned Quantum
Embeddings},
journal = {CoRR},
volume = {abs/2312.01655},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2312.01655},
doi = {10.48550/ARXIV.2312.01655},
eprinttype = {arXiv},
eprint = {2312.01655},
timestamp = {Tue, 02 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2312-01655.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/GerstlauerS22,
author = {Andreas Gerstlauer and
Aviral Shrivastava},
title = {Report on the 2021 Embedded Systems Week {(ESWEEK)}},
journal = {{IEEE} Des. Test},
volume = {39},
number = {1},
pages = {94--96},
year = {2022},
url = {https://doi.org/10.1109/MDAT.2021.3124759},
doi = {10.1109/MDAT.2021.3124759},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/GerstlauerS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/JungKSLS22,
author = {Jinhyo Jung and
Yohan Ko and
Hwisoo So and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {Root cause analysis of soft-error-induced failures from hardware and
software perspectives},
journal = {J. Syst. Archit.},
volume = {130},
pages = {102652},
year = {2022},
url = {https://doi.org/10.1016/j.sysarc.2022.102652},
doi = {10.1016/J.SYSARC.2022.102652},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/JungKSLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rts/ChenS22,
author = {Jian{-}Jia Chen and
Aviral Shrivastava},
title = {Special issue on practical and robust design of real-time systems},
journal = {Real Time Syst.},
volume = {58},
number = {3},
pages = {233--234},
year = {2022},
url = {https://doi.org/10.1007/s11241-022-09390-x},
doi = {10.1007/S11241-022-09390-X},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rts/ChenS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SoDKSL22,
author = {Hwisoo So and
Moslem Didehban and
Yohan Ko and
Aviral Shrivastava and
Kyoungwoo Lee},
title = {{EXPERTISE:} An Effective Software-level Redundant Multithreading
Scheme against Hardware Faults},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {19},
number = {4},
pages = {53:1--53:26},
year = {2022},
url = {https://doi.org/10.1145/3546073},
doi = {10.1145/3546073},
timestamp = {Sun, 15 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SoDKSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcps/KhayatianMAGLHM22,
author = {Mohammad Khayatian and
Mohammadreza Mehrabian and
Edward Andert and
Reese Grimsley and
Kyle Liang and
Yi Hu and
Ian McCormack and
Carlee Joe{-}Wong and
Jonathan Aldrich and
Bob Iannucci and
Aviral Shrivastava},
title = {Plan {B:} Design Methodology for Cyber-Physical Systems Robust to
Timing Failures},
journal = {{ACM} Trans. Cyber Phys. Syst.},
volume = {6},
number = {3},
pages = {21:1--21:39},
year = {2022},
url = {https://doi.org/10.1145/3516449},
doi = {10.1145/3516449},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcps/KhayatianMAGLHM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Balasubramanian22,
author = {Mahesh Balasubramanian and
Aviral Shrivastava},
editor = {Cristiana Bolchini and
Ingrid Verbauwhede and
Ioana Vatajelu},
title = {PathSeeker: {A} Fast Mapping Algorithm for CGRAs},
booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
pages = {268--273},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.23919/DATE54114.2022.9774520},
doi = {10.23919/DATE54114.2022.9774520},
timestamp = {Wed, 25 May 2022 22:56:19 +0200},
biburl = {https://dblp.org/rec/conf/date/Balasubramanian22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HuangLLPALS22,
author = {Po{-}Yu Huang and
Kai{-}Wei Liu and
Zong{-}Lun Li and
Sanggu Park and
Edward Andert and
Chung{-}Wei Lin and
Aviral Shrivastava},
editor = {Cristiana Bolchini and
Ingrid Verbauwhede and
Ioana Vatajelu},
title = {Compatibility Checking for Autonomous Lane-Changing Assistance Systems},
booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
pages = {1161--1164},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.23919/DATE54114.2022.9774616},
doi = {10.23919/DATE54114.2022.9774616},
timestamp = {Wed, 25 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/HuangLLPALS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itsc/AndertS22,
author = {Edward Andert and
Aviral Shrivastava},
title = {Accurate Cooperative Sensor Fusion by Parameterized Covariance Generation
for Sensing and Localization Pipelines in CAVs},
booktitle = {25th {IEEE} International Conference on Intelligent Transportation
Systems, {ITSC} 2022, Macau, China, October 8-12, 2022},
pages = {3595--3602},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITSC55140.2022.9922598},
doi = {10.1109/ITSC55140.2022.9922598},
timestamp = {Thu, 10 Nov 2022 21:13:36 +0100},
biburl = {https://dblp.org/rec/conf/itsc/AndertS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DaveMHGSAS22,
author = {Shail Dave and
Alberto Marchisio and
Muhammad Abdullah Hanif and
Amira Guesmi and
Aviral Shrivastava and
Ihsen Alouani and
Muhammad Shafique},
title = {Special Session: Towards an Agile Design Methodology for Efficient,
Reliable, and Secure {ML} Systems},
booktitle = {40th {IEEE} {VLSI} Test Symposium, {VTS} 2022, San Diego, CA, USA,
April 25-27, 2022},
pages = {1--14},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VTS52500.2021.9794253},
doi = {10.1109/VTS52500.2021.9794253},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/DaveMHGSAS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2204-09514,
author = {Shail Dave and
Alberto Marchisio and
Muhammad Abdullah Hanif and
Amira Guesmi and
Aviral Shrivastava and
Ihsen Alouani and
Muhammad Shafique},
title = {Special Session: Towards an Agile Design Methodology for Efficient,
Reliable, and Secure {ML} Systems},
journal = {CoRR},
volume = {abs/2204.09514},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2204.09514},
doi = {10.48550/ARXIV.2204.09514},
eprinttype = {arXiv},
eprint = {2204.09514},
timestamp = {Mon, 25 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2204-09514.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-03306,
author = {Edward Andert and
Aviral Shrivastava},
title = {Accurate Cooperative Sensor Fusion by Parameterized Covariance Generation
for Sensing and Localization Pipelines in CAVs},
journal = {CoRR},
volume = {abs/2209.03306},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.03306},
doi = {10.48550/ARXIV.2209.03306},
eprinttype = {arXiv},
eprint = {2209.03306},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-03306.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/DaveBNASL21,
author = {Shail Dave and
Riyadh Baghdadi and
Tony Nowatzki and
Sasikanth Avancha and
Aviral Shrivastava and
Baoxin Li},
title = {Hardware Acceleration of Sparse and Irregular Tensor Computations
of {ML} Models: {A} Survey and Insights},
journal = {Proc. {IEEE}},
volume = {109},
number = {10},
pages = {1706--1752},
year = {2021},
url = {https://doi.org/10.1109/JPROC.2021.3098483},
doi = {10.1109/JPROC.2021.3098483},
timestamp = {Wed, 03 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/DaveBNASL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/SinghDZBZGSTS21,
author = {Abhishek Singh and
Shail Dave and
Pantea Zardoshti and
Robert Brotzman and
Chao Zhang and
Xiaochen Guo and
Aviral Shrivastava and
Gang Tan and
Michael F. Spear},
title = {{SPX64:} {A} Scratchpad Memory for General-purpose Microprocessors},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {18},
number = {1},
pages = {14:1--14:26},
year = {2021},
url = {https://doi.org/10.1145/3436730},
doi = {10.1145/3436730},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/SinghDZBZGSTS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcps/ShrivastavaD21,
author = {Aviral Shrivastava and
Patricia Derler},
title = {Introduction to the Special Issue on Time for {CPS} {(TCPS)}},
journal = {{ACM} Trans. Cyber Phys. Syst.},
volume = {5},
number = {2},
pages = {12:1--12:2},
year = {2021},
url = {https://doi.org/10.1145/3433948},
doi = {10.1145/3433948},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcps/ShrivastavaD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoDJSL21,
author = {Hwisoo So and
Moslem Didehban and
Jinhyo Jung and
Aviral Shrivastava and
Kyoungwoo Lee},
title = {{CHITIN:} {A} Comprehensive In-thread Instruction Replication Technique
Against Transient Faults},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2021, Grenoble, France, February 1-5, 2021},
pages = {1440--1445},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/DATE51398.2021.9473917},
doi = {10.23919/DATE51398.2021.9473917},
timestamp = {Wed, 21 Jul 2021 10:04:34 +0200},
biburl = {https://dblp.org/rec/conf/date/SoDJSL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KoSJLS21,
author = {Yohan Ko and
Hwisoo So and
Jinhyo Jung and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {Comprehensive Failure Analysis against Soft Errors from Hardware and
Software Perspectives},
booktitle = {39th {IEEE} International Conference on Computer Design, {ICCD} 2021,
Storrs, CT, USA, October 24-27, 2021},
pages = {204--207},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCD53106.2021.00041},
doi = {10.1109/ICCD53106.2021.00041},
timestamp = {Tue, 28 Dec 2021 14:09:48 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KoSJLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccps/KhayatianMALHLS21,
author = {Mohammad Khayatian and
Mohammadreza Mehrabian and
Harshith Allamsetti and
Kai{-}Wei Liu and
Po{-}Yu Huang and
Chung{-}Wei Lin and
Aviral Shrivastava},
editor = {Martina Maggio and
James Weimer and
Mohammad Al Farque and
Meeko Oishi},
title = {Cooperative driving of connected autonomous vehicles using responsibility-sensitive
safety {(RSS)} rules},
booktitle = {{ICCPS} '21: {ACM/IEEE} 12th International Conference on Cyber-Physical
Systems, Nashville, Tennessee, USA, May 19-21, 2021},
pages = {11--20},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3450267.3450530},
doi = {10.1145/3450267.3450530},
timestamp = {Wed, 04 May 2022 13:03:26 +0200},
biburl = {https://dblp.org/rec/conf/iccps/KhayatianMALHLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Balasubramanian20,
author = {Mahesh Balasubramanian and
Aviral Shrivastava},
title = {{CRIMSON:} Compute-Intensive Loop Acceleration by Randomized Iterative
Modulo Scheduling and Optimized Mapping on CGRAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {39},
number = {11},
pages = {3300--3310},
year = {2020},
url = {https://doi.org/10.1109/TCAD.2020.3022015},
doi = {10.1109/TCAD.2020.3022015},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/Balasubramanian20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcps/KhayatianLMS20,
author = {Mohammad Khayatian and
Yingyan Lou and
Mohammadreza Mehrabian and
Aviral Shrivastava},
title = {Crossroads+: {A} Time-aware Approach for Intersection Management of
Connected Autonomous Vehicles},
journal = {{ACM} Trans. Cyber Phys. Syst.},
volume = {4},
number = {2},
pages = {20:1--20:28},
year = {2020},
url = {https://doi.org/10.1145/3364182},
doi = {10.1145/3364182},
timestamp = {Thu, 27 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcps/KhayatianLMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcps/KhayatianMADCLS20,
author = {Mohammad Khayatian and
Mohammadreza Mehrabian and
Edward Andert and
Rachel Dedinsky and
Sarthake Choudhary and
Yingyan Lou and
Aviral Shrivastava},
title = {A Survey on Intersection Management of Connected Autonomous Vehicles},
journal = {{ACM} Trans. Cyber Phys. Syst.},
volume = {4},
number = {4},
pages = {48:1--48:27},
year = {2020},
url = {https://doi.org/10.1145/3407903},
doi = {10.1145/3407903},
timestamp = {Thu, 27 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcps/KhayatianMADCLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcss/VermaSDMSGNC20,
author = {Rohit Verma and
Aviral Shrivastava and
Kingshuk De and
Bivas Mitra and
Sujoy Saha and
Niloy Ganguly and
Subrata Nandi and
Sandip Chakraborty},
title = {A Smartphone-Based Passenger Assistant for Public Bus Commute in Developing
Countries},
journal = {{IEEE} Trans. Comput. Soc. Syst.},
volume = {7},
number = {2},
pages = {465--476},
year = {2020},
url = {https://doi.org/10.1109/TCSS.2019.2961390},
doi = {10.1109/TCSS.2019.2961390},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcss/VermaSDMSGNC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ShrivastavaCZ20,
author = {Aviral Shrivastava and
Jian{-}Jia Chen and
Youtao Zhang},
title = {Introduction to the Special Issue on Languages, Compilers, Tools,
and Theory of Embedded Systems: Part 1},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {19},
number = {5},
pages = {30:1--30:3},
year = {2020},
url = {https://doi.org/10.1145/3417732},
doi = {10.1145/3417732},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/ShrivastavaCZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/ShrivastavaCZ20a,
author = {Aviral Shrivastava and
Jian{-}Jia Chen and
Youtao Zhang},
title = {Introduction to the Special Issue on Languages, Compilers, Tools,
and Theory of Embedded Systems: Part 2},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {19},
number = {6},
pages = {41:1--41:2},
year = {2020},
url = {https://doi.org/10.1145/3417734},
doi = {10.1145/3417734},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/ShrivastavaCZ20a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/DaveSKAL20,
author = {Shail Dave and
Aviral Shrivastava and
Youngbin Kim and
Sasikanth Avancha and
Kyoungwoo Lee},
title = {dMazeRunner: Optimizing Convolutions on Dataflow Accelerators},
booktitle = {2020 {IEEE} International Conference on Acoustics, Speech and Signal
Processing, {ICASSP} 2020, Barcelona, Spain, May 4-8, 2020},
pages = {1544--1548},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICASSP40776.2020.9054275},
doi = {10.1109/ICASSP40776.2020.9054275},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icassp/DaveSKAL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/Balasubramanian20,
author = {Mahesh Balasubramanian and
Trevor D. Ruiz and
Brandon Cook and
Prabhat and
Sharmodeep Bhattacharyya and
Aviral Shrivastava and
Kristofer E. Bouchard},
title = {Scaling of Union of Intersections for Inference of Granger Causal
Networks from Observational Data},
booktitle = {2020 {IEEE} International Parallel and Distributed Processing Symposium
(IPDPS), New Orleans, LA, USA, May 18-22, 2020},
pages = {264--273},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IPDPS47924.2020.00036},
doi = {10.1109/IPDPS47924.2020.00036},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/Balasubramanian20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itsc/KhayatianDCMS20,
author = {Mohammad Khayatian and
Rachel Dedinsky and
Sarthake Choudhary and
Mohammadreza Mehrabian and
Aviral Shrivastava},
title = {R\({}^{\mbox{2}}\) {IM-} Robust and Resilient Intersection Management
of Connected Autonomous Vehicles},
booktitle = {23rd {IEEE} International Conference on Intelligent Transportation
Systems, {ITSC} 2020, Rhodes, Greece, September 20-23, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ITSC45102.2020.9294437},
doi = {10.1109/ITSC45102.2020.9294437},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itsc/KhayatianDCMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2007-00864,
author = {Shail Dave and
Riyadh Baghdadi and
Tony Nowatzki and
Sasikanth Avancha and
Aviral Shrivastava and
Baoxin Li},
title = {Hardware Acceleration of Sparse and Irregular Tensor Computations
of {ML} Models: {A} Survey and Insights},
journal = {CoRR},
volume = {abs/2007.00864},
year = {2020},
url = {https://arxiv.org/abs/2007.00864},
eprinttype = {arXiv},
eprint = {2007.00864},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2007-00864.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/RhisheekesanJS19,
author = {Abhishek Rhisheekesan and
Reiley Jeyapaul and
Aviral Shrivastava},
title = {Control Flow Checking or Not? (for Soft Errors)},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {1},
pages = {11:1--11:25},
year = {2019},
url = {https://doi.org/10.1145/3301311},
doi = {10.1145/3301311},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/RhisheekesanJS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/DaveKALS19,
author = {Shail Dave and
Youngbin Kim and
Sasikanth Avancha and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {dMazeRunner: Executing Perfectly Nested Loops on Dataflow Accelerators},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {18},
number = {5s},
pages = {70:1--70:27},
year = {2019},
url = {https://doi.org/10.1145/3358198},
doi = {10.1145/3358198},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/DaveKALS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShrivastavaD19,
author = {Aviral Shrivastava and
Moslem Didehban},
title = {Software Approaches for In-time Resilience},
booktitle = {Proceedings of the 56th Annual Design Automation Conference 2019,
{DAC} 2019, Las Vegas, NV, USA, June 02-06, 2019},
pages = {197},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316781.3323487},
doi = {10.1145/3316781.3323487},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ShrivastavaD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DedinskyKMS19,
author = {Rachel Dedinsky and
Mohammad Khayatian and
Mohammadreza Mehrabian and
Aviral Shrivastava},
editor = {Selma Saidi and
Rolf Ernst and
Dirk Ziegenbein},
title = {A Dependable Detection Mechanism for Intersection Management of Connected
Autonomous Vehicles (Interactive Presentation)},
booktitle = {Workshop on Autonomous Systems Design, {ASD} 2019, March 29, 2019,
Florence, Italy},
series = {OASIcs},
volume = {68},
pages = {7:1--7:13},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik},
year = {2019},
url = {https://doi.org/10.4230/OASIcs.ASD.2019.7},
doi = {10.4230/OASICS.ASD.2019.7},
timestamp = {Tue, 15 Feb 2022 09:40:05 +0100},
biburl = {https://dblp.org/rec/conf/date/DedinskyKMS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoDSL19,
author = {Hwisoo So and
Moslem Didehban and
Aviral Shrivastava and
Kyoungwoo Lee},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {A software-level Redundant MultiThreading for Soft/Hard Error Detection
and Recovery},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1559--1562},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715089},
doi = {10.23919/DATE.2019.8715089},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SoDSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KimLS19,
author = {Youngbin Kim and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {Static Function Prefetching for Efficient Code Management on Scratchpad
Memory},
booktitle = {37th {IEEE} International Conference on Computer Design, {ICCD} 2019,
Abu Dhabi, United Arab Emirates, November 17-20, 2019},
pages = {350--358},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICCD46524.2019.00056},
doi = {10.1109/ICCD46524.2019.00056},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KimLS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memocode/HekmatnejadYDAS19,
author = {Mohammad Hekmatnejad and
Shakiba Yaghoubi and
Adel Dokhanchi and
Heni Ben Amor and
Aviral Shrivastava and
Lina J. Karam and
Georgios Fainekos},
editor = {Partha S. Roop and
Naijun Zhan and
Sicun Gao and
Pierluigi Nuzzo},
title = {Encoding and monitoring responsibility sensitive safety rules for
automated vehicles in signal temporal logic},
booktitle = {Proceedings of the 17th {ACM-IEEE} International Conference on Formal
Methods and Models for System Design, {MEMOCODE} 2019, La Jolla, CA,
USA, October 9-11, 2019},
pages = {6:1--6:11},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3359986.3361203},
doi = {10.1145/3359986.3361203},
timestamp = {Sat, 20 May 2023 11:52:14 +0200},
biburl = {https://dblp.org/rec/conf/memocode/HekmatnejadYDAS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LinLCS19,
author = {Jinn{-}Pean Lin and
Jing Lu and
Jian Cai and
Aviral Shrivastava},
title = {Efficient Heap Data Management on Software Managed Manycore Architectures},
booktitle = {32nd International Conference on {VLSI} Design and 18th International
Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
5-9, 2019},
pages = {269--274},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSID.2019.00065},
doi = {10.1109/VLSID.2019.00065},
timestamp = {Mon, 14 Nov 2022 15:28:06 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LinLCS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KimKS19,
author = {Yooseong Kim and
Mohammad Khayatian and
Aviral Shrivastava},
title = {WCET-Aware Stack Frame Management of Embedded Systems Using Scratchpad
Memories},
booktitle = {32nd International Conference on {VLSI} Design and 18th International
Conference on Embedded Systems, {VLSID} 2019, Delhi, India, January
5-9, 2019},
pages = {543--544},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VLSID.2019.00127},
doi = {10.1109/VLSID.2019.00127},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KimKS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/lctrts/2019,
editor = {Jian{-}Jia Chen and
Aviral Shrivastava},
title = {Proceedings of the 20th {ACM} {SIGPLAN/SIGBED} International Conference
on Languages, Compilers, and Tools for Embedded Systems, {LCTES} 2019,
Phoenix, AZ, USA, June 23-23, 2019},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3316482},
doi = {10.1145/3316482},
isbn = {978-1-4503-6724-0},
timestamp = {Tue, 11 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lctrts/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1906-03982,
author = {Bob Iannucci and
Aviral Shrivastava and
Mohammad Khayatian},
title = {TickTalk - Timing {API} for Dynamically Federated Cyber-Physical Systems},
journal = {CoRR},
volume = {abs/1906.03982},
year = {2019},
url = {http://arxiv.org/abs/1906.03982},
eprinttype = {arXiv},
eprint = {1906.03982},
timestamp = {Fri, 14 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1906-03982.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmscs/ShrivastavaK18,
author = {Aviral Shrivastava and
Fadi J. Kurdahi},
title = {Guest Editorial: Special Issue on Accelerated Computing},
journal = {{IEEE} Trans. Multi Scale Comput. Syst.},
volume = {4},
number = {1},
pages = {1--2},
year = {2018},
url = {https://doi.org/10.1109/TMSCS.2018.2807058},
doi = {10.1109/TMSCS.2018.2807058},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tmscs/ShrivastavaK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/DidehbanS18,
author = {Moslem Didehban and
Aviral Shrivastava},
title = {A Compiler Technique for Processor-Wide Protection From Soft Errors
in Multithreaded Environments},
journal = {{IEEE} Trans. Reliab.},
volume = {67},
number = {1},
pages = {249--263},
year = {2018},
url = {https://doi.org/10.1109/TR.2018.2793098},
doi = {10.1109/TR.2018.2793098},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/DidehbanS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DaveBS18,
author = {Shail Dave and
Mahesh Balasubramanian and
Aviral Shrivastava},
title = {{RAMP:} resource-aware mapping for CGRAs},
booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
2018, San Francisco, CA, USA, June 24-29, 2018},
pages = {127:1--127:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3195970.3196101},
doi = {10.1145/3195970.3196101},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DaveBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MehrabianKMSLDG18,
author = {Mohammadreza Mehrabian and
Mohammad Khayatian and
Ahmed Mousa and
Aviral Shrivastava and
Ya{-}Shian Li{-}Baboud and
Patricia Derler and
Edward R. Griffor and
Hugo A. Andrade and
Marc Weiss and
John C. Eidson and
Dhananjay M. Anand},
title = {An efficient timestamp-based monitoring approach to test timing constraints
of cyber-physical systems},
booktitle = {Proceedings of the 55th Annual Design Automation Conference, {DAC}
2018, San Francisco, CA, USA, June 24-29, 2018},
pages = {144:1--144:6},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3195970.3196130},
doi = {10.1145/3195970.3196130},
timestamp = {Thu, 20 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MehrabianKMSLDG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SoDKSL18,
author = {Hwisoo So and
Moslem Didehban and
Yohan Ko and
Aviral Shrivastava and
Kyoungwoo Lee},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {{EXPERT:} Effective and flexible error protection by redundant multithreading},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {533--538},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342065},
doi = {10.23919/DATE.2018.8342065},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/SoDKSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Balasubramanian18,
author = {Mahesh Balasubramanian and
Shail Dave and
Aviral Shrivastava and
Reiley Jeyapaul},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {{LASER:} {A} hardware/software approach to accelerate complicated
loops on CGRAs},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1069--1074},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342170},
doi = {10.23919/DATE.2018.8342170},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Balasubramanian18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DaveBS18,
author = {Shail Dave and
Mahesh Balasubramanian and
Aviral Shrivastava},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {{URECA:} Unified register file for CGRAs},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1081--1086},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342172},
doi = {10.23919/DATE.2018.8342172},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/DaveBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtss/KhayatianMS18,
author = {Mohammad Khayatian and
Mohammadreza Mehrabian and
Aviral Shrivastava},
title = {{RIM:} Robust Intersection Management for Connected Autonomous Vehicles},
booktitle = {2018 {IEEE} Real-Time Systems Symposium, {RTSS} 2018, Nashville, TN,
USA, December 11-14, 2018},
pages = {35--44},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/RTSS.2018.00014},
doi = {10.1109/RTSS.2018.00014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtss/KhayatianMS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/codes/2018,
editor = {Aviral Shrivastava and
Sudeep Pasricha},
title = {Proceedings of the International Conference on Hardware/Software Codesign
and System Synthesis, {CODES+ISSS} 2018, part of {ESWEEK} 2018, Torino,
Italy, September 30 - October 5, 2018},
publisher = {{IEEE} / {ACM}},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8509501/proceeding},
isbn = {978-1-5386-5562-7},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1808-06992,
author = {Mahesh Balasubramanian and
Trevor D. Ruiz and
Brandon Cook and
Sharmodeep Bhattacharyya and
Prabhat and
Aviral Shrivastava and
Kristofer E. Bouchard},
title = {Optimizing the Union of Intersections {LASSO} (UoI\({}_{\mbox{LASSO}}\))
and Vector Autoregressive (UoI\({}_{\mbox{VAR}}\)) Algorithms for
Improved Statistical Estimation at Scale},
journal = {CoRR},
volume = {abs/1808.06992},
year = {2018},
url = {http://arxiv.org/abs/1808.06992},
eprinttype = {arXiv},
eprint = {1808.06992},
timestamp = {Fri, 03 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1808-06992.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KoJKLS17,
author = {Yohan Ko and
Reiley Jeyapaul and
Youngbin Kim and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {Protecting Caches from Soft Errors: {A} Microarchitect's Perspective},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {4},
pages = {93:1--93:28},
year = {2017},
url = {https://doi.org/10.1145/3063180},
doi = {10.1145/3063180},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KoJKLS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimBS17,
author = {Yooseong Kim and
David Broman and
Aviral Shrivastava},
title = {WCET-Aware Function-Level Dynamic Code Management on Scratchpad Memory},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {4},
pages = {112:1--112:26},
year = {2017},
url = {https://doi.org/10.1145/3063383},
doi = {10.1145/3063383},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KimBS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MehrabianKSEDAL17,
author = {Mohammadreza Mehrabian and
Mohammad Khayatian and
Aviral Shrivastava and
John C. Eidson and
Patricia Derler and
Hugo A. Andrade and
Ya{-}Shian Li{-}Baboud and
Edward R. Griffor and
Marc Weiss and
Kevin B. Stanton},
title = {Timestamp Temporal Logic {(TTL)} for Testing the Timing of Cyber-Physical
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {169:1--169:20},
year = {2017},
url = {https://doi.org/10.1145/3126510},
doi = {10.1145/3126510},
timestamp = {Thu, 20 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/MehrabianKSEDAL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JeyapaulFAS17,
author = {Reiley Jeyapaul and
Roberto Flores and
Alfonso {\'{A}}vila and
Aviral Shrivastava},
title = {Systematic Methodology for the Quantitative Analysis of Pipeline-Register
Reliability},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {2},
pages = {547--555},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2016.2574642},
doi = {10.1109/TVLSI.2016.2574642},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/JeyapaulFAS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DidehbanLS17,
author = {Moslem Didehban and
Sai Ram Dheeraj Lokam and
Aviral Shrivastava},
title = {InCheck: An In-application Recovery Scheme for Soft Errors},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {40:1--40:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062265},
doi = {10.1145/3061639.3062265},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DidehbanLS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AndertKS17,
author = {Edward Andert and
Mohammad Khayatian and
Aviral Shrivastava},
title = {Crossroads: Time-Sensitive Autonomous Intersection Management Technique},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {50:1--50:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062221},
doi = {10.1145/3061639.3062221},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AndertKS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShrivastavaMKDA17,
author = {Aviral Shrivastava and
Mohammadreza Mehrabian and
Mohammad Khayatian and
Patricia Derler and
Hugo A. Andrade and
Kevin B. Stanton and
Ya{-}Shian Li{-}Baboud and
Edward R. Griffor and
Marc Weiss and
John C. Eidson},
title = {A Testbed to Verify the Timing Behavior of Cyber-Physical Systems:
Invited},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {69:1--69:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3072955},
doi = {10.1145/3061639.3072955},
timestamp = {Thu, 20 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ShrivastavaMKDA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/CaiKKSL17,
author = {Jian Cai and
Yooseong Kim and
Youngbin Kim and
Aviral Shrivastava and
Kyoungwoo Lee},
editor = {David Atienza and
Giorgio Di Natale},
title = {Reducing code management overhead in software-managed multicores},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1241--1244},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927179},
doi = {10.23919/DATE.2017.7927179},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/CaiKKSL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DidehbanSL17,
author = {Moslem Didehban and
Aviral Shrivastava and
Sai Ram Dheeraj Lokam},
editor = {Sri Parameswaran},
title = {{NEMESIS:} {A} software approach for computing in presence of soft
errors},
booktitle = {2017 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2017, Irvine, CA, USA, November 13-16, 2017},
pages = {297--304},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ICCAD.2017.8203792},
doi = {10.1109/ICCAD.2017.8203792},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/DidehbanSL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/hwswco/HaTHGMDESGB17,
author = {Soonhoi Ha and
J{\"{u}}rgen Teich and
Christian Haubelt and
Michael Gla{\ss} and
Tulika Mitra and
Rainer D{\"{o}}mer and
Petru Eles and
Aviral Shrivastava and
Andreas Gerstlauer and
Shuvra S. Bhattacharyya},
editor = {Soonhoi Ha and
J{\"{u}}rgen Teich},
title = {Introduction to Hardware/Software Codesign},
booktitle = {Handbook of Hardware/Software Codesign},
pages = {3--26},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-94-017-7267-9\_41},
doi = {10.1007/978-94-017-7267-9\_41},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/hwswco/HaTHGMDESGB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/hwswco/ShrivastavaC17,
author = {Aviral Shrivastava and
Jian Cai},
editor = {Soonhoi Ha and
J{\"{u}}rgen Teich},
title = {Hardware-Aware Compilation},
booktitle = {Handbook of Hardware/Software Codesign},
pages = {795--827},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-94-017-7267-9\_26},
doi = {10.1007/978-94-017-7267-9\_26},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/hwswco/ShrivastavaC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/ShrivastavaDCSD16,
author = {Aviral Shrivastava and
Nikil D. Dutt and
Jian Cai and
Majid Shoushtari and
Bryan Donyanavard and
Hossein Tajik},
title = {Automatic management of Software Programmable Memories in Many-core
Architectures},
journal = {{IET} Comput. Digit. Tech.},
volume = {10},
number = {6},
pages = {288--298},
year = {2016},
url = {https://doi.org/10.1049/iet-cdt.2016.0024},
doi = {10.1049/IET-CDT.2016.0024},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cdt/ShrivastavaDCSD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CaiS16,
author = {Jian Cai and
Aviral Shrivastava},
title = {Efficient pointer management of stack data for software managed multicores},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760774},
doi = {10.1109/ASAP.2016.7760774},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CaiS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TanikellaKJLS16,
author = {Karthik Tanikella and
Yohan Ko and
Reiley Jeyapaul and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {gemV: {A} validated toolset for the early exploration of system reliability},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {159--163},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760786},
doi = {10.1109/ASAP.2016.7760786},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TanikellaKJLS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ShrivastavaDLSK16,
author = {Aviral Shrivastava and
Patricia Derler and
Ya{-}Shian Li{-}Baboud and
Kevin B. Stanton and
Mohammad Khayatian and
Hugo A. Andrade and
Marc Weiss and
John C. Eidson and
Sundeep Chandhoke},
title = {Time in cyber-physical systems},
booktitle = {Proceedings of the Eleventh {IEEE/ACM/IFIP} International Conference
on Hardware/Software Codesign and System Synthesis, {CODES} 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016},
pages = {4:1--4:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968456.2974012},
doi = {10.1145/2968456.2974012},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/ShrivastavaDLSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DidehbanS16,
author = {Moslem Didehban and
Aviral Shrivastava},
title = {nZDC: a compiler technique for near zero silent data corruption},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {48:1--48:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2898054},
doi = {10.1145/2897937.2898054},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/DidehbanS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gis/VermaGSGMC16,
author = {Rohit Verma and
Surjya Ghosh and
Aviral Shrivastava and
Niloy Ganguly and
Bivas Mitra and
Sandip Chakraborty},
editor = {Siva Ravada and
Mohammed Eunus Ali and
Shawn D. Newsam and
Matthias Renz and
Goce Trajcevski},
title = {Unsupervised annotated city traffic map generation},
booktitle = {Proceedings of the 24th {ACM} {SIGSPATIAL} International Conference
on Advances in Geographic Information Systems, {GIS} 2016, Burlingame,
California, USA, October 31 - November 3, 2016},
pages = {59:1--59:4},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2996913.2996942},
doi = {10.1145/2996913.2996942},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/gis/VermaGSGMC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KimCKLS16,
author = {Youngbin Kim and
Jian Cai and
Yooseong Kim and
Kyoungwoo Lee and
Aviral Shrivastava},
editor = {Frank Liu},
title = {Splitting functions in code management on scratchpad memories},
booktitle = {Proceedings of the 35th International Conference on Computer-Aided
Design, {ICCAD} 2016, Austin, TX, USA, November 7-10, 2016},
pages = {60},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2966986.2967075},
doi = {10.1145/2966986.2967075},
timestamp = {Fri, 23 Jun 2023 22:29:48 +0200},
biburl = {https://dblp.org/rec/conf/iccad/KimCKLS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/infocom/VermaSMSGNC16,
author = {Rohit Verma and
Aviral Shrivastava and
Bivas Mitra and
Sujoy Saha and
Niloy Ganguly and
Subrata Nandi and
Sandip Chakraborty},
title = {UrbanEye: An outdoor localization system for public transport},
booktitle = {35th Annual {IEEE} International Conference on Computer Communications,
{INFOCOM} 2016, San Francisco, CA, USA, April 10-14, 2016},
pages = {1--9},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/INFOCOM.2016.7524393},
doi = {10.1109/INFOCOM.2016.7524393},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/infocom/VermaSMSGNC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/GuoSST16,
author = {Xiaochen Guo and
Aviral Shrivastava and
Michael F. Spear and
Gang Tan},
editor = {Bruce L. Jacob},
title = {Languages Must Expose Memory Heterogeneity},
booktitle = {Proceedings of the Second International Symposium on Memory Systems,
{MEMSYS} 2016, Alexandria, VA, USA, October 3-6, 2016},
pages = {251--256},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2989081.2989122},
doi = {10.1145/2989081.2989122},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/GuoSST16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mobisys/VermaSCM16,
author = {Rohit Verma and
Aviral Shrivastava and
Sandip Chakraborty and
Bivas Mitra},
editor = {Nicholas D. Lane and
Xia Zhou and
Fahim Kawsar},
title = {Margdarshak: {A} Mobile Data Analytics based Commute Time Estimator
cum Route Recommender},
booktitle = {Proceedings of the 3rd International on Workshop on Physical Analytics,
WPA@MobiSys 2015, Singapore, June 26, 2016},
pages = {31--36},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2935651.2935655},
doi = {10.1145/2935651.2935655},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mobisys/VermaSCM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/CaiS16,
author = {Jian Cai and
Aviral Shrivastava},
title = {Software Coherence Management on Non-coherent Cache Multi-cores},
booktitle = {29th International Conference on {VLSI} Design and 15th International
Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
4-8, 2016},
pages = {397--402},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VLSID.2016.70},
doi = {10.1109/VLSID.2016.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/CaiS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PagerJS15,
author = {Jared Pager and
Reiley Jeyapaul and
Aviral Shrivastava},
title = {A Software Scheme for Multithreading on CGRAs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {14},
number = {1},
pages = {19:1--19:26},
year = {2015},
url = {https://doi.org/10.1145/2638558},
doi = {10.1145/2638558},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/PagerJS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LuBS15,
author = {Jing Lu and
Ke Bai and
Aviral Shrivastava},
title = {Efficient Code Assignment Techniques for Local Memory on Software
Managed Multicores},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {14},
number = {4},
pages = {71:1--71:24},
year = {2015},
url = {https://doi.org/10.1145/2738039},
doi = {10.1145/2738039},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LuBS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/DillSO15,
author = {Russ Dill and
Aviral Shrivastava and
Hyunok Oh},
editor = {Ravi Iyer and
Siddharth Garg},
title = {Optimization of multi-channel {BCH} error decoding for common cases},
booktitle = {2015 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2015, Amsterdam, The Netherlands, October
4-9, 2015},
pages = {59--68},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/CASES.2015.7324546},
doi = {10.1109/CASES.2015.7324546},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/DillSO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KoJKLS15,
author = {Yohan Ko and
Reiley Jeyapaul and
Youngbin Kim and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {Guidelines to design parity protected write-back {L1} data cache},
booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco,
CA, USA, June 7-11, 2015},
pages = {24:1--24:6},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2744769.2744846},
doi = {10.1145/2744769.2744846},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KoJKLS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RajendranRadhika15,
author = {ShriHari RajendranRadhika and
Aviral Shrivastava and
Mahdi Hamzeh},
editor = {Wolfgang Nebel and
David Atienza},
title = {Path selection based acceleration of conditionals in CGRAs},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {121--126},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755780},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RajendranRadhika15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RawatS15,
author = {Tushar Rawat and
Aviral Shrivastava},
editor = {Wolfgang Nebel and
David Atienza},
title = {Enabling multi-threaded applications on hybrid shared memory manycore
architectures},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {742--747},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755922},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RawatS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/AndradeDELSSW15,
author = {Hugo A. Andrade and
Patricia Derler and
John C. Eidson and
Ya{-}Shian Li{-}Baboud and
Aviral Shrivastava and
Kevin B. Stanton and
Marc Weiss},
editor = {Michael H{\"{u}}bner and
Maya B. Gokhale and
Ren{\'{e}} Cumplido},
title = {Towards a reconfigurable distributed testbed to enable advanced research
and development of timing and synchronization in cyber-physical systems},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig
2015, Riviera Maya, Mexico, December 7-9, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ReConFig.2015.7393352},
doi = {10.1109/RECONFIG.2015.7393352},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/reconfig/AndradeDELSSW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/KimBLZSO15,
author = {Hokeun Kim and
David Broman and
Edward A. Lee and
Michael Zimmer and
Aviral Shrivastava and
Junkwang Oh},
title = {A predictable and command-level priority-based {DRAM} controller for
mixed-criticality systems},
booktitle = {21st {IEEE} Real-Time and Embedded Technology and Applications Symposium,
Seattle, WA, USA, April 13-16, 2015},
pages = {317--326},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/RTAS.2015.7108455},
doi = {10.1109/RTAS.2015.7108455},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/KimBLZSO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/JeyapaulHRSL14,
author = {Reiley Jeyapaul and
Fei Hong and
Abhishek Rhisheekesan and
Aviral Shrivastava and
Kyoungwoo Lee},
title = {UnSync-CMP: Multicore {CMP} Architecture for Energy-Efficient Soft-Error
Reliability},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {25},
number = {1},
pages = {254--263},
year = {2014},
url = {https://doi.org/10.1109/TPDS.2013.14},
doi = {10.1109/TPDS.2013.14},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tpds/JeyapaulHRSL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/HoltonBSR14,
author = {Bryce Holton and
Ke Bai and
Aviral Shrivastava and
Harini Ramaprasad},
editor = {Karam S. Chatha and
Rolf Ernst and
Anand Raghunathan and
Ravishankar R. Iyer},
title = {Construction of {GCCFG} for inter-procedural optimizations in Software
Managed Manycore {(SMM)} architectures},
booktitle = {2014 International Conference on Compilers, Architecture and Synthesis
for Embedded Systems, {CASES} 2014, Uttar Pradesh, India, October
12-17, 2014},
pages = {18:1--18:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2656106.2656122},
doi = {10.1145/2656106.2656122},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/HoltonBSR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ShrivastavaRJW14,
author = {Aviral Shrivastava and
Abhishek Rhisheekesan and
Reiley Jeyapaul and
Carole{-}Jean Wu},
title = {Quantitative Analysis of Control Flow Checking Mechanisms for Soft
Errors},
booktitle = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
Francisco, CA, USA, June 1-5, 2014},
pages = {13:1--13:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2593069.2593195},
doi = {10.1145/2593069.2593195},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ShrivastavaRJW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HamzehSV14,
author = {Mahdi Hamzeh and
Aviral Shrivastava and
Sarma B. K. Vrudhula},
title = {Branch-Aware Loop Mapping on CGRAs},
booktitle = {The 51st Annual Design Automation Conference 2014, {DAC} '14, San
Francisco, CA, USA, June 1-5, 2014},
pages = {107:1--107:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2593069.2593100},
doi = {10.1145/2593069.2593100},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HamzehSV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rtas/KimBCS14,
author = {Yooseong Kim and
David Broman and
Jian Cai and
Aviral Shrivastava},
title = {WCET-aware dynamic code management on scratchpads for Software-Managed
Multicores},
booktitle = {20th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
{RTAS} 2014, Berlin, Germany, April 15-17, 2014},
pages = {179--188},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/RTAS.2014.6926001},
doi = {10.1109/RTAS.2014.6926001},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rtas/KimBCS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/BaiS13,
author = {Ke Bai and
Aviral Shrivastava},
title = {A software-only scheme for managing heap data on limited local memory(LLM)
multicore processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {13},
number = {1},
pages = {5:1--5:18},
year = {2013},
url = {https://doi.org/10.1145/2501626.2501632},
doi = {10.1145/2501626.2501632},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/BaiS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeeS13,
author = {Jongeun Lee and
Aviral Shrivastava},
title = {Software-based register file vulnerability reduction for embedded
processors},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {13},
number = {1s},
pages = {38:1--38:20},
year = {2013},
url = {https://doi.org/10.1145/2536747.2536760},
doi = {10.1145/2536747.2536760},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/LeeS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/KimS13,
author = {Yooseong Kim and
Aviral Shrivastava},
title = {Memory performance estimation of {CUDA} programs},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {13},
number = {2},
pages = {21:1--21:22},
year = {2013},
url = {https://doi.org/10.1145/2514641.2514648},
doi = {10.1145/2514641.2514648},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/KimS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JeyapaulS13,
author = {Reiley Jeyapaul and
Aviral Shrivastava},
title = {Enabling energy efficient reliability in embedded systems through
smart cache cleaning},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {18},
number = {4},
pages = {53:1--53:25},
year = {2013},
url = {https://doi.org/10.1145/2505012},
doi = {10.1145/2505012},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JeyapaulS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BaiLSH13,
author = {Ke Bai and
Jing Lu and
Aviral Shrivastava and
Bryce Holton},
title = {{CMSM:} An efficient and effective Code Management for Software Managed
Multicores},
booktitle = {Proceedings of the International Conference on Hardware/Software Codesign
and System Synthesis, {CODES+ISSS} 2013, Montreal, QC, Canada, September
29 - October 4, 2013},
pages = {11:1--11:9},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CODES-ISSS.2013.6658998},
doi = {10.1109/CODES-ISSS.2013.6658998},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/BaiLSH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HamzehSV13,
author = {Mahdi Hamzeh and
Aviral Shrivastava and
Sarma B. K. Vrudhula},
title = {REGIMap: register-aware application mapping on coarse-grained reconfigurable
architectures (CGRAs)},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {18:1--18:10},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488756},
doi = {10.1145/2463209.2488756},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HamzehSV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LuBS13,
author = {Jing Lu and
Ke Bai and
Aviral Shrivastava},
title = {{SSDM:} smart stack data management for software managed multicores
(SMMs)},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {149:1--149:8},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488918},
doi = {10.1145/2463209.2488918},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/LuBS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BaiS13,
author = {Ke Bai and
Aviral Shrivastava},
editor = {Enrico Macii},
title = {Automatic and efficient heap data management for limited local memory
multicore architectures},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {593--598},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.130},
doi = {10.7873/DATE.2013.130},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BaiS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/LeeS12,
author = {Jongeun Lee and
Aviral Shrivastava},
title = {{PICA:} Processor Idle Cycle Aggregation for Energy-Efficient Embedded
Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {11},
number = {2},
pages = {26:1--26:27},
year = {2012},
url = {https://doi.org/10.1145/2220336.2220338},
doi = {10.1145/2220336.2220338},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tecs/LeeS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HongSL12,
author = {Fei Hong and
Aviral Shrivastava and
Jongeun Lee},
title = {Return Data Interleaving for Multi-Channel Embedded CMPs Systems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {7},
pages = {1351--1354},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2157368},
doi = {10.1109/TVLSI.2011.2157368},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HongSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/LeeSJ12,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Reiley Jeyapaul},
editor = {Ahmed Jerraya and
Luca P. Carloni and
Naehyuck Chang and
Franco Fummi},
title = {Soft errors: the hardware-software interface},
booktitle = {Proceedings of the 10th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2012, part of ESWeek '12
Eighth Embedded Systems Week, Tampere, Finland, October 7-12, 2012},
pages = {577--578},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2380445.2380534},
doi = {10.1145/2380445.2380534},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/LeeSJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HamzehSV12,
author = {Mahdi Hamzeh and
Aviral Shrivastava and
Sarma B. K. Vrudhula},
editor = {Patrick Groeneveld and
Donatella Sciuto and
Soha Hassoun},
title = {EPIMap: using epimorphism to map applications on CGRAs},
booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San
Francisco, CA, USA, June 3-7, 2012},
pages = {1284--1291},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2228360.2228600},
doi = {10.1145/2228360.2228600},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HamzehSV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PatronikBBPS12,
author = {Piotr Patronik and
Krzysztof S. Berezowski and
Janusz Biernat and
Stanislaw J. Piestrak and
Aviral Shrivastava},
editor = {Erik Brunvard and
Ken Stevens and
Joseph R. Cavallaro and
Tong Zhang},
title = {Design of an {RNS} reverse converter for a new five-moduli special
set},
booktitle = {Great Lakes Symposium on {VLSI} 2012, GLSVLSI'12, Salt Lake City,
UT, USA, May 3-4, 2012},
pages = {67--70},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2206781.2206799},
doi = {10.1145/2206781.2206799},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PatronikBBPS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeS11,
author = {Jongeun Lee and
Aviral Shrivastava},
title = {Static Analysis of Register File Vulnerability},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {4},
pages = {607--616},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2010.2095630},
doi = {10.1109/TCAD.2010.2095630},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/LeeS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimLSYCP11,
author = {Yongjoo Kim and
Jongeun Lee and
Aviral Shrivastava and
Jonghee W. Yoon and
Doosan Cho and
Yunheung Paek},
title = {High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {11},
pages = {1599--1609},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2011.2161217},
doi = {10.1109/TCAD.2011.2161217},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KimLSYCP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/KimLSP11,
author = {Yongjoo Kim and
Jongeun Lee and
Aviral Shrivastava and
Yunheung Paek},
title = {Memory access optimization in compilation for coarse-grained reconfigurable
architectures},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {16},
number = {4},
pages = {42:1--42:27},
year = {2011},
url = {https://doi.org/10.1145/2003695.2003702},
doi = {10.1145/2003695.2003702},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/KimLSP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BaiSK11,
author = {Ke Bai and
Aviral Shrivastava and
Saleel Kudchadker},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Stack data management for Limited Local Memory {(LLM)} multi-core
processors},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {231--234},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043275},
doi = {10.1109/ASAP.2011.6043275},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BaiSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/JeyapaulS11,
author = {Reiley Jeyapaul and
Aviral Shrivastava},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Smart cache cleaning: energy efficient vulnerability reduction in
embedded processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {105--114},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038716},
doi = {10.1145/2038698.2038716},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/JeyapaulS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/BaiLS11,
author = {Ke Bai and
Di Lu and
Aviral Shrivastava},
editor = {Rajesh K. Gupta and
Vincent John Mooney},
title = {Vector class on limited local memory {(LLM)} multi-core processors},
booktitle = {Proceedings of the 14th International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2011, part of the Seventh
Embedded Systems Week, ESWeek 2011, Taipei, Taiwan, October 9-14,
2011},
pages = {215--224},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2038698.2038731},
doi = {10.1145/2038698.2038731},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/BaiLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/LuKSH11,
author = {Jing Lu and
Yooseong Kim and
Aviral Shrivastava and
Chuan Huang},
editor = {Robert P. Dick and
Jan Madsen},
title = {Branch penalty reduction on {IBM} cell SPUs via software branch hinting},
booktitle = {Proceedings of the 9th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11
Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011},
pages = {355--364},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2039370.2039425},
doi = {10.1145/2039370.2039425},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/LuKSH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KimS11,
author = {Yooseong Kim and
Aviral Shrivastava},
editor = {Leon Stok and
Nikil D. Dutt and
Soha Hassoun},
title = {CuMAPz: a tool to analyze memory access patterns in {CUDA}},
booktitle = {Proceedings of the 48th Design Automation Conference, {DAC} 2011,
San Diego, California, USA, June 5-10, 2011},
pages = {128--133},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2024724.2024754},
doi = {10.1145/2024724.2024754},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KimS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/ShrivastavaPJHV11,
author = {Aviral Shrivastava and
Jared Pager and
Reiley Jeyapaul and
Mahdi Hamzeh and
Sarma B. K. Vrudhula},
editor = {Guang R. Gao and
Yu{-}Chee Tseng},
title = {Enabling Multithreading on CGRAs},
booktitle = {International Conference on Parallel Processing, {ICPP} 2011, Taipei,
Taiwan, September 13-16, 2011},
pages = {255--264},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICPP.2011.77},
doi = {10.1109/ICPP.2011.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/ShrivastavaPJHV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/JeyapaulHRSL11,
author = {Reiley Jeyapaul and
Fei Hong and
Abhishek Rhisheekesan and
Aviral Shrivastava and
Kyoungwoo Lee},
editor = {Guang R. Gao and
Yu{-}Chee Tseng},
title = {UnSync: {A} Soft Error Resilient Redundant Multicore Architecture},
booktitle = {International Conference on Parallel Processing, {ICPP} 2011, Taipei,
Taiwan, September 13-16, 2011},
pages = {632--641},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICPP.2011.76},
doi = {10.1109/ICPP.2011.76},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/JeyapaulHRSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/PatronikBPBS11,
author = {Piotr Patronik and
Krzysztof S. Berezowski and
Stanislaw J. Piestrak and
Janusz Biernat and
Aviral Shrivastava},
editor = {Naehyuck Chang and
Hiroshi Nakamura and
Koji Inoue and
Kenichi Osada and
Massimo Poncino},
title = {Fast and energy-efficient constant-coefficient {FIR} filters using
residue number system},
booktitle = {Proceedings of the 2011 International Symposium on Low Power Electronics
and Design, 2011, Fukuoka, Japan, August 1-3, 2011},
pages = {385--390},
publisher = {{IEEE/ACM}},
year = {2011},
url = {http://portal.acm.org/citation.cfm?id=2016893\&\#38;CFID=34981777\&\#38;CFTOKEN=25607807},
timestamp = {Mon, 13 Aug 2012 09:40:34 +0200},
biburl = {https://dblp.org/rec/conf/islped/PatronikBPBS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainSC11,
author = {Aarul Jain and
Aviral Shrivastava and
Chaitali Chakrabarti},
title = {{LA-LRU:} {A} Latency-Aware Replacement Policy for Variation Tolerant
Caches},
booktitle = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design,
{IIT} Madras, Chennai, India, 2-7 January 2011},
pages = {298--303},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VLSID.2011.24},
doi = {10.1109/VLSID.2011.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainSC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/JeyapaulS10,
author = {Reiley Jeyapaul and
Aviral Shrivastava},
title = {Code Transformations for {TLB} Power Reduction},
journal = {Int. J. Parallel Program.},
volume = {38},
number = {3-4},
pages = {254--276},
year = {2010},
url = {https://doi.org/10.1007/s10766-009-0123-8},
doi = {10.1007/S10766-009-0123-8},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ijpp/JeyapaulS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LeeS10,
author = {Jongeun Lee and
Aviral Shrivastava},
title = {A Compiler-Microarchitecture Hybrid Approach to Soft Error Reduction
for Register Files},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {7},
pages = {1018--1027},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2049050},
doi = {10.1109/TCAD.2010.2049050},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LeeS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LeeSDV10,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Nikil D. Dutt and
Nalini Venkatasubramanian},
title = {Partitioning techniques for partially protected caches in resource-constrained
embedded systems},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {15},
number = {4},
pages = {30:1--30:30},
year = {2010},
url = {https://doi.org/10.1145/1835420.1835423},
doi = {10.1145/1835420.1835423},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LeeSDV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ShrivastavaKBV10,
author = {Aviral Shrivastava and
Deepa Kannan and
Sarvesh Bhardwaj and
Sarma B. K. Vrudhula},
title = {Reducing Functional Unit Power Consumption and its Variation Using
Leakage Sensors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {6},
pages = {988--997},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2019082},
doi = {10.1109/TVLSI.2009.2019082},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ShrivastavaKBV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JungSB10,
author = {Seung Chul Jung and
Aviral Shrivastava and
Ke Bai},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Dynamic code mapping for limited local memory systems},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {13--20},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540773},
doi = {10.1109/ASAP.2010.5540773},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/JungSB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/AaRMSSH10,
author = {Tom Vander Aa and
Praveen Raghavan and
Scott A. Mahlke and
Bjorn De Sutter and
Aviral Shrivastava and
Frank Hannig},
editor = {Tony Givargis and
Adam Donlin},
title = {Compilation techniques for CGRAs: exploring all parallelization approaches},
booktitle = {Proceedings of the 8th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10
Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010},
pages = {185--186},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878961.1878995},
doi = {10.1145/1878961.1878995},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/AaRMSSH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BaiS10,
author = {Ke Bai and
Aviral Shrivastava},
editor = {Tony Givargis and
Adam Donlin},
title = {Heap data management for limited local memory {(LLM)} multi-core processors},
booktitle = {Proceedings of the 8th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10
Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010},
pages = {317--326},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878961.1879015},
doi = {10.1145/1878961.1879015},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/BaiS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BoydSS10,
author = {Jeffrey Boyd and
Hari Sundaram and
Aviral Shrivastava},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Power-accuracy tradeoffs in human activity transition detection},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {1524--1529},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457053},
doi = {10.1109/DATE.2010.5457053},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BoydSS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/KimLSYP10,
author = {Yongjoo Kim and
Jongeun Lee and
Aviral Shrivastava and
Jonghee W. Yoon and
Yunheung Paek},
editor = {Yale N. Patt and
Pierfrancesco Foglia and
Evelyn Duesterwald and
Paolo Faraboschi and
Xavier Martorell},
title = {Memory-Aware Application Mapping on Coarse-Grained Reconfigurable
Arrays},
booktitle = {High Performance Embedded Architectures and Compilers, 5th International
Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5952},
pages = {171--185},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11515-8\_14},
doi = {10.1007/978-3-642-11515-8\_14},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/KimLSYP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/KimLSP10,
author = {Yongjoo Kim and
Jongeun Lee and
Aviral Shrivastava and
Yunheung Paek},
editor = {Jaejin Lee and
Bruce R. Childers},
title = {Operation and data mapping for CGRAs with multi-bank memory},
booktitle = {Proceedings of the {ACM} {SIGPLAN/SIGBED} 2010 conference on Languages,
compilers, and tools for embedded systems, {LCTES} 2010, Stockholm,
Sweden, April 13-15, 2010},
pages = {17--26},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1755888.1755892},
doi = {10.1145/1755888.1755892},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lctrts/KimLSP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/ShrivastavaLJ10,
author = {Aviral Shrivastava and
Jongeun Lee and
Reiley Jeyapaul},
editor = {Jaejin Lee and
Bruce R. Childers},
title = {Cache vulnerability equations for protecting data in embedded processor
caches from soft errors},
booktitle = {Proceedings of the {ACM} {SIGPLAN/SIGBED} 2010 conference on Languages,
compilers, and tools for embedded systems, {LCTES} 2010, Stockholm,
Sweden, April 13-15, 2010},
pages = {143--152},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1755888.1755910},
doi = {10.1145/1755888.1755910},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lctrts/ShrivastavaLJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/scopes/JeyapaulS10,
author = {Reiley Jeyapaul and
Aviral Shrivastava},
editor = {Ed F. Deprettere and
Todor P. Stefanov},
title = {{B2P2:} bounds based procedure placement for instruction {TLB} power
reduction in embedded systems},
booktitle = {13th International Workshop on Software and Compilers for Embedded
Systems, {SCOPES} '10, St. Goar, Germany, June 29-30, 2010},
pages = {2},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1811212.1811215},
doi = {10.1145/1811212.1811215},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/scopes/JeyapaulS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShrivastavaIDPP09,
author = {Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt and
Sanghyun Park and
Yunheung Paek},
title = {Compiler-in-the-Loop Design Space Exploration Framework for Energy
Reduction in Horizontally Partitioned Cache Architectures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {3},
pages = {461--465},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2013275},
doi = {10.1109/TCAD.2009.2013275},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ShrivastavaIDPP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShrivastavaKL09,
author = {Aviral Shrivastava and
Arun Kannan and
Jongeun Lee},
title = {A Software-Only Solution to Use Scratch Pads for Stack Data},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {28},
number = {11},
pages = {1719--1727},
year = {2009},
url = {https://doi.org/10.1109/TCAD.2009.2030592},
doi = {10.1109/TCAD.2009.2030592},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ShrivastavaKL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LeeSIDV09,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt and
Nalini Venkatasubramanian},
title = {Partially Protected Caches to Reduce Failures Due to Soft Errors in
Multimedia Applications},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {9},
pages = {1343--1347},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2002427},
doi = {10.1109/TVLSI.2008.2002427},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LeeSIDV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/YoonSPAP09,
author = {Jonghee W. Yoon and
Aviral Shrivastava and
Sanghyun Park and
Minwook Ahn and
Yunheung Paek},
title = {A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained
Reconfigurable Architectures},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {11},
pages = {1565--1578},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2001746},
doi = {10.1109/TVLSI.2008.2001746},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/YoonSPAP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KannanSPL09,
author = {Arun Kannan and
Aviral Shrivastava and
Amit Pabalkar and
Jongeun Lee},
editor = {Kazutoshi Wakabayashi},
title = {A software solution for dynamic stack management on scratch pad memory},
booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
pages = {612--617},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ASPDAC.2009.4796548},
doi = {10.1109/ASPDAC.2009.4796548},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KannanSPL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeS09,
author = {Jongeun Lee and
Aviral Shrivastava},
editor = {Kazutoshi Wakabayashi},
title = {Compiler-managed register file protection for energy-efficient soft
error reduction},
booktitle = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
pages = {618--623},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ASPDAC.2009.4796549},
doi = {10.1109/ASPDAC.2009.4796549},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LeeS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ChokshiBSP09,
author = {Rooju Chokshi and
Krzysztof S. Berezowski and
Aviral Shrivastava and
Stanislaw J. Piestrak},
editor = {J{\"{o}}rg Henkel and
Sri Parameswaran},
title = {Exploiting residue number system for power-efficient digital signal
processing in embedded processors},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2009, Grenoble, France,
October 11-16, 2009},
pages = {19--28},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1629395.1629401},
doi = {10.1145/1629395.1629401},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ChokshiBSP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MylavarapuCSLG09,
author = {Sai Krishna Mylavarapu and
Siddharth Choudhuri and
Aviral Shrivastava and
Jongeun Lee and
Tony Givargis},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {{FSAF:} File system aware flash translation layer for {NAND} Flash
Memories},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {399--404},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090696},
doi = {10.1109/DATE.2009.5090696},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MylavarapuCSLG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeeS09,
author = {Jongeun Lee and
Aviral Shrivastava},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Static analysis to mitigate soft errors in register files},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {1367--1372},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090877},
doi = {10.1109/DATE.2009.5090877},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/LeeS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/LeeS09,
author = {Jongeun Lee and
Aviral Shrivastava},
editor = {Christoph M. Kirsch and
Mahmut T. Kandemir},
title = {A compiler optimization to reduce soft errors in register files},
booktitle = {Proceedings of the 2009 {ACM} {SIGPLAN/SIGBED} conference on Languages,
compilers, and tools for embedded systems, {LCTES} 2009, Dublin, Ireland,
June 19-20, 2009},
pages = {41--49},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1542452.1542459},
doi = {10.1145/1542452.1542459},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lctrts/LeeS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JeyapaulMS09,
author = {Reiley Jeyapaul and
Sandeep Marathe and
Aviral Shrivastava},
title = {Code Transformations for {TLB} Power Reduction},
booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
The 22nd International Conference on {VLSI} Design, New Delhi, India,
5-9 January 2009},
pages = {413--418},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VLSI.Design.2009.39},
doi = {10.1109/VLSI.DESIGN.2009.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JeyapaulMS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkSDDNPE08,
author = {Sanghyun Park and
Aviral Shrivastava and
Nikil D. Dutt and
Alexandru Nicolau and
Yunheung Paek and
Eugene Earlie},
title = {Register File Power Reduction Using Bypass Sensitive Compiler},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {27},
number = {6},
pages = {1155--1159},
year = {2008},
url = {https://doi.org/10.1109/TCAD.2008.923254},
doi = {10.1109/TCAD.2008.923254},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkSDDNPE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ShrivastavaID08,
author = {Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {A Compiler-in-the-Loop framework to explore Horizontally Partitioned
Cache architectures},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {328--333},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4483968},
doi = {10.1109/ASPDAC.2008.4483968},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ShrivastavaID08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YoonSPAJP08,
author = {Jonghee W. Yoon and
Aviral Shrivastava and
Sanghyun Park and
Minwook Ahn and
Reiley Jeyapaul and
Yunheung Paek},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {{SPKM} : {A} novel graph drawing based algorithm for application mapping
onto coarse-grained reconfigurable architectures},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {776--782},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4484056},
doi = {10.1109/ASPDAC.2008.4484056},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YoonSPAJP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/LeeS08,
author = {Jongeun Lee and
Aviral Shrivastava},
editor = {Catherine H. Gebotys and
Grant Martin},
title = {Static analysis of processor stall cycle aggregation},
booktitle = {Proceedings of the 6th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2008, Atlanta, GA, USA,
October 19-24, 2008},
pages = {25--30},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1450135.1450143},
doi = {10.1145/1450135.1450143},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/LeeS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ParkSP08,
author = {Sanghyun Park and
Aviral Shrivastava and
Yunheung Paek},
editor = {Donatella Sciuto},
title = {Hiding Cache Miss Penalty Using Priority-based Execution for Embedded
Processors},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {1190--1195},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484840},
doi = {10.1109/DATE.2008.4484840},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ParkSP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/PabalkarSKL08,
author = {Amit Pabalkar and
Aviral Shrivastava and
Arun Kannan and
Jongeun Lee},
editor = {P. Sadayappan and
Manish Parashar and
Ramamurthy Badrinath and
Viktor K. Prasanna},
title = {{SDRM:} Simultaneous Determination of Regions and Function-to-Region
Mapping for Scratchpad Memories},
booktitle = {High Performance Computing - HiPC 2008, 15th International Conference,
Bangalore, India, December 17-20, 2008. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5374},
pages = {569--582},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-89894-8\_49},
doi = {10.1007/978-3-540-89894-8\_49},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/PabalkarSKL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-3/LeeSDV08,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Nikil D. Dutt and
Nalini Venkatasubramanian},
editor = {Bernd Kleinjohann and
Lisa Kleinjohann and
Wayne H. Wolf},
title = {Data Partitioning Techniques for Partially Protected Caches to Reduce
Soft Error Induced Failures},
booktitle = {Distributed Embedded Systems: Design, Middleware and Resources, {IFIP}
20th World Computer Congress, {TC10} Working Conference on Distributed
and Parallel Embedded Systems {(DIPES} 2008), September 7-10, 2008,
Milano, Italy},
series = {{IFIP}},
volume = {271},
pages = {213--225},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-0-387-09661-2\_21},
doi = {10.1007/978-0-387-09661-2\_21},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-3/LeeSDV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mm/LeeSKDV08,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Minyoung Kim and
Nikil D. Dutt and
Nalini Venkatasubramanian},
editor = {Abdulmotaleb El{-}Saddik and
Son Vuong and
Carsten Griwodz and
Alberto Del Bimbo and
K. Sel{\c{c}}uk Candan and
Alejandro Jaimes},
title = {Mitigating the impact of hardware defects on multimedia applications:
a cross-layer approach},
booktitle = {Proceedings of the 16th International Conference on Multimedia 2008,
Vancouver, British Columbia, Canada, October 26-31, 2008},
pages = {319--328},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1459359.1459402},
doi = {10.1145/1459359.1459402},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mm/LeeSKDV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KannanGSDK08,
author = {Deepa Kannan and
Aseem Gupta and
Aviral Shrivastava and
Nikil D. Dutt and
Fadi J. Kurdahi},
title = {{PTSMT:} {A} Tool for Cross-Level Power, Performance, and Thermal
Exploration of {SMT} Processors},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {421--427},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.84},
doi = {10.1109/VLSI.2008.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KannanGSDK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KannanSMBV08,
author = {Deepa Kannan and
Aviral Shrivastava and
Vipin Mohan and
Sarvesh Bhardwaj and
Sarma B. K. Vrudhula},
title = {Temperature and Process Variations Aware Power Gating of Functional
Units},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {515--520},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.83},
doi = {10.1109/VLSI.2008.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KannanSMBV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KannanSBV08,
author = {Deepa Kannan and
Aviral Shrivastava and
Sarvesh Bhardwaj and
Sarma B. K. Vrudhula},
title = {Power Reduction of Functional Units Considering Temperature and Process
Variations},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {533--539},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.81},
doi = {10.1109/VLSI.2008.81},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KannanSBV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShrivastavaPEDNP07,
author = {Aviral Shrivastava and
Sanghyun Park and
Eugene Earlie and
Nikil D. Dutt and
Alexandru Nicolau and
Yunheung Paek},
title = {Automatic Design Space Exploration of Register Bypasses in Embedded
Processors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {26},
number = {12},
pages = {2102--2115},
year = {2007},
url = {https://doi.org/10.1109/TCAD.2007.907066},
doi = {10.1109/TCAD.2007.907066},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ShrivastavaPEDNP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/BakerSC07,
author = {Michael A. Baker and
Aviral Shrivastava and
Karam S. Chatha},
editor = {Soonhoi Ha and
Kiyoung Choi and
Nikil D. Dutt and
J{\"{u}}rgen Teich},
title = {Smart driver for power reduction in next generation bistable electrophoretic
display technology},
booktitle = {Proceedings of the 5th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2007, Salzburg, Austria,
September 30 - October 3, 2007},
pages = {197--202},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1289816.1289865},
doi = {10.1145/1289816.1289865},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/BakerSC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZhuSD07,
author = {Qiang Zhu and
Aviral Shrivastava and
Nikil D. Dutt},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Interactive presentation: Functional and timing validation of partially
bypassed processor pipelines},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {1164--1169},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://dl.acm.org/citation.cfm?id=1266617},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ZhuSD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icc/MisraXS07,
author = {Satyajayant Misra and
Guoliang Xue and
Aviral Shrivastava},
title = {Robust Localization in Wireless Sensor Networks through the Revocation
of Malicious Anchors},
booktitle = {Proceedings of {IEEE} International Conference on Communications,
{ICC} 2007, Glasgow, Scotland, UK, 24-28 June 2007},
pages = {3057--3062},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICC.2007.508},
doi = {10.1109/ICC.2007.508},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icc/MisraXS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/crc/CRCcompiler2007/ShrivastavaD07,
author = {Aviral Shrivastava and
Nikil D. Dutt},
editor = {Y. N. Srikant and
Priti Shankar},
title = {Compiler Aided Design of Embedded Computers},
booktitle = {The Compiler Design Handbook: Optimizations and Machine Code Generation,
Second Edition},
pages = {3},
publisher = {{CRC} Press},
year = {2007},
timestamp = {Sun, 04 Aug 2019 17:44:34 +0200},
biburl = {https://dblp.org/rec/books/crc/CRCcompiler2007/ShrivastavaD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ShrivastavaBHDN06,
author = {Aviral Shrivastava and
Partha Biswas and
Ashok Halambi and
Nikil D. Dutt and
Alexandru Nicolau},
title = {Compilation framework for code size reduction using reduced bit-width
ISAs (rISAs)},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {11},
number = {1},
pages = {123--146},
year = {2006},
url = {https://doi.org/10.1145/1124713.1124722},
doi = {10.1145/1124713.1124722},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ShrivastavaBHDN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/MishraSD06,
author = {Prabhat Mishra and
Aviral Shrivastava and
Nikil D. Dutt},
title = {Architecture description language (ADL)-driven software toolkit generation
for architectural exploration of programmable SOCs},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {11},
number = {3},
pages = {626--658},
year = {2006},
url = {https://doi.org/10.1145/1142980.1142985},
doi = {10.1145/1142980.1142985},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/MishraSD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ShrivastavaEDN06,
author = {Aviral Shrivastava and
Eugene Earlie and
Nikil D. Dutt and
Alexandru Nicolau},
title = {Retargetable pipeline hazard detection for partially bypassed processors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {8},
pages = {791--801},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.878468},
doi = {10.1109/TVLSI.2006.878468},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ShrivastavaEDN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/LeeSIDV06,
author = {Kyoungwoo Lee and
Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt and
Nalini Venkatasubramanian},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Mitigating soft error failures for multimedia applications by selective
data protection},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {411--420},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176810},
doi = {10.1145/1176760.1176810},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/LeeSIDV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ParkESNDP06,
author = {Sanghyun Park and
Eugene Earlie and
Aviral Shrivastava and
Alex Nicolau and
Nikil D. Dutt and
Yunheung Paek},
editor = {Georges G. E. Gielen},
title = {Automatic generation of operation tables for fast exploration of bypasses
in embedded processors},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {1197--1202},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244047},
doi = {10.1109/DATE.2006.244047},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ParkESNDP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lctrts/ParkSDNPE06,
author = {Sanghyun Park and
Aviral Shrivastava and
Nikil D. Dutt and
Alexandru Nicolau and
Yunheung Paek and
Eugene Earlie},
editor = {Mary Jane Irwin and
Koen De Bosschere},
title = {Bypass aware instruction scheduling for register file power reduction},
booktitle = {Proceedings of the 2006 {ACM} {SIGPLAN/SIGBED} Conference on Languages,
Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario,
Canada, June 14-16, 2006},
pages = {173--181},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1134650.1134675},
doi = {10.1145/1134650.1134675},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lctrts/ParkSDNPE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShrivastavaID05,
author = {Aviral Shrivastava and
Ilya Issenin and
Nikil D. Dutt},
editor = {Thomas M. Conte and
Paolo Faraboschi and
William H. Mangione{-}Smith and
Walid A. Najjar},
title = {Compilation techniques for energy reduction in horizontally partitioned
cache architectures},
booktitle = {Proceedings of the 2005 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2005, San Francisco, California,
USA, September 24-27, 2005},
pages = {90--96},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1086297.1086310},
doi = {10.1145/1086297.1086310},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cases/ShrivastavaID05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ShrivastavaEDN05,
author = {Aviral Shrivastava and
Eugene Earlie and
Nikil D. Dutt and
Alexandru Nicolau},
editor = {Petru Eles and
Axel Jantsch and
Reinaldo A. Bergamaschi},
title = {Aggregating processor free time for energy reduction},
booktitle = {Proceedings of the 3rd {IEEE/ACM/IFIP} International Conference on
Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2005,
Jersey City, NJ, USA, September 19-21, 2005},
pages = {154--159},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1084834.1084876},
doi = {10.1145/1084834.1084876},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/ShrivastavaEDN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ShrivastavaDNE05,
author = {Aviral Shrivastava and
Nikil D. Dutt and
Alexandru Nicolau and
Eugene Earlie},
title = {PBExplore: {A} Framework for Compiler-in-the-Loop Exploration of Partial
Bypassing in Embedded Processors},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1264--1269},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.236},
doi = {10.1109/DATE.2005.236},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ShrivastavaDNE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ShrivastavaD04,
author = {Aviral Shrivastava and
Nikil D. Dutt},
editor = {Masaharu Imai},
title = {Energy efficient code generation exploiting reduced bit-width instruction
set architectures (rISA)},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {475--477},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.94},
doi = {10.1109/ASPDAC.2004.94},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ShrivastavaD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ShrivastavaEDN04,
author = {Aviral Shrivastava and
Eugene Earlie and
Nikil D. Dutt and
Alexandru Nicolau},
editor = {Alex Orailoglu and
Pai H. Chou and
Petru Eles and
Axel Jantsch},
title = {Operation tables for scheduling in the presence of incomplete bypassing},
booktitle = {Proceedings of the 2nd {IEEE/ACM/IFIP} International Conference on
Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2004,
Stockholm, Sweden, September 8-10, 2004},
pages = {194--199},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1016720.1016768},
doi = {10.1145/1016720.1016768},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/ShrivastavaEDN04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HalambiSBDN02,
author = {Ashok Halambi and
Aviral Shrivastava and
Partha Biswas and
Nikil D. Dutt and
Alexandru Nicolau},
title = {An Efficient Compiler Technique for Code Size Reduction Using Reduced
Bit-Width ISAs},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {402--408},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998305},
doi = {10.1109/DATE.2002.998305},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HalambiSBDN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/NicolauDSBH02,
author = {Alexandru Nicolau and
Nikil D. Dutt and
Aviral Shrivastava and
Partha Biswas and
Ashok Halambi},
editor = {El Mostapha Aboulhamid and
Yukihiro Nakamura},
title = {A Design Space Exploration Framework for Reduced Bit-Width Instruction
Set Architecture (rISA) Design},
booktitle = {Proceedings of the 15th International Symposium on System Synthesis
{(ISSS} 2002), October 2-4, 2002, Kyoto, Japan},
pages = {120--125},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227163},
doi = {10.1109/ISSS.2002.1227163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/NicolauDSBH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShrivastavaKKKB00,
author = {Aviral Shrivastava and
Mohit Kumar and
Sanjiv Kapoor and
Shashi Kumar and
M. Balakrishnan},
title = {Optimal Hardware/Software Partitioning for Concurrent Specification
Using Dynamic Programming},
booktitle = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
4-7 January 2000, Calcutta, India},
pages = {110--113},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICVD.2000.812593},
doi = {10.1109/ICVD.2000.812593},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShrivastavaKKKB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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