BibTeX records: Ruei-Pin Shen

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@article{DBLP:journals/jssc/KoKSC20,
  author    = {Chen{-}Ting Ko and
               Ting{-}Kuei Kuan and
               Ruei{-}Pin Shen and
               Chih{-}Hsien Chang},
  title     = {A 7-nm FinFET {CMOS} {PLL} With 388-fs Jitter and -80-dBc Reference
               Spur Featuring a Track-and-Hold Charge Pump and Automatic Loop Gain
               Control},
  journal   = {J. Solid-State Circuits},
  volume    = {55},
  number    = {4},
  pages     = {1043--1050},
  year      = {2020},
  url       = {https://doi.org/10.1109/JSSC.2019.2959735},
  doi       = {10.1109/JSSC.2019.2959735},
  timestamp = {Thu, 02 Apr 2020 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/jssc/KoKSC20.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KoKSCH019,
  author    = {Chen{-}Ting Ko and
               Ting{-}Kuei Kuan and
               Ruei{-}Pin Shen and
               Chih{-}Hsien Chang and
               Kenny Hsieh and
               Mark Chen},
  title     = {A 387.6fs Integrated Jitter and -80dBc Reference Spurs Ring based
               {PLL} with Track- and-Hold Charge Pump and Automatic Loop Gain Control
               in 7nm FinFET {CMOS}},
  booktitle = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages     = {164},
  publisher = {{IEEE}},
  year      = {2019},
  url       = {https://doi.org/10.23919/VLSIC.2019.8777946},
  doi       = {10.23919/VLSIC.2019.8777946},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsic/KoKSCH019.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KuanWSCHC18,
  author    = {Ting{-}Kuei Kuan and
               Chin{-}Yang Wu and
               Ruei{-}Pin Shen and
               Chih{-}Hsien Chang and
               Kenny Hsieh and
               Mark Chen},
  title     = {A Digital Bang-Bang Phase-Locked Loop with Background Injection Timing
               Calibration and Automatic Loop Gain Control in 7NM FinFET {CMOS}},
  booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
               18-22, 2018},
  pages     = {179--180},
  publisher = {{IEEE}},
  year      = {2018},
  url       = {https://doi.org/10.1109/VLSIC.2018.8502365},
  doi       = {10.1109/VLSIC.2018.8502365},
  timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl    = {https://dblp.org/rec/conf/vlsic/KuanWSCHC18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/WuSCHC17,
  author    = {Chin{-}Yang Wu and
               Ruei{-}Pin Shen and
               Chih{-}Hsien Chang and
               Kenny Hsieh and
               Mark Chen},
  title     = {A 0.031mm\({}^{\mbox{2}}\), 910fs, 0.5-4GHz injection type {SOC} {PLL}
               with 90dB built-in supply noise rejection in 10nm FinFET {CMOS}},
  booktitle = {2017 {IEEE} Custom Integrated Circuits Conference, {CICC} 2017, Austin,
               TX, USA, April 30 - May 3, 2017},
  pages     = {1--4},
  publisher = {{IEEE}},
  year      = {2017},
  url       = {https://doi.org/10.1109/CICC.2017.7993676},
  doi       = {10.1109/CICC.2017.7993676},
  timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl    = {https://dblp.org/rec/conf/cicc/WuSCHC17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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