BibTeX records: Fatemeh Serajeh-hassani

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@article{DBLP:journals/tjs/RikiS23,
  author       = {Samira Riki and
                  Fatemeh Serajeh{-}hassani},
  title        = {Designing a one-bit coplanar {QCA} {ALU} using a novel robust area-efficient
                  three-input majority gate design},
  journal      = {J. Supercomput.},
  volume       = {79},
  number       = {16},
  pages        = {17897--17918},
  year         = {2023},
  url          = {https://doi.org/10.1007/s11227-023-05280-6},
  doi          = {10.1007/S11227-023-05280-6},
  timestamp    = {Wed, 27 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tjs/RikiS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/Serajeh-hassani19,
  author       = {Fatemeh Serajeh{-}hassani and
                  Mohammad Sadrosadati and
                  Sebastian Pointner and
                  Robert Wille and
                  Hamid Sarbazi{-}Azad},
  title        = {Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted
                  Switch Boxes},
  booktitle    = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
                  Miami, FL, USA, July 15-17, 2019},
  pages        = {615--620},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISVLSI.2019.00115},
  doi          = {10.1109/ISVLSI.2019.00115},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/isvlsi/Serajeh-hassani19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}