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ORCIDBibTeX records: Christopher Schaef
@inproceedings{DBLP:conf/isscc/JainXKMCSSDPCDD24,
author = {Rinkle Jain and
Shunjiang Xu and
Rajiv Kaushal and
Carlos Mariscal and
Humberto Caballero and
Tamir Salus and
Christopher Schaef and
Anup Deka and
Aruna Payala and
Keng Chen and
Huong Do and
Jonathan Douglas},
title = {28.6 An 87{\%} Efficient 2V-Input, 200A Voltage Regulator Chiplet
Enabling Vertical Power Delivery in Multi-kW Systems-on-Package},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
San Francisco, CA, USA, February 18-22, 2024},
pages = {466--468},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454349},
doi = {10.1109/ISSCC49657.2024.10454349},
timestamp = {Tue, 19 Mar 2024 09:04:31 +0100},
biburl = {https://dblp.org/rec/conf/isscc/JainXKMCSSDPCDD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DesaiTYKLBWSRRT22,
author = {Nachiket V. Desai and
Han Wui Then and
Jingshu Yu and
Harish K. Krishnamurthy and
William J. Lambert and
Nicolas Butzen and
Sheldon Weng and
Christopher Schaef and
Kaladhar Radhakrishnan and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A 32-A, 5-V-Input, 94.2{\%} Peak Efficiency High-Frequency Power Converter
Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors},
journal = {{IEEE} J. Solid State Circuits},
volume = {57},
number = {4},
pages = {1090--1099},
year = {2022},
url = {https://doi.org/10.1109/JSSC.2022.3141779},
doi = {10.1109/JSSC.2022.3141779},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/DesaiTYKLBWSRRT22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchaefSRKMRD22,
author = {Christopher Schaef and
Tamir Salus and
Rachid Rayess and
Siddarth Kulasekaran and
Mat Manusharow and
Kaladhar Radhakrishnan and
Jonathan Douglas},
title = {A IMax {\(\vert\)}\({}_{\mbox{max\({}^{\mbox{,}}\)}}\) Fully Integrated
Multi-Phase Voltage Regulator with 91.5{\%} Peak Efficiency at 1.8
to 1V, Operating at 50MHz and Featuring a Digitally Assisted Controller
with Automatic Phase Shedding and Soft Switching in 4nm Class FinFET
{CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {1--3},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731658},
doi = {10.1109/ISSCC42614.2022.9731658},
timestamp = {Mon, 21 Mar 2022 13:32:47 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SchaefSRKMRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/DesaiKKSWCLRTD22,
author = {Nachiket V. Desai and
Harish K. Krishnamurthy and
Suhwan Kim and
Christopher Schaef and
Sheldon Weng and
Beomseok Choi and
William J. Lambert and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {Fully Integrated Voltage Regulators with Package-Embedded Inductors
for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm {CMOS}
Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled
ON-Time Discontinuous Conduction Mode {(DCM)} Operation},
booktitle = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
pages = {192--193},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830385},
doi = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830385},
timestamp = {Thu, 04 Aug 2022 10:53:40 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/DesaiKKSWCLRTD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LiuKNWASRTD21,
author = {Xiaosen Liu and
Harish K. Krishnamurthy and
Taesik Na and
Sheldon Weng and
Khondker Z. Ahmed and
Christopher Schaef and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A Universal Modular Hybrid {LDO} With Fast Load Transient Response
and Programmable {PSRR} in 14-nm {CMOS} Featuring Dynamic Clamp Strength
Tuning},
journal = {{IEEE} J. Solid State Circuits},
volume = {56},
number = {8},
pages = {2402--2415},
year = {2021},
url = {https://doi.org/10.1109/JSSC.2021.3055742},
doi = {10.1109/JSSC.2021.3055742},
timestamp = {Thu, 16 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LiuKNWASRTD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/DesaiKLYTBWSNRR21,
author = {Nachiket V. Desai and
Harish K. Krishnamurthy and
William J. Lambert and
Jingshu Yu and
Han Wui Then and
Nicolas Butzen and
Sheldon Weng and
Christopher Schaef and
N. Nidhi and
Marko Radosavljevic and
Johann Rode and
Justin Sandford and
Kaladhar Radhakrishnan and
Krishnan Ravichandran and
Bernhard Sell and
James W. Tschanz and
Vivek De},
title = {A 32A 5V-Input, 94.2{\%} Peak Efficiency High-Frequency Power Converter
Module Featuring Package-Integrated Low-Voltage GaN {NMOS} Power Transistors},
booktitle = {2021 Symposium on {VLSI} Circuits, Kyoto, Japan, June 13-19, 2021},
pages = {1--2},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.23919/VLSICircuits52068.2021.9492350},
doi = {10.23919/VLSICIRCUITS52068.2021.9492350},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsic/DesaiKLYTBWSNRR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/AhmedKWLSDRTD20,
author = {Zakir Zakir Ahmed and
Harish K. Krishnamurthy and
Sheldon Weng and
Xiaosen Liu and
Christopher Schaef and
Nachiket V. Desai and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {An Autonomous Reconfigurable Power Delivery Network {(RPDN)} for Many-Core
SoCs Featuring Dynamic Current Steering},
booktitle = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
HI, USA, June 16-19, 2020},
pages = {1--2},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162827},
doi = {10.1109/VLSICIRCUITS18222.2020.9162827},
timestamp = {Mon, 24 Aug 2020 16:22:01 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/AhmedKWLSDRTD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SchaefRRTDDKLAK19,
author = {Christopher Schaef and
Kaladhar Radhakrishnan and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De and
Nachiket V. Desai and
Harish K. Krishnamurthy and
Xiaosen Liu and
Khondker Zakir Ahmed and
Suhwan Kim and
Sheldon Weng and
Huong Do and
William J. Lambert},
title = {A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm
{CMOS} With 2.5-nH Package-Embedded Air-Core Inductors},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {12},
pages = {3316--3325},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2019.2946218},
doi = {10.1109/JSSC.2019.2946218},
timestamp = {Sun, 05 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/SchaefRRTDDKLAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchaefWCLRRTD19,
author = {Christopher Schaef and
Sheldon Weng and
Beomseok Choi and
William J. Lambert and
Kaladhar Radhakrishnan and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A 93.8{\%} Peak Efficiency, 5V-Input, 10A Max {ILOAD} Flying Capacitor
Multilevel Converter in 22nm {CMOS} Featuring Wide Output Voltage
Range and Flying Capacitor Precharging},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
San Francisco, CA, USA, February 17-21, 2019},
pages = {146--148},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISSCC.2019.8662475},
doi = {10.1109/ISSCC.2019.8662475},
timestamp = {Sun, 05 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SchaefWCLRRTD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchaefDKWDLRRTD19,
author = {Christopher Schaef and
Nachiket V. Desai and
Harish Krishnamurthy and
Sheldon Weng and
Huong Do and
William J. Lambert and
Kaladhar Radhakrishnan and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A Fully Integrated Voltage Regulator in 14nm {CMOS} with Package-Embedded
Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable
On-Time Discontinuous Conduction Mode Operation},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
San Francisco, CA, USA, February 17-21, 2019},
pages = {154--156},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISSCC.2019.8662294},
doi = {10.1109/ISSCC.2019.8662294},
timestamp = {Sun, 05 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SchaefDKWDLRRTD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/RaoTSMAHO18,
author = {Arun Rao and
Yueh{-}Ching Teng and
Chris Schaef and
Ethan K. Murphy and
Saaid H. Arshad and
Ryan J. Halter and
Kofi Odame},
title = {An Analog Front End {ASIC} for Cardiac Electrical Impedance Tomography},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {12},
number = {4},
pages = {729--738},
year = {2018},
url = {https://doi.org/10.1109/TBCAS.2018.2834412},
doi = {10.1109/TBCAS.2018.2834412},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/RaoTSMAHO18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/KimVSLKWLKKRTD18,
author = {Suhwan Kim and
Vaibhav A. Vaidya and
Christopher Schaef and
Andrew Lines and
Harish Krishnamurthy and
Sheldon Weng and
Xiaosen Liu and
Dileep Kurian and
Tanay Karnik and
Krishnan Ravichandran and
James W. Tschanz and
Vivek De},
title = {A Single-Stage, Single-Inductor, 6-Input 9-Output Multi-Modal Energy
Harvesting Power Management {IC} for 100{\(\mathrm{\mu}\)}W-120MW
Battery-Powered IoT Edge Nodes},
booktitle = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
18-22, 2018},
pages = {195--196},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/VLSIC.2018.8502301},
doi = {10.1109/VLSIC.2018.8502301},
timestamp = {Wed, 01 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/KimVSLKWLKKRTD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SchaefDS17,
author = {Christopher Schaef and
Eric Din and
Jason T. Stauth},
title = {A Hybrid Switched-Capacitor Battery Management {IC} With Embedded
Diagnostics for Series-Stacked Li-Ion Arrays},
journal = {{IEEE} J. Solid State Circuits},
volume = {52},
number = {12},
pages = {3142--3154},
year = {2017},
url = {https://doi.org/10.1109/JSSC.2017.2734902},
doi = {10.1109/JSSC.2017.2734902},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SchaefDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchaefDS17,
author = {Christopher Schaef and
Eric Din and
Jason T. Stauth},
title = {10.2 {A} digitally controlled 94.8{\%}-peak-efficiency hybrid switched-capacitor
converter for bidirectional balancing and impedance-based diagnostics
of lithium-ion battery arrays},
booktitle = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2017, San Francisco, CA, USA, February 5-9, 2017},
pages = {180--181},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISSCC.2017.7870320},
doi = {10.1109/ISSCC.2017.7870320},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/SchaefDS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SchaefS15,
author = {Christopher Schaef and
Jason T. Stauth},
title = {A 3-Phase Resonant Switched Capacitor Converter Delivering 7.7 {W}
at 85{\%} Efficiency Using 1.1 nH {PCB} Trace Inductors},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {12},
pages = {2861--2869},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2015.2462351},
doi = {10.1109/JSSC.2015.2462351},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SchaefS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SchaefKS15,
author = {Christopher Schaef and
Kapil Kesarwani and
Jason T. Stauth},
title = {20.2 {A} variable-conversion-ratio 3-phase resonant switched capacitor
converter with 85{\%} efficiency at 0.91W/mm\({}^{\mbox{2}}\) using
1.1nH PCB-trace inductors},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7063075},
doi = {10.1109/ISSCC.2015.7063075},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SchaefKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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