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ORCIDBibTeX records: Toshinori Sato
@inproceedings{DBLP:conf/coling/MizumotoYYOKS24,
author = {Tomoya Mizumoto and
Takato Yamazaki and
Katsumasa Yoshikawa and
Masaya Ohagi and
Toshiki Kawamoto and
Toshinori Sato},
editor = {Nicoletta Calzolari and
Min{-}Yen Kan and
V{\'{e}}ronique Hoste and
Alessandro Lenci and
Sakriani Sakti and
Nianwen Xue},
title = {Dialogue Systems Can Generate Appropriate Responses without the Use
of Question Marks?- a Study of the Effects of "?" for Spoken
Dialogue Systems -},
booktitle = {Proceedings of the 2024 Joint International Conference on Computational
Linguistics, Language Resources and Evaluation, {LREC/COLING} 2024,
20-25 May, 2024, Torino, Italy},
pages = {4858--4864},
publisher = {{ELRA} and {ICCL}},
year = {2024},
url = {https://aclanthology.org/2024.lrec-main.435},
timestamp = {Thu, 23 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/coling/MizumotoYYOKS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KoyanagiUS24,
author = {Yui Koyanagi and
Tomoaki Ukezono and
Toshinori Sato},
title = {A Light-weight and Tamper-resistant {AES} Implementation by FPGAs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2024,
Singapore, May 19-22, 2024},
pages = {1--5},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCAS58744.2024.10557893},
doi = {10.1109/ISCAS58744.2024.10557893},
timestamp = {Tue, 16 Jul 2024 11:51:22 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KoyanagiUS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ar/YamazakiYKMOS23,
author = {Takato Yamazaki and
Katsumasa Yoshikawa and
Toshiki Kawamoto and
Tomoya Mizumoto and
Masaya Ohagi and
Toshinori Sato},
title = {Building a hospitable and reliable dialogue system for android robots:
a scenario-based approach with large language models},
journal = {Adv. Robotics},
volume = {37},
number = {21},
pages = {1364--1381},
year = {2023},
url = {https://doi.org/10.1080/01691864.2023.2244554},
doi = {10.1080/01691864.2023.2244554},
timestamp = {Sat, 08 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ar/YamazakiYKMOS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gcce/HamaS23,
author = {Hiroyuki Hama and
Toshinori Sato},
title = {Towards At-the-Edge {ECG} Signal Processing with Accuracy-tunable
Approximate Adders},
booktitle = {12th {IEEE} Global Conference on Consumer Electronics, {GCCE} 2023,
Nara, Japan, October 10-13, 2023},
pages = {902--906},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/GCCE59613.2023.10315390},
doi = {10.1109/GCCE59613.2023.10315390},
timestamp = {Thu, 23 Nov 2023 21:16:31 +0100},
biburl = {https://dblp.org/rec/conf/gcce/HamaS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isdcs/HamaUS23,
author = {Hiroyuki Hama and
Tomoaki Ukezono and
Toshinori Sato},
title = {Negative Impact of Approximated Signed Addition on Power Reduction},
booktitle = {International Symposium on Devices, Circuits and Systems, {ISDCS}
2023, Higashi-Hiroshima, Japan, May 29-31, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISDCS58735.2023.10153565},
doi = {10.1109/ISDCS58735.2023.10153565},
timestamp = {Fri, 07 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isdcs/HamaUS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/HamaUS23,
author = {Hiroyuki Hama and
Tomoaki Ukezono and
Toshinori Sato},
title = {Leveraging Approximate Computing for IoT Image Transmission},
booktitle = {20th International SoC Design Conference, {ISOCC} 2023, Jeju, Republic
of Korea, October 25-28, 2023},
pages = {75--76},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISOCC59558.2023.10396309},
doi = {10.1109/ISOCC59558.2023.10396309},
timestamp = {Thu, 22 Feb 2024 20:44:54 +0100},
biburl = {https://dblp.org/rec/conf/isocc/HamaUS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/SatoHU23,
author = {Toshinori Sato and
Hiroyuki Hama and
Tomoaki Ukezono},
title = {Comparative Evaluation between Carry Prediction and Sign Error Correction
in Approximate Addition},
booktitle = {20th International SoC Design Conference, {ISOCC} 2023, Jeju, Republic
of Korea, October 25-28, 2023},
pages = {77--78},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISOCC59558.2023.10396324},
doi = {10.1109/ISOCC59558.2023.10396324},
timestamp = {Thu, 22 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isocc/SatoHU23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/paclic/KawamotoOYSFO23,
author = {Toshiki Kawamoto and
Yuki Okano and
Takato Yamazaki and
Toshinori Sato and
Kotaro Funakoshi and
Manabu Okumura},
editor = {Chu{-}Ren Huang and
Yasunari Harada and
Jong{-}Bok Kim and
Si Chen and
Yu{-}Yin Hsu and
Emmanuele Chersoni and
Pranav A and
Winnie Huiheng Zeng and
Bo Peng and
Yuxi Li and
Junlin Li},
title = {A Follow-up Study on Evaluation Metrics Using Follow-up Utterances},
booktitle = {Proceedings of the 37th Pacific Asia Conference on Language, Information
and Computation, {PACLIC} 2023, The Hong Kong Polytechnic University,
Hong Kong, SAR, China, 2-4 December 2023},
pages = {552--558},
publisher = {Association for Computational Linguistics},
year = {2023},
url = {https://aclanthology.org/2023.paclic-1.55},
timestamp = {Thu, 15 Feb 2024 16:12:31 +0100},
biburl = {https://dblp.org/rec/conf/paclic/KawamotoOYSFO23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ranlp/KiyonoTLS23,
author = {Shun Kiyono and
Sho Takase and
Shengzhe Li and
Toshinori Sato},
editor = {Ruslan Mitkov and
Galia Angelova},
title = {Bridging the Gap between Subword and Character Segmentation in Pretrained
Language Models},
booktitle = {Proceedings of the 14th International Conference on Recent Advances
in Natural Language Processing, {RANLP} 2023, Varna, Bulgaria, 4-6
September 2023},
pages = {568--577},
publisher = {{INCOMA} Ltd., Shoumen, Bulgaria},
year = {2023},
url = {https://aclanthology.org/2023.ranlp-1.62},
timestamp = {Wed, 15 Nov 2023 13:49:17 +0100},
biburl = {https://dblp.org/rec/conf/ranlp/KiyonoTLS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigdial/YamazakiMYOKS23,
author = {Takato Yamazaki and
Tomoya Mizumoto and
Katsumasa Yoshikawa and
Masaya Ohagi and
Toshiki Kawamoto and
Toshinori Sato},
editor = {David Schlangen and
Svetlana Stoyanchev and
Shafiq Joty and
Ondrej Dusek and
Casey Kennington and
Malihe Alikhani},
title = {An Open-Domain Avatar Chatbot by Exploiting a Large Language Model},
booktitle = {Proceedings of the 24th Meeting of the Special Interest Group on Discourse
and Dialogue, {SIGDIAL} 2023, Prague, Czechia, September 11 - 15,
2023},
pages = {428--432},
publisher = {Association for Computational Linguistics},
year = {2023},
url = {https://doi.org/10.18653/v1/2023.sigdial-1.40},
doi = {10.18653/V1/2023.SIGDIAL-1.40},
timestamp = {Fri, 12 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigdial/YamazakiMYOKS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-03293,
author = {Tomoya Mizumoto and
Takato Yamazaki and
Katsumasa Yoshikawa and
Masaya Ohagi and
Toshiki Kawamoto and
Toshinori Sato},
title = {Dialogue Systems Can Generate Appropriate Responses without the Use
of Question Marks? - Investigation of the Effects of Question Marks
on Dialogue Systems},
journal = {CoRR},
volume = {abs/2308.03293},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2308.03293},
doi = {10.48550/ARXIV.2308.03293},
eprinttype = {arXiv},
eprint = {2308.03293},
timestamp = {Mon, 21 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2308-03293.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2310-07170,
author = {Tatsuya Ide and
Eiki Murata and
Daisuke Kawahara and
Takato Yamazaki and
Shengzhe Li and
Kenta Shinzato and
Toshinori Sato},
title = {{PHALM:} Building a Knowledge Graph from Scratch by Prompting Humans
and a Language Model},
journal = {CoRR},
volume = {abs/2310.07170},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2310.07170},
doi = {10.48550/ARXIV.2310.07170},
eprinttype = {arXiv},
eprint = {2310.07170},
timestamp = {Tue, 24 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2310-07170.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/atait/SanoNKTYUS22,
author = {Masaki Sano and
Hiroki Nishikawa and
Xiangbo Kong and
Hiroyuki Tomiyama and
Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Hiroki Nishikawa and
Xiangbo Kong},
title = {An Accuracy-Controllable Approximate Adder for FPGAs},
booktitle = {Proceedings of the 4th International Symposium on Advanced Technologies
and Applications in the Internet of Things {(ATAIT} 2022), Ibaraki
and Virtual, Japan, August 24-26, 2022},
series = {{CEUR} Workshop Proceedings},
volume = {3198},
pages = {60--66},
publisher = {CEUR-WS.org},
year = {2022},
url = {https://ceur-ws.org/Vol-3198/paper8.pdf},
timestamp = {Fri, 10 Mar 2023 16:22:40 +0100},
biburl = {https://dblp.org/rec/conf/atait/SanoNKTYUS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangUS22,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Reducing Power Consumption using Approximate Encoding for {CNN} Accelerators
at the Edge},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {229--235},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530315},
doi = {10.1145/3526241.3530315},
timestamp = {Fri, 03 Jun 2022 08:45:20 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangUS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/naacl/KasaharaKTLSS22,
author = {Tomohito Kasahara and
Daisuke Kawahara and
Nguyen Tung and
Shengzhe Li and
Kenta Shinzato and
Toshinori Sato},
editor = {Daphne Ippolito and
Liunian Harold Li and
Maria Leonor Pacheco and
Danqi Chen and
Nianwen Xue},
title = {Building a Personalized Dialogue System with Prompt-Tuning},
booktitle = {Proceedings of the 2022 Conference of the North American Chapter of
the Association for Computational Linguistics: Human Language Technologies:
Student Research Workshop, {NAACL-HLT} 2022, Hybrid Event / Seattle,
WA, USA, July 10-15, 2022},
pages = {96--105},
publisher = {Association for Computational Linguistics},
year = {2022},
url = {https://doi.org/10.18653/v1/2022.naacl-srw.13},
doi = {10.18653/V1/2022.NAACL-SRW.13},
timestamp = {Thu, 14 Dec 2023 18:03:43 +0100},
biburl = {https://dblp.org/rec/conf/naacl/KasaharaKTLSS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2206-05399,
author = {Tomohito Kasahara and
Daisuke Kawahara and
Nguyen Tung and
Shengzhe Li and
Kenta Shinzato and
Toshinori Sato},
title = {Building a Personalized Dialogue System with Prompt-Tuning},
journal = {CoRR},
volume = {abs/2206.05399},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2206.05399},
doi = {10.48550/ARXIV.2206.05399},
eprinttype = {arXiv},
eprint = {2206.05399},
timestamp = {Mon, 20 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2206-05399.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-10400,
author = {Takato Yamazaki and
Katsumasa Yoshikawa and
Toshiki Kawamoto and
Masaya Ohagi and
Tomoya Mizumoto and
Shuta Ichimura and
Yusuke Kida and
Toshinori Sato},
title = {Tourist Guidance Robot Based on HyperCLOVA},
journal = {CoRR},
volume = {abs/2210.10400},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.10400},
doi = {10.48550/ARXIV.2210.10400},
eprinttype = {arXiv},
eprint = {2210.10400},
timestamp = {Mon, 24 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-10400.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/YangSU20,
author = {Tongxin Yang and
Toshinori Sato and
Tomoaki Ukezono},
title = {An Accuracy-Configurable Adder for Low-Power Applications},
journal = {{IEICE} Trans. Electron.},
volume = {103-C},
number = {3},
pages = {68--76},
year = {2020},
url = {http://search.ieice.org/bin/summary.php?id=e103-c\_3\_68},
doi = {10.1587/TRANSELE.2019LHP0002},
timestamp = {Mon, 06 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/YangSU20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceta/SatoU20,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {Exploiting Configurable Approximations for Tolerating Aging-induced
Timing Violations},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {103-A},
number = {9},
pages = {1028--1036},
year = {2020},
url = {https://doi.org/10.1587/transfun.2019KEP0009},
doi = {10.1587/TRANSFUN.2019KEP0009},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceta/SatoU20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ccoms/SatoU20,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {A Dynamically Configurable Approximate Array Multiplier with Exact
Mode},
booktitle = {5th International Conference on Computer and Communication Systems,
{ICCCS} 2020, Shanghai, China, May 15-18, 2020},
pages = {917--921},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ICCCS49078.2020.9118432},
doi = {10.1109/ICCCS49078.2020.9118432},
timestamp = {Mon, 02 Aug 2021 08:40:32 +0200},
biburl = {https://dblp.org/rec/conf/ccoms/SatoU20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/YangUS19,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
title = {Design and Analysis of Approximate Multipliers with a Tree Compressor},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {102-A},
number = {3},
pages = {532--543},
year = {2019},
url = {https://doi.org/10.1587/transfun.E102.A.532},
doi = {10.1587/TRANSFUN.E102.A.532},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/YangUS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/SatoYU19,
author = {Toshinori Sato and
Tongxin Yang and
Tomoaki Ukezono},
title = {Trading Accuracy for Power with a Configurable Approximate Adder},
journal = {{IEICE} Trans. Electron.},
volume = {102-C},
number = {4},
pages = {260--268},
year = {2019},
url = {https://doi.org/10.1587/transele.2018CDP0001},
doi = {10.1587/TRANSELE.2018CDP0001},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/SatoYU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/SatoU19,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {Correcting Sign Calculation Errors in Configurable Approximations},
booktitle = {2019 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
2019, Bangkok, Thailand, November 11-14, 2019},
pages = {190--193},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/APCCAS47518.2019.8953155},
doi = {10.1109/APCCAS47518.2019.8953155},
timestamp = {Thu, 06 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/apccas/SatoU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gcce/SatoU19,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {Tolerating Aging-Induced Timing Violations Via Configurable Approximations},
booktitle = {{IEEE} 8th Global Conference on Consumer Electronics, {GCCE} 2019,
Osaka, Japan, October 15-18, 2019},
pages = {1023--1026},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/GCCE46687.2019.9015592},
doi = {10.1109/GCCE46687.2019.9015592},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/gcce/SatoU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangUS19,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Design of a Low-power and Small-area Approximate Multiplier using
First the Approximate and then the Accurate Compression Method},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {39--44},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317975},
doi = {10.1145/3299874.3317975},
timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YangUS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isdcs/YangSU19,
author = {Tongxin Yang and
Toshinori Sato and
Tomoaki Ukezono},
title = {A Low-Power Approximate Multiply-Add Unit},
booktitle = {2nd International Symposium on Devices, Circuits and Systems, {ISDCS}
2019, Higashi-Hiroshima, Japan, March 6-8, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISDCS.2019.8719087},
doi = {10.1109/ISDCS.2019.8719087},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isdcs/YangSU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/YangSU19,
author = {Tongxin Yang and
Toshinori Sato and
Tomoaki Ukezono},
title = {An Approximate Multiply-Accumulate Unit with Low Power and Reduced
Area},
booktitle = {2019 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2019,
Miami, FL, USA, July 15-17, 2019},
pages = {385--390},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISVLSI.2019.00076},
doi = {10.1109/ISVLSI.2019.00076},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/YangSU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/norchip/SatoU19,
author = {Toshinori Sato and
Tomoaki Ukezono},
editor = {Jari Nurmi and
Peeter Ellervee and
Kari Halonen and
Juha R{\"{o}}ning},
title = {On Applications of Configurable Approximation to Irregular Voltage},
booktitle = {2019 {IEEE} Nordic Circuits and Systems Conference, {NORCAS} 2019:
{NORCHIP} and International Symposium of System-on-Chip (SoC), Helsinki,
Finland, October 29-30, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/NORCHIP.2019.8906926},
doi = {10.1109/NORCHIP.2019.8906926},
timestamp = {Tue, 26 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/norchip/SatoU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/SatoU19,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {Evaluation on Configurable Approximate Circuit for Aging-Induced Timing
Violation Tolerance},
booktitle = {24th {IEEE} Pacific Rim International Symposium on Dependable Computing,
{PRDC} 2019, Kyoto, Japan, December 1-3, 2019},
pages = {23--24},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/PRDC47002.2019.00015},
doi = {10.1109/PRDC47002.2019.00015},
timestamp = {Thu, 06 Feb 2020 16:12:03 +0100},
biburl = {https://dblp.org/rec/conf/prdc/SatoU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/YangUS18,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
title = {Design and Analysis of {A} Low-Power High-Speed Accuracy-Controllable
Approximate Multiplier},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {101-A},
number = {12},
pages = {2244--2253},
year = {2018},
url = {https://doi.org/10.1587/transfun.E101.A.2244},
doi = {10.1587/TRANSFUN.E101.A.2244},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/YangUS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/YangUS18,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Youngsoo Shin},
title = {A low-power high-speed accuracy-controllable approximate multiplier
design},
booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2018, Jeju, Korea (South), January 22-25, 2018},
pages = {605--610},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASPDAC.2018.8297389},
doi = {10.1109/ASPDAC.2018.8297389},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/YangUS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/YangUS18,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
title = {A Low-Power Yet High-Speed Configurable Adder for Approximate Computing},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8350930},
doi = {10.1109/ISCAS.2018.8350930},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/YangUS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/IshidaSU18,
author = {Ryuta Ishida and
Toshinori Sato and
Tomoaki Ukezono},
title = {Approximate Adder Generation for Image Processing Using Convolutional
Neural Network},
booktitle = {International SoC Design Conference, {ISOCC} 2018, Daegu, South Korea,
November 12-15, 2018},
pages = {38--39},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISOCC.2018.8649928},
doi = {10.1109/ISOCC.2018.8649928},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isocc/IshidaSU18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isocc/SatoU18,
author = {Toshinori Sato and
Tomoaki Ukezono},
title = {Exploiting Configurability for Correct Sign Calculation in an Approximate
Adder},
booktitle = {International SoC Design Conference, {ISOCC} 2018, Daegu, South Korea,
November 12-15, 2018},
pages = {86--87},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISOCC.2018.8649985},
doi = {10.1109/ISOCC.2018.8649985},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isocc/SatoU18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/YangUS18,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
title = {A low-power configurable adder for approximate applications},
booktitle = {19th International Symposium on Quality Electronic Design, {ISQED}
2018, Santa Clara, CA, USA, March 13-14, 2018},
pages = {347--352},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISQED.2018.8357311},
doi = {10.1109/ISQED.2018.8357311},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/YangUS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BabaYITUS18,
author = {Hiroyuki Baba and
Tongxin Yang and
Masahiro Inoue and
Kaori Tajima and
Tomoaki Ukezono and
Toshinori Sato},
title = {A Low-Power and Small-Area Multiplier for Accuracy-Scalable Approximate
Computing},
booktitle = {2018 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2018,
Hong Kong, China, July 8-11, 2018},
pages = {569--574},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ISVLSI.2018.00109},
doi = {10.1109/ISVLSI.2018.00109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BabaYITUS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/YangUS17,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
title = {Low-Power and High-Speed Approximate Multiplier Design with a Tree
Compressor},
booktitle = {2017 {IEEE} International Conference on Computer Design, {ICCD} 2017,
Boston, MA, USA, November 5-8, 2017},
pages = {89--96},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ICCD.2017.22},
doi = {10.1109/ICCD.2017.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/YangUS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/YanoHS13,
author = {Ken Yano and
Takanori Hayashida and
Toshinori Sato},
title = {Improving timing error tolerance without impact on chip area and power
consumption},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {373--378},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523638},
doi = {10.1109/ISQED.2013.6523638},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/YanoHS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/KunitakeSYH12,
author = {Yuji Kunitake and
Toshinori Sato and
Hiroto Yasuura and
Takanori Hayashida},
title = {A Selective Replacement Method for Timing-Error-Predicting flip-Flops},
journal = {J. Circuits Syst. Comput.},
volume = {21},
number = {6},
year = {2012},
url = {https://doi.org/10.1142/S0218126612400130},
doi = {10.1142/S0218126612400130},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/KunitakeSYH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/acsc/SatoMYH12,
author = {Toshinori Sato and
Hideki Mori and
Rikiya Yano and
Takanori Hayashida},
editor = {Mark Reynolds and
Bruce H. Thomas},
title = {Importance of Single-Core Performance in the Multicore Era},
booktitle = {Thirty-Fifth Australasian Computer Science Conference, {ACSC} 2012,
Melbourne, Australia, January 2012},
series = {{CRPIT}},
volume = {122},
pages = {107--114},
publisher = {Australian Computer Society},
year = {2012},
url = {http://crpit.scem.westernsydney.edu.au/abstracts/CRPITV122Sato.html},
timestamp = {Fri, 02 Jul 2021 14:10:58 +0200},
biburl = {https://dblp.org/rec/conf/acsc/SatoMYH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/VeidenbaumKSM12,
author = {Alex Veidenbaum and
Nectarios Koziris and
Toshinori Sato and
Avi Mendelson},
editor = {Christos Kaklamanis and
Theodore S. Papatheodorou and
Paul G. Spirakis},
title = {Topic 4: High-Performance Architecture and Compilers},
booktitle = {Euro-Par 2012 Parallel Processing - 18th International Conference,
Euro-Par 2012, Rhodes Island, Greece, August 27-31, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7484},
pages = {204--205},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-32820-6\_21},
doi = {10.1007/978-3-642-32820-6\_21},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/europar/VeidenbaumKSM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ieeehpcs/SatoHY12,
author = {Toshinori Sato and
Takanori Hayashida and
Ken Yano},
editor = {Waleed W. Smari and
Vesna Zeljkovic},
title = {Dynamically reducing overestimated design margin of MultiCores},
booktitle = {2012 International Conference on High Performance Computing {\&}
Simulation, {HPCS} 2012, Madrid, Spain, July 2-6, 2012},
pages = {403--409},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/HPCSim.2012.6266944},
doi = {10.1109/HPCSIM.2012.6266944},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ieeehpcs/SatoHY12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscit/KunitakeSYH12,
author = {Yuji Kunitake and
Toshinori Sato and
Hiroto Yasuura and
Takanori Hayashida},
title = {Guidelines for mitigating {NBTI} degradation in on-chip memories},
booktitle = {International Symposium on Communications and Information Technologies,
{ISCIT} 2012, Gold Coast, Australia, October 2-5, 2012},
pages = {822--827},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCIT.2012.6381015},
doi = {10.1109/ISCIT.2012.6381015},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscit/KunitakeSYH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/YanoHS12,
author = {Ken Yano and
Takanori Hayashida and
Toshinori Sato},
title = {Analysis of {SER} Improvement by Radiation Hardened Latches},
booktitle = {{IEEE} 18th Pacific Rim International Symposium on Dependable Computing,
{PRDC} 2012, Niigata, Japan, November 18-19, 2012},
pages = {89--95},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/PRDC.2012.9},
doi = {10.1109/PRDC.2012.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/YanoHS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/KunitakeSY11,
author = {Yuji Kunitake and
Toshinori Sato and
Hiroto Yasuura},
title = {Short Term Cell-Flipping Technique for Mitigating {SNM} Degradation
Due to {NBTI}},
journal = {{IEICE} Trans. Electron.},
volume = {94-C},
number = {4},
pages = {520--529},
year = {2011},
url = {https://doi.org/10.1587/transele.E94.C.520},
doi = {10.1587/TRANSELE.E94.C.520},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/KunitakeSY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cisis/SatoYH11,
author = {Toshinori Sato and
Takahito Yoshiki and
Takanori Hayashida},
title = {Multicore Power Management Utilizing Error-Predicting Flip-flop},
booktitle = {International Conference on Complex, Intelligent and Software Intensive
Systems, {CISIS} 2011, June 30 - July 2, 2011, Korean Bible University,
Seoul, Korea},
pages = {606--611},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/CISIS.2011.100},
doi = {10.1109/CISIS.2011.100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cisis/SatoYH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KunitakeSY10,
author = {Yuji Kunitake and
Toshinori Sato and
Hiroto Yasuura},
title = {Signal probability control for relieving {NBTI} in {SRAM} cells},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {660--666},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450504},
doi = {10.1109/ISQED.2010.5450504},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/KunitakeSY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/KunitakeSY10,
author = {Yuji Kunitake and
Toshinori Sato and
Hiroto Yasuura},
editor = {Yutaka Ishikawa and
Dong Tang and
Hiroshi Nakamura},
title = {A Replacement Strategy for Canary Flip-Flops},
booktitle = {16th {IEEE} Pacific Rim International Symposium on Dependable Computing,
{PRDC} 2010, Tokyo, Japan, December 13-15, 2010},
pages = {227--228},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/PRDC.2010.46},
doi = {10.1109/PRDC.2010.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/KunitakeSY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/KunitakeMSY09,
author = {Yuji Kunitake and
Kazuhiro Mima and
Toshinori Sato and
Hiroto Yasuura},
title = {Enhancements of a Circuit-Level Timing Speculation Technique and Their
Evaluations Using a Co-simulation Environment},
journal = {{IEICE} Trans. Electron.},
volume = {92-C},
number = {4},
pages = {483--491},
year = {2009},
url = {https://doi.org/10.1587/transele.E92.C.483},
doi = {10.1587/TRANSELE.E92.C.483},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieicet/KunitakeMSY09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WatanabeHS09,
author = {Shingo Watanabe and
Masanori Hashimoto and
Toshinori Sato},
title = {A case for exploiting complex arithmetic circuits towards performance
yield enhancement},
booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED}
2009), 16-18 March 2009, San Jose, CA, {USA}},
pages = {401--407},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISQED.2009.4810328},
doi = {10.1109/ISQED.2009.4810328},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WatanabeHS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SatoW09,
author = {Toshinori Sato and
Shingo Watanabe},
title = {Uncriticality-directed scheduling for tackling variation and power
challenges},
booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED}
2009), 16-18 March 2009, San Jose, CA, {USA}},
pages = {820--825},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISQED.2009.4810398},
doi = {10.1109/ISQED.2009.4810398},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SatoW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/WatanabeCS08,
author = {Shingo Watanabe and
Akihiro Chiyonobu and
Toshinori Sato},
title = {A Low-Power Instruction Issue Queue for Microprocessors},
journal = {{IEICE} Trans. Electron.},
volume = {91-C},
number = {4},
pages = {400--409},
year = {2008},
url = {https://doi.org/10.1093/ietele/e91-c.4.400},
doi = {10.1093/IETELE/E91-C.4.400},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/WatanabeCS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/Sato08,
author = {Toshinori Sato},
title = {A Simple Mechanism for Collapsing Instructions under Timing Speculation},
journal = {{IEICE} Trans. Electron.},
volume = {91-C},
number = {9},
pages = {1394--1401},
year = {2008},
url = {https://doi.org/10.1093/ietele/e91-c.9.1394},
doi = {10.1093/IETELE/E91-C.9.1394},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/Sato08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SatoF08,
author = {Toshinori Sato and
Toshimasa Funaki},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {Dependability, power, and performance trade-off on a multicore processor},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {714--719},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4484044},
doi = {10.1109/ASPDAC.2008.4484044},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SatoF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/FunakiS08,
author = {Toshimasa Funaki and
Toshinori Sato},
editor = {Luca Fanucci},
title = {Formulating {MITF} for a Multicore Processor with {SEU} Tolerance},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {234--241},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.48},
doi = {10.1109/DSD.2008.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/FunakiS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SatoW08,
author = {Toshinori Sato and
Shingo Watanabe},
title = {Instruction Scheduling for Variation-Originated Variable Latencies},
booktitle = {9th International Symposium on Quality of Electronic Design {(ISQED}
2008), 17-19 March 2008, San Jose, CA, {USA}},
pages = {361--364},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISQED.2008.4479757},
doi = {10.1109/ISQED.2008.4479757},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SatoW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/WatanabeS08,
author = {Shingo Watanabe and
Toshinori Sato},
title = {Uncriticality-Directed Low-Power Instruction Scheduling},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2008, 7-9
April 2008, Montpellier, France},
pages = {69--74},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISVLSI.2008.64},
doi = {10.1109/ISVLSI.2008.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/WatanabeS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/IshiharaYIMKOKMS08,
author = {Tohru Ishihara and
Seiichiro Yamaguchi and
Yuriko Ishitobi and
Tadayuki Matsumura and
Yuji Kunitake and
Yuichiro Oyama and
Yusuke Kaneda and
Masanori Muroyama and
Toshinori Sato},
title = {{AMPLE:} An Adaptive Multi-Performance Processor for Low-Energy Embedded
Applications},
booktitle = {Proceedings of the {IEEE} Symposium on Application Specific Processors,
{SASP} 2008, held in conjunction with the {DAC} 2008, June 8-9, 2008,
Anaheim, California, {USA}},
pages = {83--88},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/SASP.2008.4570790},
doi = {10.1109/SASP.2008.4570790},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/IshiharaYIMKOKMS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ishpc/2005,
editor = {Jes{\'{u}}s Labarta and
Kazuki Joe and
Toshinori Sato},
title = {High-Performance Computing - 6th International Symposium, {ISHPC}
2005, Nara, Japan, September 7-9, 2005, First International Workshop
on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {4759},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-77704-5},
doi = {10.1007/978-3-540-77704-5},
isbn = {978-3-540-77703-8},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ishpc/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/isca/SatoTSFKC07,
author = {Toshinori Sato and
Yuu Tanaka and
Hidenori Sato and
Toshimasa Funaki and
Takenori Koushiro and
Akihiro Chiyonobu},
title = {Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative
Thread-Level Parallelism},
journal = {Int. J. Comput. Their Appl.},
volume = {14},
number = {2},
pages = {79--91},
year = {2007},
timestamp = {Thu, 16 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/isca/SatoTSFKC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/KiseSN07,
author = {Kenji Kise and
Toshinori Sato and
Hironori Nakajo},
title = {Introduction},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {5},
pages = {1--2},
year = {2007},
url = {https://doi.org/10.1145/1360464.1360469},
doi = {10.1145/1360464.1360469},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/KiseSN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEcit/WatanabeCS07,
author = {Shingo Watanabe and
Akihiro Chiyonobu and
Toshinori Sato},
title = {Indirect Tag Search Mechanism for Instruction Window Energy Reduction},
booktitle = {Seventh International Conference on Computer and Information Technology
{(CIT} 2007), October 16-19, 2007, University of Aizu, Fukushima,
Japan},
pages = {841--846},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/CIT.2007.98},
doi = {10.1109/CIT.2007.98},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEcit/WatanabeCS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KunitakeCTS07,
author = {Yuji Kunitake and
Akihiro Chiyonobu and
Koichiro Tanaka and
Toshinori Sato},
title = {Challenges in Evaluations for a Typical-Case Design Methodology},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {374--379},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.46},
doi = {10.1109/ISQED.2007.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KunitakeCTS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SatoK07,
author = {Toshinori Sato and
Yuji Kunitake},
title = {A Simple Flip-Flop Circuit for Typical-Case Designs for {DFM}},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {539--544},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.23},
doi = {10.1109/ISQED.2007.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SatoK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SatoK07,
author = {Toshinori Sato and
Yuji Kunitake},
editor = {Nadine Az{\'{e}}mard and
Lars J. Svensson},
title = {Exploiting Input Variations for Energy Reduction},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 17th International Workshop, {PATMOS} 2007, Gothenburg,
Sweden, September 3-5, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4644},
pages = {384--393},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74442-9\_37},
doi = {10.1007/978-3-540-74442-9\_37},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SatoK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/SatoF07,
author = {Toshinori Sato and
Toshimasa Funaki},
title = {Power-Performance Trade-Off of a Dependable Multicore Processor},
booktitle = {13th {IEEE} Pacific Rim International Symposium on Dependable Computing
{(PRDC} 2007), 17-19 December, 2007, Melbourne, Victoria, Australia},
pages = {268--273},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/PRDC.2007.22},
doi = {10.1109/PRDC.2007.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/SatoF07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jec/FujiiSCS06,
author = {Seiichiri Fujii and
Akihito Sakanaka and
Akihiro Chiyonobu and
Toshinori Sato},
title = {A leakage-energy-reduction technique for cache memories in embedded
processors},
journal = {J. Embed. Comput.},
volume = {2},
number = {1},
pages = {49--55},
year = {2006},
url = {http://content.iospress.com/articles/journal-of-embedded-computing/jec00059},
timestamp = {Fri, 07 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jec/FujiiSCS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/ChiyonobuS06,
author = {Akihiro Chiyonobu and
Toshinori Sato},
title = {Energy-efficient instruction scheduling utilizing cache miss information},
journal = {{SIGARCH} Comput. Archit. News},
volume = {34},
number = {1},
pages = {65--70},
year = {2006},
url = {https://doi.org/10.1145/1147349.1147361},
doi = {10.1145/1147349.1147361},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/ChiyonobuS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SatoTSFKC06,
author = {Toshinori Sato and
Yuu Tanaka and
Hidenori Sato and
Toshimasa Funaki and
Takenori Koushiro and
Akihiro Chiyonobu},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {Improving Energy Efficiency Via Speculative Multithreading on MultiCore
Processors},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {553--562},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_54},
doi = {10.1007/11847083\_54},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SatoTSFKC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/SatoC06,
author = {Toshinori Sato and
Akihiro Chiyonobu},
title = {Evaluating the Impact of Fault Recovery on Superscalar Processor Performance},
booktitle = {12th {IEEE} Pacific Rim International Symposium on Dependable Computing
{(PRDC} 2006), 18-20 December, 2006, University of California, Riverside,
{USA}},
pages = {369--370},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/PRDC.2006.33},
doi = {10.1109/PRDC.2006.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/SatoC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/SatoC05,
author = {Toshinori Sato and
Akihiro Chiyonobu},
title = {An Energy-Efficient Clustered Superscalar Processor},
journal = {{IEICE} Trans. Electron.},
volume = {88-C},
number = {4},
pages = {544--551},
year = {2005},
url = {https://doi.org/10.1093/ietele/e88-c.4.544},
doi = {10.1093/IETELE/E88-C.4.544},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/SatoC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cata/Sato05,
author = {Toshinori Sato},
editor = {Gongzhu Hu},
title = {Exploiting Trivial Computation in Dependable Processors},
booktitle = {20th International Conference on Computers and Their Applications,
{CATA} 2005, March 16-18, 2005, Holiday Inn Downtown-Superdome Hotel,
New Orleans, Louisiana, USA, Proceedings},
pages = {168--173},
publisher = {{ISCA}},
year = {2005},
timestamp = {Mon, 09 Aug 2021 16:27:13 +0200},
biburl = {https://dblp.org/rec/conf/cata/Sato05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/ImaizumiS05,
author = {Yuichiro Imaizumi and
Toshinori Sato},
editor = {Jes{\'{u}}s Labarta and
Kazuki Joe and
Toshinori Sato},
title = {Folding Active List for High Performance and Low Power},
booktitle = {High-Performance Computing - 6th International Symposium, {ISHPC}
2005, Nara, Japan, September 7-9, 2005, First International Workshop
on Advanced Low Power Systems, {ALPS} 2006, Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {4759},
pages = {33--42},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/978-3-540-77704-5\_3},
doi = {10.1007/978-3-540-77704-5\_3},
timestamp = {Tue, 14 May 2019 10:00:49 +0200},
biburl = {https://dblp.org/rec/conf/ishpc/ImaizumiS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdcn/TokunagaS05,
author = {Takamasa Tokunaga and
Toshinori Sato},
editor = {Thomas Fahringer and
M. H. Hamza},
title = {Profiling with Helper Threads},
booktitle = {Proceedings of the {IASTED} International Conference on Parallel and
Distributed Computing and Networks, part of the 23rd Multi-Conference
on Applied Informatics, Innsbruck, Austria, February 15-17, 2005},
pages = {1--6},
publisher = {{IASTED/ACTA} Press},
year = {2005},
timestamp = {Thu, 27 Oct 2005 11:21:51 +0200},
biburl = {https://dblp.org/rec/conf/pdcn/TokunagaS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/SakanakaFS04,
author = {Akihito Sakanaka and
Seiichirou Fujii and
Toshinori Sato},
title = {A leakage-energy-reduction technique for highly-associative caches
in embedded systems},
journal = {{SIGARCH} Comput. Archit. News},
volume = {32},
number = {3},
pages = {50--54},
year = {2004},
url = {https://doi.org/10.1145/1024295.1024302},
doi = {10.1145/1024295.1024302},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/SakanakaFS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SatoS04,
author = {Hidenori Sato and
Toshinori Sato},
editor = {Masaharu Imai},
title = {A static and dynamic energy reduction technique for I-cache and {BTB}
in embedded processors},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {830--833},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.34},
doi = {10.1109/ASPDAC.2004.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/SatoS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euc/FujiiS04,
author = {Seiichiro Fujii and
Toshinori Sato},
editor = {Laurence Tianruo Yang and
Minyi Guo and
Guang R. Gao and
Niraj K. Jha},
title = {Non-uniform Set-Associative Caches for Power-Aware Embedded Processors},
booktitle = {Embedded and Ubiquitous Computing, International Conference {EUC}
2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3207},
pages = {217--226},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30121-9\_21},
doi = {10.1007/978-3-540-30121-9\_21},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/euc/FujiiS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcsw/GotoS04,
author = {Masaharu Goto and
Toshinori Sato},
title = {Leakage Energy Reduction in Register Renaming},
booktitle = {24th International Conference on Distributed Computing Systems Workshops
{(ICDCS} 2004 Workshops), 23-24 March 2004, Hachioji, Tokyo, Japan},
pages = {890--895},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICDCSW.2004.1284138},
doi = {10.1109/ICDCSW.2004.1284138},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdcsw/GotoS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isict/ChiyonobuS04,
author = {Akihiro Chiyonobu and
Toshinori Sato},
editor = {John Waldron},
title = {Investigating heterogeneous combination of functional units for a
criticality-based low-power processor architecture},
booktitle = {Proceedings of the Intenational Symposium on Information and Communication
Technologies, Las Vegas, Nevada, USA, June 16-18, 2004},
series = {{ACM} International Conference Proceeding Series},
volume = {90},
pages = {190--195},
publisher = {Trinity College Dublin},
year = {2004},
url = {https://dl.acm.org/citation.cfm?id=1071547},
timestamp = {Mon, 26 Nov 2018 17:05:49 +0100},
biburl = {https://dblp.org/rec/conf/isict/ChiyonobuS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/TanakaSK04,
author = {Yuu Tanaka and
Toshinori Sato and
Takenori Koushiro},
editor = {Phillip B. Gibbons and
Micah Adler},
title = {The potential in energy efficiency of a speculative chip-multiprocessor},
booktitle = {{SPAA} 2004: Proceedings of the Sixteenth Annual {ACM} Symposium on
Parallelism in Algorithms and Architectures, June 27-30, 2004, Barcelona,
Spain},
pages = {273--274},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1007912.1007956},
doi = {10.1145/1007912.1007956},
timestamp = {Wed, 21 Nov 2018 11:11:51 +0100},
biburl = {https://dblp.org/rec/conf/spaa/TanakaSK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/scjapan/SatoA03,
author = {Toshinori Sato and
Itsujiro Arita},
title = {Combining variable latency pipeline with instruction reuse for execution
latency reduction},
journal = {Syst. Comput. Jpn.},
volume = {34},
number = {12},
pages = {11--21},
year = {2003},
url = {https://doi.org/10.1002/scj.10498},
doi = {10.1002/SCJ.10498},
timestamp = {Wed, 13 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/scjapan/SatoA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/KoushiroSA03,
author = {Takenori Koushiro and
Toshinori Sato and
Itsujiro Arita},
title = {A trace-level value predictor for Contrail processors},
journal = {{SIGARCH} Comput. Archit. News},
volume = {31},
number = {3},
pages = {42--47},
year = {2003},
url = {https://doi.org/10.1145/882105.882112},
doi = {10.1145/882105.882112},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/KoushiroSA03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/caine/TaninoS03,
author = {Asami Tanino and
Toshinori Sato},
editor = {Kendall E. Nygard},
title = {Simplifying High-Frequency Microprocessor Design via Timing Constraint
Speculation},
booktitle = {Proceedings of the 16th International Conference on Computer Applications
in Industry and Engineering, November 11-13, 2003, Imperial Palace
Hotel, Las Vegas, Nevada, {USA}},
pages = {282--287},
publisher = {{ISCA}},
year = {2003},
timestamp = {Fri, 08 Sep 2006 15:11:34 +0200},
biburl = {https://dblp.org/rec/conf/caine/TaninoS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Sato03,
author = {Toshinori Sato},
title = {Exploiting Instruction Redundancy for Transient Fault Tolerance},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {547--554},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250154},
doi = {10.1109/DFTVS.2003.1250154},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Sato03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/SatoM03,
author = {Toshinori Sato and
Daisuke Morishita},
title = {A field-customizable and runtime-adaptable microarchitecture},
booktitle = {Proceedings of the 2003 {IEEE} International Conference on Field-Programmable
Technology, Tokyo, Japan, {FPT} 2003, December 15-17, 2003},
pages = {328--331},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/FPT.2003.1275769},
doi = {10.1109/FPT.2003.1275769},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpt/SatoM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SakanakaS03,
author = {Akihito Sakanaka and
Toshinori Sato},
editor = {Jorge Juan{-}Chico and
Enrico Macii},
title = {Reducing Static Energy of Cache Memories via Prediction-Table-Less
Way Prediction},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
Italy, September 10-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2799},
pages = {530--539},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39762-5\_59},
doi = {10.1007/978-3-540-39762-5\_59},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SakanakaS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jise/SatoSH02,
author = {Toshinori Sato and
Kiichi Sugitani and
Akihiko Hamano},
title = {Evaluating Influence of Compiler Optimizations on Data Speculation},
journal = {J. Inf. Sci. Eng.},
volume = {18},
number = {6},
pages = {1027--1036},
year = {2002},
url = {http://www.iis.sinica.edu.tw/page/jise/2002/200211\_10.html},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jise/SatoSH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/Sato02,
author = {Toshinori Sato},
title = {Evaluating the impact of reissued instructions on data speculative
processor performance},
journal = {Microprocess. Microsystems},
volume = {25},
number = {9-10},
pages = {469--482},
year = {2002},
url = {https://doi.org/10.1016/S0141-9331(01)00140-5},
doi = {10.1016/S0141-9331(01)00140-5},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/Sato02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SatoA02,
author = {Toshinori Sato and
Itsujiro Arita},
title = {Simplifying Instruction Issue Logic in Superscalar Processors},
booktitle = {2002 Euromicro Symposium on Digital Systems Design {(DSD} 2002), Systems-on-Chip,
4-6 September 2002, Dortmund, Germany},
pages = {341--346},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DSD.2002.1115388},
doi = {10.1109/DSD.2002.1115388},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/SatoA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/SatoA02,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Hans P. Zima and
Kazuki Joe and
Mitsuhisa Sato and
Yoshiki Seo and
Masaaki Shimasaki},
title = {Low-Cost Value Predictors Using Frequent Value Locality},
booktitle = {High Performance Computing, 4th International Symposium, {ISHPC} 2002,
Kansai Science City, Japan, May 15-17, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2327},
pages = {106--119},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-47847-7\_11},
doi = {10.1007/3-540-47847-7\_11},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ishpc/SatoA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SatoA02,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Bertrand Hochet and
Antonio J. Acosta and
Manuel J. Bellido},
title = {Reducing Energy Consumption via Low-Cost Value Prediction},
booktitle = {Integrated Circuit Design. Power and Timing Modeling, Optimization
and Simulation, 12th International Workshop, {PATMOS} 2002, Seville,
Spain, September 11-13, 2002},
series = {Lecture Notes in Computer Science},
volume = {2451},
pages = {380--389},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-45716-X\_38},
doi = {10.1007/3-540-45716-X\_38},
timestamp = {Fri, 03 Jun 2022 08:18:13 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SatoA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/YamamotoMSA02,
author = {Toshiyuki Yamamoto and
Kou Morita and
Toshinori Sato and
Itsujiro Arita},
editor = {Hamid R. Arabnia},
title = {The {KIT} {COSMOS} Processor: An Application of Multi-Threading for
Dynamic Optimization},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} '02, June 24 - 27,
2002, Las Vegas, Nevada, USA, Volume 2},
pages = {1010--1016},
publisher = {{CSREA} Press},
year = {2002},
timestamp = {Fri, 05 Dec 2003 09:24:01 +0100},
biburl = {https://dblp.org/rec/conf/pdpta/YamamotoMSA02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ISCApdcs/SatoA01,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Edwin Hsing{-}Mean Sha},
title = {Tolerating Transient Faults through an Instruction Reissue Mechanism},
booktitle = {Proceedings of the {ISCA} 14th International Conference on Parallel
and Distributed Computing Systems, August 8-10, 2001, Richardson,
Texas, {USA}},
pages = {240--247},
publisher = {{ISCA}},
year = {2001},
timestamp = {Mon, 09 Aug 2021 16:35:46 +0200},
biburl = {https://dblp.org/rec/conf/ISCApdcs/SatoA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/SatoA01,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Rizos Sakellariou and
John A. Keane and
John R. Gurd and
Len Freeman},
title = {Execution Latency Reduction via Variable Latency Pipeline and Instruction
Reuse},
booktitle = {Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference
Manchester, {UK} August 28-31, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2150},
pages = {428--438},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44681-8\_62},
doi = {10.1007/3-540-44681-8\_62},
timestamp = {Tue, 14 May 2019 10:00:46 +0200},
biburl = {https://dblp.org/rec/conf/europar/SatoA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcn/SatoHSA01,
author = {Toshinori Sato and
Akihiko Hamano and
Kiichi Sugitani and
Itsujiro Arita},
editor = {Louis O. Hertzberger and
Alfons G. Hoekstra and
Roy Williams},
title = {Influence of Compiler Optimizations on Value Prediction},
booktitle = {High-Performance Computing and Networking, 9th International Conference,
{HPCN} Europe 2001, Amsterdam, The Netherlands, June 25-27, 2001,
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2110},
pages = {312--321},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-48228-8\_32},
doi = {10.1007/3-540-48228-8\_32},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/hpcn/SatoHSA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SatoA01,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Lionel M. Ni and
Mateo Valero},
title = {In Search of Efficient Reliable Processor Design},
booktitle = {Proceedings of the 2001 International Conference on Parallel Processing,
{ICPP} 2002, 3-7 September 2001, Valencia, Spain},
pages = {525--532},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICPP.2001.952100},
doi = {10.1109/ICPP.2001.952100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/SatoA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/prdc/SatoA01,
author = {Toshinori Sato and
Itsujiro Arita},
title = {Evaluating Low-Cost Fault-Tolerance Mechanism for Microprocessors
on Multimedia Applications},
booktitle = {8th Pacific Rim International Symposium on Dependable Computing {(PRDC}
2001), 17-19 December 2001, Seoul, Korea},
pages = {225--232},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/PRDC.2001.992702},
doi = {10.1109/PRDC.2001.992702},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/prdc/SatoA01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/Sato00,
author = {Toshinori Sato},
title = {Quantitative evaluation of pipelining and decoupling a dynamic instruction
scheduling mechanism},
journal = {J. Syst. Archit.},
volume = {46},
number = {13},
pages = {1231--1252},
year = {2000},
url = {https://doi.org/10.1016/S1383-7621(00)00022-9},
doi = {10.1016/S1383-7621(00)00022-9},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/Sato00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/IdeHEYMKSKOS00,
author = {Nobuhiro Ide and
Masashi Hirano and
Yukio Endo and
Shin{-}ichi Yoshioka and
Hiroaki Murakami and
Atsushi Kunimatsu and
Toshinori Sato and
Takayuki Kamei and
Toyoshi Okada and
Masakazu Suzuoki},
title = {2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance
3D graphics computing},
journal = {{IEEE} J. Solid State Circuits},
volume = {35},
number = {7},
pages = {1025--1033},
year = {2000},
url = {https://doi.org/10.1109/4.848212},
doi = {10.1109/4.848212},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/IdeHEYMKSKOS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/KunimatsuISEMKHITOOYOS00,
author = {Atsushi Kunimatsu and
Nobuhiro Ide and
Toshinori Sato and
Yukio Endo and
Hiroaki Murakami and
Takayuki Kamei and
Masashi Hirano and
Fujio Ishihara and
Haruyuki Tago and
Masaaki Oka and
Akio Ohba and
Teiji Yutaka and
Toyoshi Okada and
Masakazu Suzuoki},
title = {Vector Unit Architecture for Emotion Synthesis},
journal = {{IEEE} Micro},
volume = {20},
number = {2},
pages = {40--47},
year = {2000},
url = {https://doi.org/10.1109/40.848471},
doi = {10.1109/40.848471},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/KunimatsuISEMKHITOOYOS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/KameiTOSTKNISMIEAK00,
author = {Takayuki Kamei and
Hideaki Takeda and
Yukio Ootaguro and
Takayoshi Shimazawa and
Kazuhiko Tachibana and
Shin'ichi Kawakami and
Seiji Norimatsu and
Fujio Ishihara and
Toshinori Sato and
Hiroaki Murakami and
Nobuhiro Ide and
Yukio Endo and
Akira Aono and
Atsushi Kunimatsu},
title = {300MHz design methodology of {VU} for emotion synthesis},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {635--640},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368847},
doi = {10.1145/368434.368847},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/KameiTOSTKNISMIEAK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SatoA00,
author = {Toshinori Sato and
Itsujiro Arita},
title = {Partial Resolution in Data Value Predictors},
booktitle = {Proceedings of the 2000 International Conference on Parallel Processing,
{ICPP} 2000, Toronto, Canada, August 21-24, 2000},
pages = {69--76},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ICPP.2000.876078},
doi = {10.1109/ICPP.2000.876078},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/SatoA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/SatoA00,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {John Reynders and
Alexander V. Veidenbaum},
title = {Table size reduction for data value predictors by exploiting narrow
width values},
booktitle = {Proceedings of the 14th international conference on Supercomputing,
{ICS} 2000, Santa Fe, NM, USA, May 8-11, 2000},
pages = {196--205},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/335231.335250},
doi = {10.1145/335231.335250},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/SatoA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispan/SatoA00,
author = {Toshinori Sato and
Itsujiro Arita},
title = {Comprehensive Evaluation of an Instruction Reissue Mechanism},
booktitle = {5th International Symposium on Parallel Architectures, Algorithms,
and Networks {(I-SPAN} 2000), 7-10 December 2000, Dallas / Richardson,
TX, {USA}},
pages = {78--87},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ISPAN.2000.900265},
doi = {10.1109/ISPAN.2000.900265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispan/SatoA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdpta/SatoA00,
author = {Toshinori Sato and
Itsujiro Arita},
editor = {Hamid R. Arabnia},
title = {The {KIT} {COSMOS} Processor: Introducing {CONDOR}},
booktitle = {Proceedings of the International Conference on Parallel and Distributed
Processing Techniques and Applications, {PDPTA} 2000, June 24-29,
2000, Las Vegas, Nevada, {USA}},
publisher = {{CSREA} Press},
year = {2000},
timestamp = {Mon, 08 Dec 2003 16:35:08 +0100},
biburl = {https://dblp.org/rec/conf/pdpta/SatoA00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijhsc/Sato99,
author = {Toshinori Sato},
title = {A Simulation Study of Combining Load Value and Address Predictors},
journal = {Int. J. High Speed Comput.},
volume = {10},
number = {3},
pages = {301--325},
year = {1999},
url = {https://doi.org/10.1142/S0129053399000156},
doi = {10.1142/S0129053399000156},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijhsc/Sato99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euromicro/Sato99,
author = {Toshinori Sato},
title = {A Simulation Study of Pipelining and Decoupling a Dynamic Instruction
Scheduling Mechanism},
booktitle = {25th {EUROMICRO} '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy},
pages = {1178--1185},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/EURMIC.1999.794464},
doi = {10.1109/EURMIC.1999.794464},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euromicro/Sato99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/Sato99,
author = {Toshinori Sato},
editor = {Patrick Amestoy and
Philippe Berger and
Michel J. Dayd{\'{e}} and
Iain S. Duff and
Val{\'{e}}rie Frayss{\'{e}} and
Luc Giraud and
Daniel Ruiz},
title = {Decoupling Recovery Mechanism for Data Speculation from Dynamic Instruction
Scheduling Structure},
booktitle = {Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference,
Toulouse, France, August 31 - September 3, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1685},
pages = {1281--1290},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/3-540-48311-X\_182},
doi = {10.1007/3-540-48311-X\_182},
timestamp = {Tue, 04 Jun 2019 14:36:07 +0200},
biburl = {https://dblp.org/rec/conf/europar/Sato99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/Sato99,
author = {Toshinori Sato},
editor = {Constantine D. Polychronopoulos and
Kazuki Joe and
Akira Fukuda and
Shinji Tomita},
title = {Profile-Based Selection of Load Value and Address Predictors},
booktitle = {High Performance Computing, Second International Symposium, ISHPC'99,
Kyoto, Japan, May 26-28, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1615},
pages = {17--28},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/BFb0094908},
doi = {10.1007/BFB0094908},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ishpc/Sato99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euromicro/Sato98,
author = {Toshinori Sato},
title = {Data Dependence Speculation Using Data Address Prediction and its
Enhancement with Instruction Reissue},
booktitle = {24th {EUROMICRO} '98 Conference, Engineering Systems and Software
for the Next Decade, 25-27 August 1998, Vesteras, Sweden},
pages = {10285--10292},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/EURMIC.1998.711812},
doi = {10.1109/EURMIC.1998.711812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euromicro/Sato98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ishpc/Sato97,
author = {Toshinori Sato},
editor = {Constantine D. Polychronopoulos and
Kazuki Joe and
Keijiro Araki and
Makoto Amamiya},
title = {Data Dependence Path Reductio with Tunneling Load Instructions},
booktitle = {High Performance Computing, International Symposium, ISHPC'97, Fukuoka,
Japan, November 4-6, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1336},
pages = {119--130},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/BFb0024210},
doi = {10.1007/BFB0024210},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ishpc/Sato97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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