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ORCIDBibTeX records: Carlo Samori
@article{DBLP:journals/tcasII/ZanolettiSBRRBSB24,
author = {Gabriele Zanoletti and
Lorenzo Scaletti and
Gabriele B{\`{e}} and
Luca Ricci and
Michele Rocco and
Luca Bertulessi and
Carlo Samori and
Andrea Bonfanti},
title = {A 250-MS/s 9.9-ENOB 80.7 dB-SFDR Top-Plate Input {SAR} {ADC} With
Charge Linearization},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {71},
number = {3},
pages = {1551--1555},
year = {2024},
url = {https://doi.org/10.1109/TCSII.2023.3336943},
doi = {10.1109/TCSII.2023.3336943},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasII/ZanolettiSBRRBSB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/RossoniDTCDSLL24,
author = {Michele Rossoni and
Simone Mattia Dartizio and
Francesco Tesolin and
Giacomo Castoro and
Riccardo Dell'Orto and
Carlo Samori and
Andrea Leonardo Lacaita and
Salvatore Levantino},
title = {10.1 An 8.75GHz Fractional-N Digital {PLL} with a Reverse-Concavity
Variable-Slope {DTC} Achieving 57.3fsrms Integrated Jitter and -252.4dB
FoM},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
San Francisco, CA, USA, February 18-22, 2024},
pages = {188--190},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454388},
doi = {10.1109/ISSCC49657.2024.10454388},
timestamp = {Tue, 19 Mar 2024 09:04:31 +0100},
biburl = {https://dblp.org/rec/conf/isscc/RossoniDTCDSLL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TesolinDCBRCSLL24,
author = {Francesco Tesolin and
Simone Mattia Dartizio and
Giacomo Castoro and
Francesco Buccoleri and
Michele Rossoni and
Dmytro Cherniak and
Carlo Samori and
Andrea Leonardo Lacaita and
Salvatore Levantino},
title = {10.6 {A} 10GHz {FMCW} Modulator Achieving 680MHz/{\(\mu\)}s Chirp
Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a
Non-Uniform Piecewise-Parabolic Digital Predistortion},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2024,
San Francisco, CA, USA, February 18-22, 2024},
pages = {198--200},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISSCC49657.2024.10454289},
doi = {10.1109/ISSCC49657.2024.10454289},
timestamp = {Tue, 19 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/TesolinDCBRCSLL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BuccoleriDTASISCBBSLL23,
author = {Francesco Buccoleri and
Simone Mattia Dartizio and
Francesco Tesolin and
Luca Avallone and
Alessio Santiccioli and
Agata Iesurum and
Giovanni Steffan and
Dmytro Cherniak and
Luca Bertulessi and
Andrea Bevilacqua and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital {PLL}
With Digital Period Averaging Calibration on Frequency Quadrupler
and True-in-Phase Combiner},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {3},
pages = {634--646},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2022.3228899},
doi = {10.1109/JSSC.2022.3228899},
timestamp = {Sat, 11 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/BuccoleriDTASISCBBSLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TesolinDBSBSLL23,
author = {Francesco Tesolin and
Simone Mattia Dartizio and
Francesco Buccoleri and
Alessio Santiccioli and
Luca Bertulessi and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A Novel {LO} Phase-Shifting System Based on Digital Bang-Bang PLLs
With Background Phase-Offset Correction for Integrated Phased Arrays},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {9},
pages = {2466--2477},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2023.3272483},
doi = {10.1109/JSSC.2023.3272483},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TesolinDBSBSLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DartizioTCBRCSLL23,
author = {Simone Mattia Dartizio and
Francesco Tesolin and
Giacomo Castoro and
Francesco Buccoleri and
Michele Rossoni and
Dmytro Cherniak and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A Low-Spur and Low-Jitter Fractional-N Digital {PLL} Based on an Inverse-Constant-Slope
{DTC} and {FCW} Subtractive Dithering},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {12},
pages = {3320--3337},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2023.3311681},
doi = {10.1109/JSSC.2023.3311681},
timestamp = {Sun, 10 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/DartizioTCBRCSLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/DartizioTCBLRCBSLL23,
author = {Simone Mattia Dartizio and
Francesco Tesolin and
Giacomo Castoro and
Francesco Buccoleri and
Luca Lanzoni and
Michele Resson and
Dmytro Cherniak and
Luca Bertulessi and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 76.7fs-lntegrated-Jitter and -71.9dBc In-Band Fractional-Spur Bang-Bang
Digital {PLL} Based on an Inverse-Constant-Slope {DTC} and {FCW} Subtractive
Dithering},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
San Francisco, CA, USA, February 19-23, 2023},
pages = {78--79},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISSCC42615.2023.10067719},
doi = {10.1109/ISSCC42615.2023.10067719},
timestamp = {Wed, 29 Mar 2023 15:53:39 +0200},
biburl = {https://dblp.org/rec/conf/isscc/DartizioTCBLRCBSLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/CastoroDTBRCBSLL23,
author = {Giacomo Castoro and
Simone Mattia Dartizio and
Francesco Tesolin and
Francesco Buccoleri and
Michele Rossoni and
Dmytro Cherniak and
Luca Bertulessi and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 9.25GHz Digital {PLL} with Fractional-Spur Cancellation Based on
a Multi-DTC Topology},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2023,
San Francisco, CA, USA, February 19-23, 2023},
pages = {82--83},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISSCC42615.2023.10067351},
doi = {10.1109/ISSCC42615.2023.10067351},
timestamp = {Wed, 29 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/CastoroDTBRCBSLL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/RicciSBRBLLSB23,
author = {Luca Ricci and
Lorenzo Scaletti and
Gabriele B{\`{e}} and
Michele Rocco and
Luca Bertulessi and
Salvatore Levantino and
Andrea L. Lacaita and
Carlo Samori and
Andrea Bonfanti},
title = {A 2GS/s 11b 8x Interleaved {ADC} with 9.2 {ENOB} and 69.9dB {SFDR}
in 28nm {CMOS}},
booktitle = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
and Circuits), Kyoto, Japan, June 11-16, 2023},
pages = {1--2},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185370},
doi = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185370},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsit/RicciSBRBLLSB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MercandelliSPBC22,
author = {Mario Mercandelli and
Alessio Santiccioli and
Angelo Parisi and
Luca Bertulessi and
Dmytro Cherniak and
Andrea L. Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {A 12.5-GHz Fractional-N Type-I Sampling {PLL} Achieving 58-fs Integrated
Jitter},
journal = {{IEEE} J. Solid State Circuits},
volume = {57},
number = {2},
pages = {505--517},
year = {2022},
url = {https://doi.org/10.1109/JSSC.2021.3123827},
doi = {10.1109/JSSC.2021.3123827},
timestamp = {Tue, 08 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/MercandelliSPBC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DartizioTMSSKBB22,
author = {Simone Mattia Dartizio and
Francesco Tesolin and
Mario Mercandelli and
Alessio Santiccioli and
Abanob Shehata and
Saleh Karman and
Luca Bertulessi and
Francesco Buccoleri and
Luca Avallone and
Angelo Parisi and
Andrea L. Lacaita and
Michael Peter Kennedy and
Carlo Samori and
Salvatore Levantino},
title = {A 12.9-to-15.1-GHz Digital {PLL} Based on a Bang-Bang Phase Detector
With Adaptively Optimized Noise Shaping},
journal = {{IEEE} J. Solid State Circuits},
volume = {57},
number = {6},
pages = {1723--1735},
year = {2022},
url = {https://doi.org/10.1109/JSSC.2021.3116860},
doi = {10.1109/JSSC.2021.3116860},
timestamp = {Thu, 02 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/DartizioTMSSKBB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/DartizioBTASISC22,
author = {Simone Mattia Dartizio and
Francesco Buccoleri and
Francesco Tesolin and
Luca Avallone and
Alessio Santiccioli and
Agata Iesurum and
Giovanni Steffan and
Dmytro Cherniak and
Luca Bertulessi and
Andrea Bevilacqua and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A Fractional-N Bang-Bang {PLL} Based on Type-II Gear Shifting and
Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter
and 1.56 {\(\mu\)}s-Locking-Time},
journal = {{IEEE} J. Solid State Circuits},
volume = {57},
number = {12},
pages = {3538--3551},
year = {2022},
url = {https://doi.org/10.1109/JSSC.2022.3206955},
doi = {10.1109/JSSC.2022.3206955},
timestamp = {Mon, 05 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/DartizioBTASISC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/BertulessiCMSLL22,
author = {Luca Bertulessi and
Dmytro Cherniak and
Mario Mercandelli and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {Novel Feed-Forward Technique for Digital Bang-Bang {PLL} to Achieve
Fast Lock and Low Phase Noise},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {69},
number = {5},
pages = {1858--1870},
year = {2022},
url = {https://doi.org/10.1109/TCSI.2022.3146788},
doi = {10.1109/TCSI.2022.3146788},
timestamp = {Wed, 18 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/BertulessiCMSLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/BePBRSMLLSB22,
author = {Gabriele B{\`{e}} and
Angelo Parisi and
Luca Bertulessi and
Luca Ricci and
Lorenzo Scaletti and
Mario Mercandelli and
Andrea L. Lacaita and
Salvatore Levantino and
Carlo Samori and
Andrea Bonfanti},
title = {A 900-MS/s SAR-Based Time-Interleaved {ADC} With a Fully Programmable
Interleaving Factor and On-Chip Scalable Background Calibrations},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {69},
number = {9},
pages = {3645--3649},
year = {2022},
url = {https://doi.org/10.1109/TCSII.2022.3182217},
doi = {10.1109/TCSII.2022.3182217},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/BePBRSMLLSB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/BuccoleriDTASLS22,
author = {Francesco Buccoleri and
Simone Mattia Dartizio and
Francesco Tesolin and
Luca Avallone and
Alessio Santiccioli and
Agata Iesurum and
Giovanni Steffan and
Andrea Bevilacqua and
Luca Bertulessi and
Dmytro Cherniak and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital {PLL} with
Calibrated Frequency Quadrupler},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2022, Newport
Beach, CA, USA, April 24-27, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/CICC53496.2022.9772796},
doi = {10.1109/CICC53496.2022.9772796},
timestamp = {Fri, 05 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/BuccoleriDTASLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RicciSBBLSB22,
author = {Luca Ricci and
Lorenzo Scaletti and
Gabriele B{\`{e}} and
Luca Bertulessi and
Salvatore Levantino and
Carlo Samori and
Andrea Bonfanti},
title = {Concurrent Effect of Redundancy and Switching Algorithms in {SAR}
ADCs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2022,
Austin, TX, USA, May 27 - June 1, 2022},
pages = {900--904},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937809},
doi = {10.1109/ISCAS48785.2022.9937809},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RicciSBBLSB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/DartizioBTASISC22,
author = {Simone Mattia Dartizio and
Francesco Buccoleri and
Francesco Tesolin and
Luca Avallone and
Alessio Santiccioli and
Agata Iesurum and
Giovanni Steffan and
Dmytro Cherniak and
Luca Bertulessi and
Andrea Bevilacqua and
Carlo Samori and
Andrea Leonardo Lacaita and
Salvatore Levantino},
title = {A 68.6fs\({}_{\mbox{rms}}\)-Total-integrated-Jitter and 1.5{\(\mathrm{\mu}\)}s-LocKing-Time
Fractional-N Bang-Bang {PLL} Based on Type-II Gear Shifting and Adaptive
Frequency Switching},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
San Francisco, CA, USA, February 20-26, 2022},
pages = {1--3},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISSCC42614.2022.9731683},
doi = {10.1109/ISSCC42614.2022.9731683},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/DartizioBTASISC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/newcas/ScalettiBPBRMLS22,
author = {Lorenzo Scaletti and
Gabriele B{\`{e}} and
Angelo Parisi and
Luca Bertulessi and
Luca Ricci and
Mario Mercandelli and
Salvatore Levantino and
Carlo Samori and
Andrea Bonfanti},
title = {A 10.2-ENOB, 150-MS/s Redundant {SAR} {ADC} With a Quasi-Monotonic
Switching Algorithm for Time-Interleaved Converters},
booktitle = {20th {IEEE} Interregional {NEWCAS} Conference, {NEWCAS} 2022, Quebec
City, QC, Canada, June 19-22, 2022},
pages = {20--24},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/NEWCAS52662.2022.9842195},
doi = {10.1109/NEWCAS52662.2022.9842195},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/newcas/ScalettiBPBRMLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/KarmanTLS21,
author = {Saleh Karman and
Francesco Tesolin and
Salvatore Levantino and
Carlo Samori},
title = {A Novel Topology of Coupled Phase-Locked Loops},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {3},
pages = {989--997},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2020.3043466},
doi = {10.1109/TCSI.2020.3043466},
timestamp = {Wed, 07 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/KarmanTLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/AvalloneMSKLS21,
author = {Luca Avallone and
Mario Mercandelli and
Alessio Santiccioli and
Michael Peter Kennedy and
Salvatore Levantino and
Carlo Samori},
title = {A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {7},
pages = {2775--2786},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2021.3072344},
doi = {10.1109/TCSI.2021.3072344},
timestamp = {Tue, 15 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasI/AvalloneMSKLS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asscc/MercandelliBSL21,
author = {Mario Mercandelli and
Luca Bertulessi and
Carlo Samori and
Salvatore Levantino},
title = {A 3.7-to-4.1GHz Narrowband Digital Bang-Bang {PLL} with a Multitaps
{LMS} Algorithm to Automatically Control the Bandwidth Achieving 183fs
Integrated Jitter},
booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2021, Busan,
Korea, Republic of, November 7-10, 2021},
pages = {1--3},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/A-SSCC53895.2021.9634706},
doi = {10.1109/A-SSCC53895.2021.9634706},
timestamp = {Tue, 21 Dec 2021 17:54:16 +0100},
biburl = {https://dblp.org/rec/conf/asscc/MercandelliBSL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/SamoriB21,
author = {Carlo Samori and
Luca Bertulessi},
title = {Digital PLLs: the modern timing reference for radar and communication
systems},
booktitle = {47th {ESSCIRC} 2021 - European Solid State Circuits Conference, {ESSCIR}
2021, Grenoble, France, September 13-22, 2021},
pages = {21--27},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ESSCIRC53450.2021.9567810},
doi = {10.1109/ESSCIRC53450.2021.9567810},
timestamp = {Thu, 28 Oct 2021 16:11:37 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/SamoriB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/ParisiMSL21,
author = {Angelo Parisi and
Mario Mercandelli and
Carlo Samori and
Andrea L. Lacaita},
title = {A PLL-Based Digital Technique for Orthogonal Correction of {ADC} Non-Linearity},
booktitle = {28th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2021, Dubai, United Arab Emirates, November 28 -
Dec. 1, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICECS53924.2021.9665564},
doi = {10.1109/ICECS53924.2021.9665564},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/ParisiMSL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MercandelliSDST21,
author = {Mario Mercandelli and
Alessio Santiccioli and
Simone Mattia Dartizio and
Abanob Shehata and
Francesco Tesolin and
Saleh Karman and
Luca Bertulessi and
Francesco Buccoleri and
Luca Avallone and
Angelo Parisi and
Andrea Leonardo Lacaita and
Michael Peter Kennedy and
Carlo Samori and
Salvatore Levantino},
title = {A 12.9-to-15.1GHz Digital {PLL} Based on a Bang-Bang Phase Detector
with Adaptively Optimized Noise Shaping Achieving 107.6fs Integrated
Jitter},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {445--447},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365768},
doi = {10.1109/ISSCC42613.2021.9365768},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/MercandelliSDST21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SanticcioliMDTK21,
author = {Alessio Santiccioli and
Mario Mercandelli and
Simone Mattia Dartizio and
Francesco Tesolin and
Saleh Karman and
Abanob Shehata and
Luca Bertulessi and
Francesco Buccoleri and
Luca Avallone and
Angelo Parisi and
Dmytro Cherniak and
Andrea L. Lacaita and
Michael Peter Kennedy and
Carlo Samori and
Salvatore Levantino},
title = {32.8 {A} 98.4fs-Jitter 12.9-to-15.1GHz PLL-Based {LO} Phase-Shifting
System with Digital Background Phase-Offset Correction for Integrated
Phased Arrays},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2021,
San Francisco, CA, USA, February 13-22, 2021},
pages = {456--458},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISSCC42613.2021.9365972},
doi = {10.1109/ISSCC42613.2021.9365972},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SanticcioliMDTK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SanticcioliMBPC20,
author = {Alessio Santiccioli and
Mario Mercandelli and
Luca Bertulessi and
Angelo Parisi and
Dmytro Cherniak and
Andrea L. Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang {PLL} With
Digital Frequency-Error Recovery for Fast Locking},
journal = {{IEEE} J. Solid State Circuits},
volume = {55},
number = {12},
pages = {3349--3361},
year = {2020},
url = {https://doi.org/10.1109/JSSC.2020.3019344},
doi = {10.1109/JSSC.2020.3019344},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/SanticcioliMBPC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/AvalloneKKSL20,
author = {Luca Avallone and
Michael Peter Kennedy and
Saleh Karman and
Carlo Samori and
Salvatore Levantino},
title = {Jitter Minimization in Digital PLLs with Mid-Rise TDCs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {67-I},
number = {3},
pages = {743--752},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2019.2959252},
doi = {10.1109/TCSI.2019.2959252},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/AvalloneKKSL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SanticcioliMBPC20,
author = {Alessio Santiccioli and
Mario Mercandelli and
Luca Bertulessi and
Angelo Parisi and
Dmytro Cherniak and
Andrea Leonardo Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {17.2 {A} 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang {PLL}
with Digital Frequency-Error Recovery for Fast Locking},
booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
2020, San Francisco, CA, USA, February 16-20, 2020},
pages = {268--270},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISSCC19947.2020.9063094},
doi = {10.1109/ISSCC19947.2020.9063094},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/SanticcioliMBPC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MercandelliSPBC20,
author = {Mario Mercandelli and
Alessio Santiccioli and
Angelo Parisi and
Luca Bertulessi and
Dmytro Cherniak and
Andrea Leonardo Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {17.5 {A} 12.5GHz Fractional-N Type-I Sampling {PLL} Achieving 58fs
Integrated Jitter},
booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC}
2020, San Francisco, CA, USA, February 16-20, 2020},
pages = {274--276},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISSCC19947.2020.9063135},
doi = {10.1109/ISSCC19947.2020.9063135},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/MercandelliSPBC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SanticcioliMLSL19,
author = {Alessio Santiccioli and
Mario Mercandelli and
Andrea L. Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {A 1.6-to-3.0-GHz Fractional-N {MDLL} With a Digital-to-Time Converter
Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW Power},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {11},
pages = {3149--3160},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2019.2941259},
doi = {10.1109/JSSC.2019.2941259},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SanticcioliMLSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BertulessiKCGSL19,
author = {Luca Bertulessi and
Saleh Karman and
Dmytro Cherniak and
Alessandro Garghetti and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 30-GHz Digital Sub-Sampling Fractional- {\textdollar}N{\textdollar}
{PLL} With -238.6-dB Jitter-Power Figure of Merit in 65-nm {LP} {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {54},
number = {12},
pages = {3493--3502},
year = {2019},
url = {https://doi.org/10.1109/JSSC.2019.2940332},
doi = {10.1109/JSSC.2019.2940332},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/BertulessiKCGSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/SanticcioliSLL19,
author = {Alessio Santiccioli and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {Time-Variant Modeling and Analysis of Multiplying Delay-Locked Loops},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {10},
pages = {3775--3785},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2918027},
doi = {10.1109/TCSI.2019.2918027},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/SanticcioliSLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/CherniakSL19,
author = {Dmytro Cherniak and
Carlo Samori and
Salvatore Levantino},
title = {Digitally-Intensive Fast Frequency Modulators for {FMCW} Radars in
{CMOS} : (Invited Paper)},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2019, Austin,
TX, USA, April 14-17, 2019},
pages = {1--8},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/CICC.2019.8780146},
doi = {10.1109/CICC.2019.8780146},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/CherniakSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/SanticcioliMLSL19,
author = {Alessio Santiccioli and
Mario Mercandelli and
Andrea L. Lacaita and
Carlo Samori and
Salvatore Levantino},
title = {A 1.6-to-3.0-GHz Fractional-N {MDLL} with a Digital-to-Time Converter
Range-Reduction Technique Achieving 397fs Jitter at 2.5-mW Power},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2019, Austin,
TX, USA, April 14-17, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/CICC.2019.8780235},
doi = {10.1109/CICC.2019.8780235},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/SanticcioliMLSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/GrimaldiBKCGSLL19,
author = {Luigi Grimaldi and
Luca Bertulessi and
Saleh Karman and
Dmytro Cherniak and
Alessandro Garghetti and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A 30GHz Digital Sub-Sampling Fractional-N {PLL} with 198fsrms Jitter
in 65nm {LP} {CMOS}},
booktitle = {{IEEE} International Solid- State Circuits Conference, {ISSCC} 2019,
San Francisco, CA, USA, February 17-21, 2019},
pages = {268--270},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISSCC.2019.8662411},
doi = {10.1109/ISSCC.2019.8662411},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/GrimaldiBKCGSLL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MercandelliGBSL18,
author = {Mario Mercandelli and
Luigi Grimaldi and
Luca Bertulessi and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A Background Calibration Technique to Control the Bandwidth of Digital
PLLs},
journal = {{IEEE} J. Solid State Circuits},
volume = {53},
number = {11},
pages = {3243--3255},
year = {2018},
url = {https://doi.org/10.1109/JSSC.2018.2866454},
doi = {10.1109/JSSC.2018.2866454},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/MercandelliGBSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/CherniakGBNSL18,
author = {Dmytro Cherniak and
Luigi Grimaldi and
Luca Bertulessi and
Roberto Nonis and
Carlo Samori and
Salvatore Levantino},
title = {A 23-GHz Low-Phase-Noise Digital Bang-Bang {PLL} for Fast Triangular
and Sawtooth Chirp Modulation},
journal = {{IEEE} J. Solid State Circuits},
volume = {53},
number = {12},
pages = {3565--3575},
year = {2018},
url = {https://doi.org/10.1109/JSSC.2018.2869097},
doi = {10.1109/JSSC.2018.2869097},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/CherniakGBNSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/CherniakSNL18,
author = {Dmytro Cherniak and
Carlo Samori and
Roberto Nonis and
Salvatore Levantino},
title = {PLL-Based Wideband Frequency Modulator: Two-Point Injection Versus
Pre-Emphasis Technique},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {3},
pages = {914--924},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2017.2763581},
doi = {10.1109/TCSI.2017.2763581},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/CherniakSNL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CherniakGSL18,
author = {Dmytro Cherniak and
Luigi Grimaldi and
Carlo Samori and
Salvatore Levantino},
title = {Adaptive Digital Pre-Emphasis for PLL-Based {FMCW} Modulators},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351846},
doi = {10.1109/ISCAS.2018.8351846},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/CherniakGSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TruppiSLLRS18,
author = {Alessandro Truppi and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino and
Marco Ronchi and
Marco Sosio},
title = {Impact of {CMOS} Scaling on Switched-Capacitor Power Amplifiers},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351752},
doi = {10.1109/ISCAS.2018.8351752},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/TruppiSLLRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VoSL18,
author = {Tuan Minh Vo and
Carlo Samori and
Salvatore Levantino},
title = {A Novel LMS-Based Calibration Scheme for Fractional-N Digital PLLs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351321},
doi = {10.1109/ISCAS.2018.8351321},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/VoSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/CherniakGBSNL18,
author = {Dmytro Cherniak and
Luigi Grimaldi and
Luca Bertulessi and
Carlo Samori and
Roberto Nonis and
Salvatore Levantino},
title = {A 23GHz low-phase-noise digital bang-bang {PLL} for fast triangular
and saw-tooth chirp modulation},
booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2018, San Francisco, CA, USA, February 11-15, 2018},
pages = {248--250},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISSCC.2018.8310277},
doi = {10.1109/ISSCC.2018.8310277},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/CherniakGBSNL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/BertulessiGCSL18,
author = {Luca Bertulessi and
Luigi Grimaldi and
Dmytro Cherniak and
Carlo Samori and
Salvatore Levantino},
title = {A low-phase-noise digital bang-bang {PLL} with fast lock over a wide
lock range},
booktitle = {2018 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2018, San Francisco, CA, USA, February 11-15, 2018},
pages = {252--254},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISSCC.2018.8310279},
doi = {10.1109/ISSCC.2018.8310279},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/BertulessiGCSL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChemiakLSN17,
author = {Dmytro Chemiak and
Salvatore Levantino and
Carlo Samori and
Roberto Nonis},
title = {Analysis of millimeter-wave digital frequency modulators for ubiquitous
sensors and radars},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
Baltimore, MD, USA, May 28-31, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISCAS.2017.8050549},
doi = {10.1109/ISCAS.2017.8050549},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ChemiakLSN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/VoSLL17,
author = {Tuan Minh Vo and
Carlo Samori and
Andrea L. Lacaita and
Salvatore Levantino},
title = {A novel segmentation scheme for DTC-based {\(\Delta\)}{\(\Sigma\)}
fractional-N {PLL}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2017,
Baltimore, MD, USA, May 28-31, 2017},
pages = {1--4},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ISCAS.2017.8050285},
doi = {10.1109/ISCAS.2017.8050285},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/VoSLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoMMFSL15,
author = {Salvatore Levantino and
Giovanni Marucci and
Giovanni Marzin and
Andrea Fenaroli and
Carlo Samori and
Andrea L. Lacaita},
title = {A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying
Delay-Locked Loop},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {11},
pages = {2678--2691},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2015.2473667},
doi = {10.1109/JSSC.2015.2473667},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoMMFSL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LinSSS15,
author = {Tsung{-}Hsien Lin and
Carlo Samori and
Richard Schreier},
title = {{EP2:} Lost art? Analog tricks and techniques from the masters},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7063151},
doi = {10.1109/ISSCC.2015.7063151},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/LinSSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoMS14,
author = {Salvatore Levantino and
Giovanni Marzin and
Carlo Samori},
title = {An Adaptive Pre-Distortion Technique to Mitigate the {DTC} Nonlinearity
in Digital PLLs},
journal = {{IEEE} J. Solid State Circuits},
volume = {49},
number = {8},
pages = {1762--1772},
year = {2014},
url = {https://doi.org/10.1109/JSSC.2014.2314436},
doi = {10.1109/JSSC.2014.2314436},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoMS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/NagataBSMH14,
author = {Makoto Nagata and
Lucien J. Breems and
Carlo Samori and
Sven Mattisson and
Pavan Kumar Hanumolu},
title = {Introduction to the Special Issue on the 2014 {IEEE} International
Solid-State Circuits Conference {(ISSCC)}},
journal = {{IEEE} J. Solid State Circuits},
volume = {49},
number = {12},
pages = {2743--2747},
year = {2014},
url = {https://doi.org/10.1109/JSSC.2014.2366411},
doi = {10.1109/JSSC.2014.2366411},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/NagataBSMH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MarucciLMS14,
author = {Giovanni Marucci and
Salvatore Levantino and
Paolo Maffezzoni and
Carlo Samori},
title = {Analysis and Design of Low-Jitter Digital Bang-Bang Phase-Locked Loops},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {1},
pages = {26--36},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2013.2268514},
doi = {10.1109/TCSI.2013.2268514},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MarucciLMS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MarzinLSL14,
author = {Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {2.9 {A} Background calibration technique to control bandwidth in digital
PLLs},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {54--55},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757335},
doi = {10.1109/ISSCC.2014.6757335},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isscc/MarzinLSL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MarucciFMLSL14,
author = {Giovanni Marucci and
Andrea Fenaroli and
Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {21.1 {A} 1.7GHz MDLL-based fractional-N frequency synthesizer with
1.4ps {RMS} integrated jitter and 3mW power using a 1b {TDC}},
booktitle = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
{ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
February 9-13, 2014},
pages = {360--361},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISSCC.2014.6757469},
doi = {10.1109/ISSCC.2014.6757469},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/MarucciFMLSL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PepeBLSL13,
author = {Federico Pepe and
Andrea Bonfanti and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Suppression of Flicker Noise Up-Conversion in a 65-nm {CMOS} {VCO}
in the 3.0-to-3.6 GHz Band},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {10},
pages = {2375--2389},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2273181},
doi = {10.1109/JSSC.2013.2273181},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/PepeBLSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoMSL13,
author = {Salvatore Levantino and
Giovanni Marzin and
Carlo Samori and
Andrea L. Lacaita},
title = {A Wideband Fractional-N {PLL} With Suppressed Charge-Pump Noise and
Automatic Loop Filter Calibration},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {10},
pages = {2419--2429},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2273836},
doi = {10.1109/JSSC.2013.2273836},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoMSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MarucciLMS13,
author = {Giovanni Marucci and
Salvatore Levantino and
Paolo Maffezzoni and
Carlo Samori},
title = {Exploiting Stochastic Resonance to Enhance the Performance of Digital
Bang-Bang PLLs},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {60-II},
number = {10},
pages = {632--636},
year = {2013},
url = {https://doi.org/10.1109/TCSII.2013.2273732},
doi = {10.1109/TCSII.2013.2273732},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MarucciLMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/LevantinoS13,
author = {Salvatore Levantino and
Carlo Samori},
title = {Nonlinearity cancellation in digital PLLs (Invited paper)},
booktitle = {Proceedings of the {IEEE} 2013 Custom Integrated Circuits Conference,
{CICC} 2013, San Jose, CA, USA, September 22-25, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CICC.2013.6658472},
doi = {10.1109/CICC.2013.6658472},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/LevantinoS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MarzinFMLSL13,
author = {Giovanni Marzin and
Andrea Fenaroli and
Giovanni Marucci and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A spur cancellation technique for MDLL-based frequency synthesizers},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {165--168},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6571808},
doi = {10.1109/ISCAS.2013.6571808},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MarzinFMLSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MarucciLMS13,
author = {Giovanni Marucci and
Salvatore Levantino and
Paolo Maffezzoni and
Carlo Samori},
title = {Minimum-jitter design of bang-bang PLLs in the presence of 1/f\({}^{\mbox{2}}\)
and 1/f\({}^{\mbox{3}}\) {DCO} noise},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {173--176},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6571810},
doi = {10.1109/ISCAS.2013.6571810},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MarucciLMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/FenaroliLSL13,
author = {Andrea Fenaroli and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Background adaptive linearization of high-speed digital-to-analog
Converters},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {582--585},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6571909},
doi = {10.1109/ISCAS.2013.6571909},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/FenaroliLSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MarucciLMS13a,
author = {Giovanni Marucci and
Salvatore Levantino and
Paolo Maffezzoni and
Carlo Samori},
title = {An efficient method to compute phase-noise in injection-locked frequency
dividers},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {1753--1756},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572204},
doi = {10.1109/ISCAS.2013.6572204},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MarucciLMS13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/PepeBLMSL13,
author = {Federico Pepe and
Andrea Bonfanti and
Salvatore Levantino and
Paolo Maffezzoni and
Carlo Samori and
Andrea L. Lacaita},
title = {Simulating phase noise induced from cyclostationary noise sources},
booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013),
Beijing, China, May 19-23, 2013},
pages = {2686--2689},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISCAS.2013.6572432},
doi = {10.1109/ISCAS.2013.6572432},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/PepeBLMSL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/MarzinLSL12,
author = {Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 20 Mb/s Phase Modulator Based on a 3.6 GHz Digital {PLL} With -36
dB {EVM} at 5 mW Power},
journal = {{IEEE} J. Solid State Circuits},
volume = {47},
number = {12},
pages = {2974--2988},
year = {2012},
url = {https://doi.org/10.1109/JSSC.2012.2217854},
doi = {10.1109/JSSC.2012.2217854},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/MarzinLSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BonfantiPSL12,
author = {Andrea Bonfanti and
Federico Pepe and
Carlo Samori and
Andrea L. Lacaita},
title = {Flicker Noise Up-Conversion due to Harmonic Distortion in Van der
Pol {CMOS} Oscillators},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {59-I},
number = {7},
pages = {1418--1430},
year = {2012},
url = {https://doi.org/10.1109/TCSI.2011.2177132},
doi = {10.1109/TCSI.2011.2177132},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BonfantiPSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LevantinoMPBSL12,
author = {Salvatore Levantino and
Paolo Maffezzoni and
Federico Pepe and
Andrea Bonfanti and
Carlo Samori and
Andrea L. Lacaita},
title = {Efficient Calculation of the Impulse Sensitivity Function in Oscillators},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {59-II},
number = {10},
pages = {628--632},
year = {2012},
url = {https://doi.org/10.1109/TCSII.2012.2208679},
doi = {10.1109/TCSII.2012.2208679},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LevantinoMPBSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MarzinLSL12,
author = {Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 20Mb/s phase modulator based on a 3.6GHz digital {PLL} with -36dB
{EVM} at 5mW power},
booktitle = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2012, San Francisco, CA, USA, February 19-23, 2012},
pages = {342--344},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISSCC.2012.6177007},
doi = {10.1109/ISSCC.2012.6177007},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/MarzinLSL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZanusoLSL11,
author = {Marco Zanuso and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A Wideband 3.6 GHz Digital {\(\Delta\)}{\(\Sigma\)} Fractional-N {PLL}
With Phase Interpolation Divider and Digital Spur Cancellation},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {3},
pages = {627--638},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2010.2104270},
doi = {10.1109/JSSC.2010.2104270},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ZanusoLSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TascaZMLSL11,
author = {Davide Tasca and
Marco Zanuso and
Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 2.9-4.0-GHz Fractional-N Digital {PLL} With Bang-Bang Phase Detector
and 560-fs\({}_{\mbox{rms}}\) Integrated Jitter at 4.5-mW Power},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {12},
pages = {2745--2758},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2011.2162917},
doi = {10.1109/JSSC.2011.2162917},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TascaZMLSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/TascaZLSL11,
author = {Davide Tasca and
Marco Zanuso and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Low-Power Divider Retiming in a 3-4 GHz Fractional-N {PLL}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {58-II},
number = {4},
pages = {200--204},
year = {2011},
url = {https://doi.org/10.1109/TCSII.2011.2124510},
doi = {10.1109/TCSII.2011.2124510},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/TascaZLSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/MaffezzoniLSLDS11,
author = {Paolo Maffezzoni and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita and
Dario D'Amore and
Mauro Santomauro},
title = {Behavioral phase-noise analysis of charge-pump phase-locked loops},
booktitle = {20th European Conference on Circuit Theory and Design, {ECCTD} 2011,
Linkoping, Sweden, Aug. 29-31, 2011},
pages = {357--360},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ECCTD.2011.6043360},
doi = {10.1109/ECCTD.2011.6043360},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecctd/MaffezzoniLSLDS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SamoriZLL11,
author = {Carlo Samori and
Marco Zanuso and
Salvatore Levantino and
Andrea L. Lacaita},
title = {Multipath adaptive cancellation of divider non-linearity in fractional-N
PLLs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {418--421},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937591},
doi = {10.1109/ISCAS.2011.5937591},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SamoriZLL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TascaZMLSL11,
author = {Davide Tasca and
Marco Zanuso and
Giovanni Marzin and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 2.9-to-4.0GHz fractional-N digital {PLL} with bang-bang phase detector
and 560fsrms integrated jitter at 4.5mW power},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {88--90},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746231},
doi = {10.1109/ISSCC.2011.5746231},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/TascaZMLSL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ejes/LevantinoZMTSL10,
author = {Salvatore Levantino and
Marco Zanuso and
Paolo Madoglio and
Davide Tasca and
Carlo Samori and
Andrea L. Lacaita},
title = {{AD-PLL} for WiMAX with Digitally-Regulated {TDC} and Glitch Correction
Logic},
journal = {{EURASIP} J. Embed. Syst.},
volume = {2010},
year = {2010},
url = {https://doi.org/10.1155/2010/175764},
doi = {10.1155/2010/175764},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ejes/LevantinoZMTSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZanusoMLSL10,
author = {Marco Zanuso and
Paolo Madoglio and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Time-to-Digital Converter for Frequency Synthesis Based on a Digital
Bang-Bang {DLL}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {57-I},
number = {3},
pages = {548--555},
year = {2010},
url = {https://doi.org/10.1109/TCSI.2009.2023945},
doi = {10.1109/TCSI.2009.2023945},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZanusoMLSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LevantinoCSL10,
author = {Salvatore Levantino and
Luca Collamati and
Carlo Samori and
Andrea L. Lacaita},
title = {Folding of Phase Noise Spectra in Charge-Pump Phase-Locked Loops Induced
by Frequency Division},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {57-II},
number = {9},
pages = {671--675},
year = {2010},
url = {https://doi.org/10.1109/TCSII.2010.2056072},
doi = {10.1109/TCSII.2010.2056072},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LevantinoCSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ZanusoLPSL10,
author = {Marco Zanuso and
Salvatore Levantino and
Alberto Puggelli and
Carlo Samori and
Andrea L. Lacaita},
title = {Time-to-digital converter with 3-ps resolution and digital linearization
algorithm},
booktitle = {36th European Solid-State Circuits Conference, {ESSCIRC} 2010, Sevilla,
Spain, September 13-17, 2010},
pages = {262--265},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ESSCIRC.2010.5619879},
doi = {10.1109/ESSCIRC.2010.5619879},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/ZanusoLPSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LevantinoZSL10,
author = {Salvatore Levantino and
Marco Zanuso and
Carlo Samori and
Andrea L. Lacaita},
title = {Suppression of flicker noise upconversion in a 65nm {CMOS} {VCO} in
the 3.0-to-3.6GHz band},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {50--51},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5434054},
doi = {10.1109/ISSCC.2010.5434054},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/LevantinoZSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ZanusoLSL10,
author = {Marco Zanuso and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 3MHz-BW 3.6GHz digital fractional-N {PLL} with sub-gate-delay TDC,
phase-interpolation divider, and digital mismatch cancellation},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {476--477},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5433842},
doi = {10.1109/ISSCC.2010.5433842},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isscc/ZanusoLSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZanusoTLDSL09,
author = {Marco Zanuso and
Davide Tasca and
Salvatore Levantino and
Andrea Donadel and
Carlo Samori and
Andrea L. Lacaita},
title = {Noise Analysis and Minimization in Bang-Bang Digital PLLs},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {56-II},
number = {11},
pages = {835--839},
year = {2009},
url = {https://doi.org/10.1109/TCSII.2009.2032470},
doi = {10.1109/TCSII.2009.2032470},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZanusoTLDSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/ZanusoLTRSL09,
author = {Marco Zanuso and
Salvatore Levantino and
Davide Tasca and
Daniele Raiteri and
Carlo Samori and
Andrea L. Lacaita},
title = {A glitch-corrector circuit for low-spur ADPLLs},
booktitle = {16th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
2009},
pages = {595--598},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICECS.2009.5410853},
doi = {10.1109/ICECS.2009.5410853},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/ZanusoLTRSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LevantinoZTSL09,
author = {Salvatore Levantino and
Marco Zanuso and
Davide Tasca and
Carlo Samori and
Andrea L. Lacaita},
title = {An all-digital architecture for low-jitter regulated delay lines},
booktitle = {16th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
2009},
pages = {603--606},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ICECS.2009.5410855},
doi = {10.1109/ICECS.2009.5410855},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/LevantinoZTSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PanseriRLSL08,
author = {Luigi Panseri and
Luca Roman{\`{o}} and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Low-Power Signal Component Separator for a 64-QAM 802.11 {LINC} Transmitter},
journal = {{IEEE} J. Solid State Circuits},
volume = {43},
number = {5},
pages = {1274--1286},
year = {2008},
url = {https://doi.org/10.1109/JSSC.2008.920321},
doi = {10.1109/JSSC.2008.920321},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/PanseriRLSL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/BonfantiCGPSS08,
author = {Andrea Bonfanti and
Davide De Caro and
Alfio Dario Grasso and
Salvatore Pennisi and
Carlo Samori and
Antonio G. M. Strollo},
title = {A 2.5-GHz {DDFS-PLL} With 1.8-MHz Bandwidth in 0.35-{\(\mathrm{\mu}\)}m
{CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {43},
number = {6},
pages = {1403--1413},
year = {2008},
url = {https://doi.org/10.1109/JSSC.2008.922721},
doi = {10.1109/JSSC.2008.922721},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/BonfantiCGPSS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ZanchiS08,
author = {Alfio Zanchi and
Carlo Samori},
title = {Analysis and Characterization of the Effects of Clock Jitter in {A/D}
Converters for Subsampling},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {55-I},
number = {2},
pages = {522--534},
year = {2008},
url = {https://doi.org/10.1109/TCSI.2008.916576},
doi = {10.1109/TCSI.2008.916576},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ZanchiS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MadoglioZLSL07,
author = {Paolo Madoglio and
Marco Zanuso and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Quantization Effects in All-Digital Phase-Locked Loops},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {54-II},
number = {12},
pages = {1120--1124},
year = {2007},
url = {https://doi.org/10.1109/TCSII.2007.906171},
doi = {10.1109/TCSII.2007.906171},
timestamp = {Wed, 27 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MadoglioZLSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/BonfantiSL07,
author = {Andrea Bonfanti and
Carlo Samori and
Andrea L. Lacaita},
editor = {Doris Schmitt{-}Landsiedel and
Tobias Noll},
title = {A multistandard {\(\Sigma\)}-{\(\Delta\)} fractional-N frequency synthesizer
for 802.11a/b/g {WLAN}},
booktitle = {33rd European Solid-State Circuits Conference, {ESSCIRC} 2007, Munich,
Germany, 11-13 September 2007},
pages = {480--483},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ESSCIRC.2007.4430346},
doi = {10.1109/ESSCIRC.2007.4430346},
timestamp = {Wed, 16 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/esscirc/BonfantiSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/RomanoBLSL06,
author = {Luca Roman{\`{o}} and
Andrea Bonfanti and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {5-GHz Oscillator Array With Reduced Flicker Up-Conversion in 0.13-{\textdollar}muhboxm{\textdollar}CMOS},
journal = {{IEEE} J. Solid State Circuits},
volume = {41},
number = {11},
pages = {2457--2467},
year = {2006},
url = {https://doi.org/10.1109/JSSC.2006.883315},
doi = {10.1109/JSSC.2006.883315},
timestamp = {Wed, 16 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/RomanoBLSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/BonfantiLSL06,
author = {Andrea Bonfanti and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A varactor configuration minimizing the amplitude-to-phase noise conversion
in VCOs},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {3},
pages = {481--488},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2005.858764},
doi = {10.1109/TCSI.2005.858764},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/BonfantiLSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/RomanoPSL06,
author = {Luca Roman{\`{o}} and
Luigi Panseri and
Carlo Samori and
Andrea L. Lacaita},
title = {Matching requirements in {LINC} transmitters for {OFDM} signals},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {7},
pages = {1572--1578},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2006.877886},
doi = {10.1109/TCSI.2006.877886},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/RomanoPSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/RomanoLSL06,
author = {Luca Roman{\`{o}} and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Multiphase {LC} oscillators},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {53-I},
number = {7},
pages = {1579--1588},
year = {2006},
url = {https://doi.org/10.1109/TCSI.2006.876415},
doi = {10.1109/TCSI.2006.876415},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/RomanoLSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/PanseriRLSL06,
author = {Luigi Panseri and
Luca Roman{\`{o}} and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Low-power {CMOS} {IEEE} 802.11a/g Signal Separator for Outphasing
Transmitter},
booktitle = {Proceedings of the {IEEE} 2006 Custom Integrated Circuits Conference,
{CICC} 2006, DoubleTree Hotel, San Jose, California, USA, September
10-13, 2006},
pages = {133--136},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/CICC.2006.320850},
doi = {10.1109/CICC.2006.320850},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/PanseriRLSL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/PelleranoLSL04,
author = {Stefano Pellerano and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {A 13.5-mW 5-GHz frequency synthesizer with dynamic-logic frequency
divider},
journal = {{IEEE} J. Solid State Circuits},
volume = {39},
number = {2},
pages = {378--383},
year = {2004},
url = {https://doi.org/10.1109/JSSC.2003.821784},
doi = {10.1109/JSSC.2003.821784},
timestamp = {Tue, 04 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/PelleranoLSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoRPSL04,
author = {Salvatore Levantino and
Luca Roman{\`{o}} and
Stefano Pellerano and
Carlo Samori and
Andrea L. Lacaita},
title = {Phase noise in digital frequency dividers},
journal = {{IEEE} J. Solid State Circuits},
volume = {39},
number = {5},
pages = {775--784},
year = {2004},
url = {https://doi.org/10.1109/JSSC.2004.826338},
doi = {10.1109/JSSC.2004.826338},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoRPSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LevantinoMSL04,
author = {Salvatore Levantino and
Marco Milani and
Carlo Samori and
Andrea L. Lacaita},
title = {Fast-switching analog {PLL} with finite-impulse response},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {51-I},
number = {9},
pages = {1697--1701},
year = {2004},
url = {https://doi.org/10.1109/TCSI.2004.834519},
doi = {10.1109/TCSI.2004.834519},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LevantinoMSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/RomanoMdSP04,
author = {Luca Roman{\`{o}} and
Vita Minerva and
Silvia Cavalieri d'Oro and
Carlo Samori and
Marco Politi},
title = {5-GHz in-phase coupled oscillators with 39{\%} tuning range},
booktitle = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
{CICC} 2004, Orlando, FL, USA, October 2004},
pages = {269--272},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/CICC.2004.1358795},
doi = {10.1109/CICC.2004.1358795},
timestamp = {Mon, 28 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/RomanoMdSP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/RomanoSLBL04,
author = {Luca Roman{\`{o}} and
Carlo Samori and
Salvatore Levantino and
Andrea Bonfanti and
Andrea L. Lacaita},
title = {A multi-tank LC-oscillator [microwave oscillator example]},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {29--32},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399606},
doi = {10.1109/ICECS.2004.1399606},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/RomanoSLBL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LevantinoBRSL04,
author = {Salvatore Levantino and
Andrea Bonfanti and
Luca Roman{\`{o}} and
Carlo Samori and
Andrea L. Lacaita},
title = {Differential tuning oscillators with reduced flicker noise upconversion},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {33--36},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399607},
doi = {10.1109/ICECS.2004.1399607},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/LevantinoBRSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/RomanoLBSL04,
author = {Luca Roman{\`{o}} and
Salvatore Levantino and
Andrea Bonfanti and
Carlo Samori and
Andrea L. Lacaita},
title = {Phase noise and accuracy in quadrature oscillators},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {161--164},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/RomanoLBSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LevantinoRSL04,
author = {Salvatore Levantino and
Luca Roman{\`{o}} and
Carlo Samori and
Andrea L. Lacaita},
title = {Fast-switching analog {PLL} with finite-impulse response},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {165--168},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ISCAS.2004.1328966},
doi = {10.1109/ISCAS.2004.1328966},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LevantinoRSL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoSBGB03,
author = {Salvatore Levantino and
Carlo Samori and
Mihai Banu and
Jack P. F. Glas and
Vito Boccuzzi},
title = {A {CMOS} {GSM} IF-sampling circuit with reduced in-channel aliasing},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {6},
pages = {895--904},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.811871},
doi = {10.1109/JSSC.2003.811871},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoSBGB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/GierkinkLFSB03,
author = {Sander L. J. Gierkink and
Salvatore Levantino and
Robert C. Frye and
Carlo Samori and
Vito Boccuzzi},
title = {A low-phase-noise 5-GHz {CMOS} quadrature {VCO} using superharmonic
coupling},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {7},
pages = {1148--1154},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.813297},
doi = {10.1109/JSSC.2003.813297},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/GierkinkLFSB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/BonfantiASL03,
author = {Andrea Bonfanti and
F. Amorosa and
Carlo Samori and
Andrea L. Lacaita},
title = {A DDS-based {PLL} for 2.4-GHz frequency synthesis},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {50},
number = {12},
pages = {1007--1010},
year = {2003},
url = {https://doi.org/10.1109/TCSII.2003.820250},
doi = {10.1109/TCSII.2003.820250},
timestamp = {Sat, 31 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/BonfantiASL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/BonfantiLPSLT03,
author = {Andrea Giovanni Bonfanti and
Salvatore Levantino and
Stefano Pellerano and
Carlo Samori and
Andrea L. Lacaita and
Felice Torrisi},
editor = {Jos{\'{e}} E. Franca and
Rudolf Koch},
title = {A voltage-controlled oscillator for {IEEE} 802.11a and HiperLAN2 application},
booktitle = {{ESSCIRC} 2003 - 29th European Solid-State Circuits Conference, Estoril,
Portugal, September 16-18, 2003},
pages = {695--698},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ESSCIRC.2003.1257230},
doi = {10.1109/ESSCIRC.2003.1257230},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/esscirc/BonfantiLPSLT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cm/SamoriLL02,
author = {Carlo Samori and
Salvatore Levantino and
Andrea L. Lacaita},
title = {Integrated {LC} oscillators for frequency synthesis in wireless applications},
journal = {{IEEE} Commun. Mag.},
volume = {40},
number = {5},
pages = {166--171},
year = {2002},
url = {https://doi.org/10.1109/35.1000231},
doi = {10.1109/35.1000231},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cm/SamoriLL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LevantinoSBGLB02,
author = {Salvatore Levantino and
Carlo Samori and
Andrea Bonfanti and
Sander L. J. Gierkink and
Andrea L. Lacaita and
Vito Boccuzzi},
title = {Frequency dependence on bias current in 5 GHz {CMOS} VCOs: impact
on tuning range and flicker noise upconversion},
journal = {{IEEE} J. Solid State Circuits},
volume = {37},
number = {8},
pages = {1003--1011},
year = {2002},
url = {https://doi.org/10.1109/JSSC.2002.800969},
doi = {10.1109/JSSC.2002.800969},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LevantinoSBGLB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AndreaniBRS02,
author = {Pietro Andreani and
Andrea Bonfanti and
Luca Roman{\`{o}} and
Carlo Samori},
title = {Analysis and design of a 1.8-GHz {CMOS} {LC} quadrature {VCO}},
journal = {{IEEE} J. Solid State Circuits},
volume = {37},
number = {12},
pages = {1737--1747},
year = {2002},
url = {https://doi.org/10.1109/JSSC.2002.804352},
doi = {10.1109/JSSC.2002.804352},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AndreaniBRS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ZanchiSLL01,
author = {Alfio Zanchi and
Carlo Samori and
Salvatore Levantino and
Andrea L. Lacaita},
title = {A 2-V 2.5-GHz-104-dBc/Hz at 100 kHz fully integrated {VCO} with wide-band
low-noise automatic amplitude control loop},
journal = {{IEEE} J. Solid State Circuits},
volume = {36},
number = {4},
pages = {611--619},
year = {2001},
url = {https://doi.org/10.1109/4.913739},
doi = {10.1109/4.913739},
timestamp = {Tue, 16 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/ZanchiSLL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/SamoriLB01,
author = {Carlo Samori and
Salvatore Levantino and
Vito Boccuzzi},
title = {A -94 dBc/Hz@100 kHz, fully-integrated, 5-GHz, {CMOS} {VCO} with 18{\%}
tuning range for Bluetooth applications},
booktitle = {Proceedings of the {IEEE} 2001 Custom Integrated Circuits Conference,
{CICC} 2001, San Diego, CA, USA, May 6-9, 2001},
pages = {201--204},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/CICC.2001.929755},
doi = {10.1109/CICC.2001.929755},
timestamp = {Mon, 10 Oct 2022 09:13:22 +0200},
biburl = {https://dblp.org/rec/conf/cicc/SamoriLB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/ZanchiBLSL01,
author = {Alfio Zanchi and
Andrea Bonfanti and
Salvatore Levantino and
Carlo Samori and
Andrea L. Lacaita},
title = {Automatic amplitude control loop for a 2-V, 2.5-GHz LC-tank {VCO}},
booktitle = {Proceedings of the {IEEE} 2001 Custom Integrated Circuits Conference,
{CICC} 2001, San Diego, CA, USA, May 6-9, 2001},
pages = {209--212},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/CICC.2001.929757},
doi = {10.1109/CICC.2001.929757},
timestamp = {Tue, 06 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/ZanchiBLSL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/SamoriLZLC00,
author = {Carlo Samori and
Andrea L. Lacaita and
Alfio Zanchi and
Salvatore Levantino and
Giovanni Cal{\'{\i}}},
title = {Phase noise degradation at high oscillation amplitudes in LC-tuned
VCO's},
journal = {{IEEE} J. Solid State Circuits},
volume = {35},
number = {1},
pages = {96--99},
year = {2000},
url = {https://doi.org/10.1109/4.818924},
doi = {10.1109/4.818924},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/SamoriLZLC00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tim/ZappaGCSG00,
author = {Franco Zappa and
Massimo Ghioni and
Sergio Cova and
Carlo Samori and
Andrea Carlo Giudice},
title = {An integrated active-quenching circuit for single-photon avalanche
diodes},
journal = {{IEEE} Trans. Instrum. Meas.},
volume = {49},
number = {6},
pages = {1167--1175},
year = {2000},
url = {https://doi.org/10.1109/19.893251},
doi = {10.1109/19.893251},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tim/ZappaGCSG00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LevantinoZBS00,
author = {Salvatore Levantino and
Alfio Zanchi and
Andrea Bonfanti and
Carlo Samori},
title = {Fast simulation techniques for phase noise analysis of oscillators},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
May 2000, Proceedings},
pages = {156--159},
publisher = {{IEEE}},
year = {2000},
url = {https://doi.org/10.1109/ISCAS.2000.856282},
doi = {10.1109/ISCAS.2000.856282},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LevantinoZBS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SamoriLZV98,
author = {Carlo Samori and
Andrea L. Lacaita and
Alfio Zanchi and
P. Vita},
title = {Design Issues of {LC} Tuned Oscillators for Integrated Transceivers},
booktitle = {8th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '98), 19-21 February
1998, Lafayette, LA, {USA}},
pages = {264--269},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/GLSV.1998.665253},
doi = {10.1109/GLSV.1998.665253},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SamoriLZV98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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