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ORCIDBibTeX records: Rosa Rodríguez-Montañés
@article{DBLP:journals/access/AkbariMAMGCGR23,
author = {Maryam Akbari and
Sattar Mirzakuchaki and
Daniel Arum{\'{\i}} and
Salvador Manich and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Francesca Campabadal and
Mireia Bargallo Gonz{\'{a}}lez and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s},
title = {True Random Number Generator Based on the Variability of the High
Resistance State of RRAMs},
journal = {{IEEE} Access},
volume = {11},
pages = {66682--66693},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3290896},
doi = {10.1109/ACCESS.2023.3290896},
timestamp = {Fri, 18 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/AkbariMAMGCGR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/MahboubiAGRM22,
author = {V. Mahboubi and
Daniel Arum{\'{\i}} and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Salvador Manich},
title = {On the Fitting and Improvement of {RRAM} Stanford-Based Model Parameters
Using TiN/Ti/HfO2/W Experimental Data},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970051},
doi = {10.1109/DCIS55711.2022.9970051},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/MahboubiAGRM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/AlbiolMARG21,
author = {P. Albiol and
Salvador Manich and
Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
{\'{A}}lvaro G{\'{o}}mez{-}Pau},
title = {Low Cost {AES} Protection Against {DPA} Using Rolling Codes},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666192},
doi = {10.1109/DCIS53048.2021.9666192},
timestamp = {Fri, 13 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dcis/AlbiolMARG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/YangAMGRRGCF21,
author = {Binbin Yang and
Daniel Arum{\'{\i}} and
Salvador Manich and
{\'{A}}lvaro G{\'{o}}mez{-}Pau and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Juan Bautista Rold{\'{a}}n and
Mireia Bargallo Gonz{\'{a}}lez and
Francesca Campabadal and
Liang Fang},
title = {Simulation of serial {RRAM} cell based on a Verilog-A compact model},
booktitle = {{XXXVI} Conference on Design of Circuits and Integrated Systems, {DCIS}
2021, Vila do Conde, Portugal, November 24-26, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/DCIS53048.2021.9666174},
doi = {10.1109/DCIS53048.2021.9666174},
timestamp = {Fri, 21 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/YangAMGRRGCF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Rodriguez-Montanes19,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Daniel Arum{\'{\i}} and
Joan Figueras},
title = {Postbond Test of Through-Silicon Vias With Resistive Open Defects},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {11},
pages = {2596--2607},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2925971},
doi = {10.1109/TVLSI.2019.2925971},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Rodriguez-Montanes19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/WeinerMRS18,
author = {Michael Weiner and
Salvador Manich and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Georg Sigl},
title = {The Low Area Probing Detector as a Countermeasure Against Invasive
Attacks},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {26},
number = {2},
pages = {392--403},
year = {2018},
url = {https://doi.org/10.1109/TVLSI.2017.2762630},
doi = {10.1109/TVLSI.2017.2762630},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/WeinerMRS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/VatajeluRRF17,
author = {Elena Ioana Vatajelu and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Michel Renovell and
Joan Figueras},
title = {Mitigating read {\&} write errors in {STT-MRAM} memories under
{DVS}},
booktitle = {22nd {IEEE} European Test Symposium, {ETS} 2017, Limassol, Cyprus,
May 22-26, 2017},
pages = {1--2},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ETS.2017.7968209},
doi = {10.1109/ETS.2017.7968209},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/VatajeluRRF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ArumiRF16,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Prebond Testing of Weak Defects in TSVs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {4},
pages = {1503--1514},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2448594},
doi = {10.1109/TVLSI.2015.2448594},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ArumiRF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ArumiRF16a,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Test Escapes of Stuck-Open Faults Caused by Parasitic Capacitances
and Leakage Currents},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {5},
pages = {1739--1748},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2477103},
doi = {10.1109/TVLSI.2015.2477103},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ArumiRF16a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ivsw/ArumiMR16,
author = {Daniel Arum{\'{\i}} and
Salvador Manich and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s},
title = {{RRAM} based cell for hardware security applications},
booktitle = {1st {IEEE} International Verification and Security Workshop, {IVSW}
2016, Sant Feliu de Guixols, Spain, July 4-6, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/IVSW.2016.7566599},
doi = {10.1109/IVSW.2016.7566599},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ivsw/ArumiMR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/VatajeluRIRPF15,
author = {Elena I. Vatajelu and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Marco Indaco and
Michel Renovell and
Paolo Prinetto and
Joan Figueras},
editor = {Wolfgang Nebel and
David Atienza},
title = {Read/write robustness estimation metrics for spin transfer torque
{(STT)} {MRAM} cell},
booktitle = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
9-13, 2015},
pages = {447--452},
publisher = {{ACM}},
year = {2015},
url = {http://dl.acm.org/citation.cfm?id=2755855},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/VatajeluRIRPF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/VatajeluRIPF15,
author = {Elena I. Vatajelu and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Marco Indaco and
Paolo Prinetto and
Joan Figueras},
title = {{STT-MRAM} cell reliability evaluation under process, voltage and
temperature {(PVT)} variations},
booktitle = {10th International Conference on Design {\&} Technology of Integrated
Systems in Nanoscale Era, {DTIS} 2015, Napoli, Italy, April 21-23,
2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/DTIS.2015.7127377},
doi = {10.1109/DTIS.2015.7127377},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dtis/VatajeluRIPF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/VatajeluRCIRPF15,
author = {Elena I. Vatajelu and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Stefano Di Carlo and
Marco Indaco and
Michel Renovell and
Paolo Prinetto and
Joan Figueras},
title = {Power-aware voltage tuning for {STT-MRAM} reliability},
booktitle = {20th {IEEE} European Test Symposium, {ETS} 2015, Cluj-Napoca, Romania,
25-29 May, 2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ETS.2015.7138748},
doi = {10.1109/ETS.2015.7138748},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/VatajeluRCIRPF15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/CarloIPVRF14,
author = {Stefano Di Carlo and
Marco Indaco and
Paolo Prinetto and
Elena I. Vatajelu and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Reliability estimation at block-level granularity of spin-transfer-torque
MRAMs},
booktitle = {2014 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2014, Amsterdam, The Netherlands,
October 1-3, 2014},
pages = {75--80},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DFT.2014.6962093},
doi = {10.1109/DFT.2014.6962093},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/CarloIPVRF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/Rodriguez-MontanesAF14,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Daniel Arum{\'{\i}} and
Joan Figueras},
editor = {Giorgio Di Natale},
title = {Post-bond test of Through-Silicon Vias with open defects},
booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany,
May 26-30, 2014},
pages = {1--6},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ETS.2014.6847816},
doi = {10.1109/ETS.2014.6847816},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/Rodriguez-MontanesAF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ArumiRF14,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Pre-bond testing of weak defects in TSVs},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {31--36},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873668},
doi = {10.1109/IOLTS.2014.6873668},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/ArumiRF14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ArumiMFEHK13,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
title = {Diagnosis of Interconnect Full Open Defects in the Presence of Gate
Leakage Currents},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {32},
number = {2},
pages = {301--312},
year = {2013},
url = {https://doi.org/10.1109/TCAD.2012.2228269},
doi = {10.1109/TCAD.2012.2228269},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ArumiMFEHK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ArumiRF13,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {{BIST} architecture to detect defects in tsvs during pre-bond testing},
booktitle = {18th {IEEE} European Test Symposium, {ETS} 2013, Avignon, France,
May 27-30, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ETS.2013.6569389},
doi = {10.1109/ETS.2013.6569389},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/ArumiRF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ArumiMFEHK11,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
title = {Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {30},
number = {12},
pages = {1911--1922},
year = {2011},
url = {https://doi.org/10.1109/TCAD.2011.2165071},
doi = {10.1109/TCAD.2011.2165071},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ArumiMFEHK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ArumiMFEHK11,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
title = {Gate Leakage Impact on Full Open Defects in Interconnect Lines},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {12},
pages = {2209--2220},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2077315},
doi = {10.1109/TVLSI.2010.2077315},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ArumiMFEHK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/Rodriguez-MontanesAFEHK10,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Daniel Arum{\'{\i}} and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
title = {Diagnosis of full open defects in interconnect lines with fan-out},
booktitle = {15th European Test Symposium, {ETS} 2010, Prague, Czech Republic,
May 24-28, 2010},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ETSYM.2010.5512752},
doi = {10.1109/ETSYM.2010.5512752},
timestamp = {Tue, 28 Apr 2020 11:43:44 +0200},
biburl = {https://dblp.org/rec/conf/ets/Rodriguez-MontanesAFEHK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/ArumiRF09,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Delay caused by resistive opens in interconnecting lines},
journal = {Integr.},
volume = {42},
number = {3},
pages = {286--293},
year = {2009},
url = {https://doi.org/10.1016/j.vlsi.2008.11.001},
doi = {10.1016/J.VLSI.2008.11.001},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/ArumiRF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ArumiRF08,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Experimental Characterization of {CMOS} Interconnect Open Defects},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {27},
number = {1},
pages = {123--136},
year = {2008},
url = {https://doi.org/10.1109/TCAD.2007.907255},
doi = {10.1109/TCAD.2007.907255},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ArumiRF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Rodriguez-MontanesAFEHK08,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Daniel Arum{\'{\i}} and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
editor = {Douglas Young and
Nur A. Touba},
title = {Time-dependent Behaviour of Full Open Defects in Interconnect Lines},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700575},
doi = {10.1109/TEST.2008.4700575},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Rodriguez-MontanesAFEHK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ArumiRFEHK08,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman},
title = {Full Open Defects in Nanometric {CMOS}},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.31},
doi = {10.1109/VTS.2008.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ArumiRFEHK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ArumiRFEHKLM07,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman and
Maurice Lousberg and
Ananta K. Majhi},
title = {Diagnosis of Bridging Defects Based on Current Signatures at Low Power
Supply Voltages},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.27},
doi = {10.1109/VTS.2007.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ArumiRFEHKLM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Rodriguez-MontanesAFEHKLM07,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Daniel Arum{\'{\i}} and
Joan Figueras and
Stefan Eichenberger and
Camelia Hora and
Bram Kruseman and
Maurice Lousberg and
Ananta K. Majhi},
title = {Diagnosis of Full Open Defects in Interconnecting Lines},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {158--166},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.28},
doi = {10.1109/VTS.2007.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Rodriguez-MontanesAFEHKLM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/BaladoLGRF06,
author = {Luz Balado and
Emili Lupon and
L. Garc{\'{\i}}a and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {Lissajous Based Mixed-Signal Testing for N-Observable Signals},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649591},
doi = {10.1109/DDECS.2006.1649591},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/BaladoLGRF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ArumiRF05,
author = {Daniel Arum{\'{\i}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Defective behaviours of resistive opens in interconnect lines},
booktitle = {10th European Test Symposium, {ETS} 2005, Tallinn, Estonia, May 22-25,
2005},
pages = {28--33},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ETS.2005.13},
doi = {10.1109/ETS.2005.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/ArumiRF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Rodriguez-MontanesMBF04,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
D. Mu{\~{n}}oz and
Luz Balado and
Joan Figueras},
title = {Analog Switches in Programmable Analog Devices: Quiescent Defective
Behaviours},
journal = {J. Electron. Test.},
volume = {20},
number = {2},
pages = {143--153},
year = {2004},
url = {https://doi.org/10.1023/B:JETT.0000023678.30564.66},
doi = {10.1023/B:JETT.0000023678.30564.66},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Rodriguez-MontanesMBF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ManichGBLRRF04,
author = {Salvador Manich and
L. Garc{\'{\i}}a and
Luz Balado and
Emili Lupon and
Josep Rius and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {{BIST} Technique by Equally Spaced Test Vector Sequences},
booktitle = {22nd {IEEE} {VLSI} Test Symposium {(VTS} 2004), 25-29 April 2004,
Napa Valley, CA, {USA}},
pages = {206--216},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/VTEST.2004.1299245},
doi = {10.1109/VTEST.2004.1299245},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ManichGBLRRF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsn/MunteanuSRC03,
author = {Doru P. Munteanu and
V{\'{\i}}ctor Su{\~{n}}{\'{e}} and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Juan A. Carrasco},
title = {A Combinatorial Method for the Evaluation of Yield of Fault-Tolerant
Systems-on-Chip},
booktitle = {2003 International Conference on Dependable Systems and Networks {(DSN}
2003), 22-25 June 2003, San Francisco, CA, USA, Proceedings},
pages = {563--572},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DSN.2003.1209966},
doi = {10.1109/DSN.2003.1209966},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsn/MunteanuSRC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ManichGBLRRF03,
author = {Salvador Manich and
L. Garc{\'{\i}}a and
Luz Balado and
Emili Lupon and
Josep Rius and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {On the selection of efficient arithmetic additive test pattern generators
[logic test]},
booktitle = {8th European Test Workshop, {ETW} 2003, Maastricht, The Netherlands,
May 25-28, 2003},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ETW.2003.1231662},
doi = {10.1109/ETW.2003.1231662},
timestamp = {Wed, 04 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/ManichGBLRRF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/Arumi-DelgadoRG03,
author = {Daniel Arum{\'{\i}}{-}Delgado and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Jos{\'{e}} Pineda de Gyvez and
Guido Gronthoud},
title = {Process-variability aware delay fault testing of {\(\Delta\)}V\({}_{\mbox{T}}\)
and weak-open defects},
booktitle = {8th European Test Workshop, {ETW} 2003, Maastricht, The Netherlands,
May 25-28, 2003},
pages = {85--90},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ETW.2003.1231673},
doi = {10.1109/ETW.2003.1231673},
timestamp = {Tue, 27 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/Arumi-DelgadoRG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GyvezR03,
author = {Jos{\'{e}} Pineda de Gyvez and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s},
title = {Threshold Voltage Mismatch (DeltaVT) Fault Modeling},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {145--150},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197645},
doi = {10.1109/VTEST.2003.1197645},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GyvezR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Rodriguez-MontanesVG02,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Paul Volf and
Jos{\'{e}} Pineda de Gyvez},
title = {Resistance Characterization for Weak Open Defects},
journal = {{IEEE} Des. Test Comput.},
volume = {19},
number = {5},
pages = {18--26},
year = {2002},
url = {https://doi.org/10.1109/MDT.2002.1033788},
doi = {10.1109/MDT.2002.1033788},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/Rodriguez-MontanesVG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Rodriguez-MontanesMBF02,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
D. Mu{\~{n}}oz and
Luz Balado and
Joan Figueras},
title = {Analog Switches in Programmable Analog Devices: Quiescent Defective
Behaviours},
booktitle = {8th {IEEE} International On-Line Testing Workshop {(IOLTW} 2002),
8-10 July 2002, Isle of Bendor, France},
pages = {99--103},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/OLT.2002.1030191},
doi = {10.1109/OLT.2002.1030191},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Rodriguez-MontanesMBF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SantosTTMRF02,
author = {Marcelino B. Santos and
Isabel C. Teixeira and
Jo{\~{a}}o Paulo Teixeira and
Salvador Manich and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {{RTL} Level Preparation of High-Quality/Low-Energy/Low-Power {BIST}},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {814--823},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041835},
doi = {10.1109/TEST.2002.1041835},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SantosTTMRF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/FerreIRRF98,
author = {Antoni Ferr{\'{e}} and
Eugeni Isern and
Josep Rius and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {{IDDQ} testing: state of the art and future trends},
journal = {Integr.},
volume = {26},
number = {1-2},
pages = {167--196},
year = {1998},
url = {https://doi.org/10.1016/S0167-9260(98)00027-3},
doi = {10.1016/S0167-9260(98)00027-3},
timestamp = {Wed, 20 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/integration/FerreIRRF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Rodriguez-MontanesF98,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {Estimation of the Defective {IDDQ} Caused by Shorts in Deep-Submicron
{CMOS} ICs},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {490--494},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655903},
doi = {10.1109/DATE.1998.655903},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Rodriguez-MontanesF98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Rodriguez-MontanesF97,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
title = {Bridges in sequential {CMOS} circuits: current-voltage signatur},
booktitle = {15th {IEEE} {VLSI} Test Symposium (VTS'97), April 27-May 1, 1997,
Monterey, California, {USA}},
pages = {68--73},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/VTEST.1997.599443},
doi = {10.1109/VTEST.1997.599443},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/Rodriguez-MontanesF97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Rodriguez-MontanesBF96,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
E. M. J. G. Bruls and
Joan Figueras},
title = {Bridging defects resistance in the metal layer of a {CMOS} process},
journal = {J. Electron. Test.},
volume = {8},
number = {1},
pages = {35--46},
year = {1996},
url = {https://doi.org/10.1007/BF00136074},
doi = {10.1007/BF00136074},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Rodriguez-MontanesBF96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/Rodriguez-MontanesF94,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras},
editor = {Robert Werner},
title = {Analysis of Bridging Defects in Sequential {CMOS} Circuits and their
Current Testability},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {356--360},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326852},
doi = {10.1109/EDTC.1994.326852},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/Rodriguez-MontanesF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SeguraCRFR92,
author = {Jaume A. Segura and
V{\'{\i}}ctor H. Champac and
Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
J. A. Rubio},
title = {Quiescent current analysis and experimentation of defective {CMOS}
circuits},
journal = {J. Electron. Test.},
volume = {3},
number = {4},
pages = {337--348},
year = {1992},
url = {https://doi.org/10.1007/BF00135337},
doi = {10.1007/BF00135337},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/SeguraCRFR92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Rodriguez-MontanesFB92,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Joan Figueras and
Eric Bruls},
title = {Bridging Defects Resistance Measurements in a {CMOS} Process},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {892--899},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527915},
doi = {10.1109/TEST.1992.527915},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Rodriguez-MontanesFB92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Rodriguez-MontanesSCFR91,
author = {Rosa Rodr{\'{\i}}guez{-}Monta{\~{n}}{\'{e}}s and
Jaume A. Segura and
V{\'{\i}}ctor H. Champac and
Joan Figueras and
J. A. Rubio},
title = {Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging
Failures in {CMOS}},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {510--519},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519713},
doi = {10.1109/TEST.1991.519713},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Rodriguez-MontanesSCFR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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