BibTeX records: Vaibhav Venugopal Rao

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@article{DBLP:journals/tvlsi/RaoJS23,
  author       = {Vaibhav Venugopal Rao and
                  Kyle Juretus and
                  Ioannis Savidis},
  title        = {Hidden Costs of Analog Deobfuscation Attacks},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {31},
  number       = {11},
  pages        = {1802--1815},
  year         = {2023},
  url          = {https://doi.org/10.1109/TVLSI.2023.3296279},
  doi          = {10.1109/TVLSI.2023.3296279},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/RaoJS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/host/RaoJS22,
  author       = {Vaibhav Venugopal Rao and
                  Kyle Juretus and
                  Ioannis Savidis},
  title        = {Practical Performance of Analog Attack Techniques},
  booktitle    = {{IEEE} International Symposium on Hardware Oriented Security and Trust,
                  {HOST} 2022, McLean, VA, USA, June 27-30, 2022},
  pages        = {153--156},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/HOST54066.2022.9839966},
  doi          = {10.1109/HOST54066.2022.9839966},
  timestamp    = {Mon, 15 Aug 2022 15:04:52 +0200},
  biburl       = {https://dblp.org/rec/conf/host/RaoJS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/RaoSS22,
  author       = {Vaibhav Venugopal Rao and
                  Avesta Sasan and
                  Ioannis Savidis},
  title        = {Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated
                  Circuits},
  booktitle    = {23rd International Symposium on Quality Electronic Design, {ISQED}
                  2022, Santa Clara, CA, USA, April 6-7, 2022},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISQED54688.2022.9806155},
  doi          = {10.1109/ISQED54688.2022.9806155},
  timestamp    = {Mon, 04 Jul 2022 17:06:19 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/RaoSS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/RaoS21,
  author       = {Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  title        = {Performance and Security Analysis of Parameter-Obfuscated Analog Circuits},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {29},
  number       = {12},
  pages        = {2013--2026},
  year         = {2021},
  url          = {https://doi.org/10.1109/TVLSI.2021.3109062},
  doi          = {10.1109/TVLSI.2021.3109062},
  timestamp    = {Wed, 15 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/RaoS21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/RaoJS20,
  author       = {Vaibhav Venugopal Rao and
                  Kyle Juretus and
                  Ioannis Savidis},
  title        = {Security Vulnerabilities of Obfuscated Analog Circuits},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
                  Sevilla, Spain, October 10-21, 2020},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISCAS45731.2020.9180781},
  doi          = {10.1109/ISCAS45731.2020.9180781},
  timestamp    = {Mon, 18 Jan 2021 08:38:59 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/RaoJS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/JuretusRS19,
  author       = {Kyle Juretus and
                  Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  editor       = {Houman Homayoun and
                  Baris Taskin and
                  Tinoosh Mohsenin and
                  Weisheng Zhao},
  title        = {Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies},
  booktitle    = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
                  2019, Tysons Corner, VA, USA, May 9-11, 2019},
  pages        = {483--488},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3299874.3319497},
  doi          = {10.1145/3299874.3319497},
  timestamp    = {Wed, 10 Mar 2021 14:55:38 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/JuretusRS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/RaoS19,
  author       = {Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  title        = {Mesh Based Obfuscation of Analog Circuit Properties},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702671},
  doi          = {10.1109/ISCAS.2019.8702671},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/RaoS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/apccas/RaoS18,
  author       = {Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  title        = {Transistor Sizing for Parameter Obfuscation of Analog Circuits Using
                  Satisfiability Modulo Theory},
  booktitle    = {2018 {IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS}
                  2018, Chengdu, China, October 26-30, 2018},
  pages        = {102--106},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/APCCAS.2018.8605710},
  doi          = {10.1109/APCCAS.2018.8605710},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/RaoS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/host/RaoS17,
  author       = {Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  title        = {Parameter biasing obfuscation for analog {IP} protection},
  booktitle    = {2017 {IEEE} International Symposium on Hardware Oriented Security
                  and Trust, {HOST} 2017, McLean, VA, USA, May 1-5, 2017},
  pages        = {161},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/HST.2017.7951825},
  doi          = {10.1109/HST.2017.7951825},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/host/RaoS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/latw/RaoS17,
  author       = {Vaibhav Venugopal Rao and
                  Ioannis Savidis},
  title        = {Protecting analog circuits with parameter biasing obfuscation},
  booktitle    = {18th {IEEE} Latin American Test Symposium, {LATS} 2017, Bogot{\'{a}},
                  Colombia, March 13-15, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/LATW.2017.7906739},
  doi          = {10.1109/LATW.2017.7906739},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/latw/RaoS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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