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ORCIDBibTeX records: Andrew Putnam
@proceedings{DBLP:conf/fpga/2024,
editor = {Zhiru Zhang and
Andrew Putnam},
title = {Proceedings of the 2024 {ACM/SIGDA} International Symposium on Field
Programmable Gate Arrays, {FPGA} 2024, Monterey, CA, USA, March 3-5,
2024},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3626202},
doi = {10.1145/3626202},
timestamp = {Thu, 04 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/2024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/Putnam20,
author = {Andrew Putnam},
editor = {Stephen Neuendorffer and
Lesley Shannon},
title = {What To Do With Datacenter FPGAs Besides Deep Learning},
booktitle = {{FPGA} '20: The 2020 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Seaside, CA, USA, February 23-25, 2020},
pages = {26},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3373087.3375885},
doi = {10.1145/3373087.3375885},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/Putnam20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/ChenPW18,
author = {Deming Chen and
Andrew Putnam and
Steven J. E. Wilton},
title = {Introduction to the Special Section on Deep Learning in FPGAs},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {11},
number = {3},
pages = {14:1--14:3},
year = {2018},
url = {https://doi.org/10.1145/3294768},
doi = {10.1145/3294768},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/ChenPW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nsdi/FirestonePMCDAA18,
author = {Daniel Firestone and
Andrew Putnam and
Sambrama Mundkur and
Derek Chiou and
Alireza Dabagh and
Mike Andrewartha and
Hari Angepat and
Vivek Bhanu and
Adrian M. Caulfield and
Eric S. Chung and
Harish Kumar Chandrappa and
Somesh Chaturmohta and
Matt Humphrey and
Jack Lavier and
Norman Lam and
Fengfen Liu and
Kalin Ovtcharov and
Jitu Padhye and
Gautham Popuri and
Shachar Raindel and
Tejas Sapre and
Mark Shaw and
Gabriel Silva and
Madhan Sivakumar and
Nisheeth Srivastava and
Anshuman Verma and
Qasim Zuhair and
Deepak Bansal and
Doug Burger and
Kushagra Vaid and
David A. Maltz and
Albert G. Greenberg},
editor = {Sujata Banerjee and
Srinivasan Seshan},
title = {Azure Accelerated Networking: SmartNICs in the Public Cloud},
booktitle = {15th {USENIX} Symposium on Networked Systems Design and Implementation,
{NSDI} 2018, Renton, WA, USA, April 9-11, 2018},
pages = {51--66},
publisher = {{USENIX} Association},
year = {2018},
url = {https://www.usenix.org/conference/nsdi18/presentation/firestone},
timestamp = {Tue, 02 Feb 2021 08:05:49 +0100},
biburl = {https://dblp.org/rec/conf/nsdi/FirestonePMCDAA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/CaulfieldCPAFFH17,
author = {Adrian M. Caulfield and
Eric S. Chung and
Andrew Putnam and
Hari Angepat and
Daniel Firestone and
Jeremy Fowers and
Michael Haselman and
Stephen Heil and
Matt Humphrey and
Puneet Kaur and
Joo{-}Young Kim and
Daniel Lo and
Todd Massengill and
Kalin Ovtcharov and
Michael Papamichael and
Lisa Woods and
Sitaram Lanka and
Derek Chiou and
Doug Burger},
title = {Configurable Clouds},
journal = {{IEEE} Micro},
volume = {37},
number = {3},
pages = {52--61},
year = {2017},
url = {https://doi.org/10.1109/MM.2017.51},
doi = {10.1109/MM.2017.51},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/CaulfieldCPAFFH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/Putnam17,
author = {Andrew Putnam},
title = {Designing and Programming the Configurable Cloud},
booktitle = {Proceedings of the Computing Frontiers Conference, CF'17, Siena, Italy,
May 15-17, 2017},
pages = {328},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3075564.3095083},
doi = {10.1145/3075564.3095083},
timestamp = {Tue, 06 Nov 2018 11:07:32 +0100},
biburl = {https://dblp.org/rec/conf/cf/Putnam17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Putnam17,
author = {Andrew Putnam},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {FPGAs in the Datacenter: Combining the Worlds of Hardware and Software
Development},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {5},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066860},
doi = {10.1145/3060403.3066860},
timestamp = {Tue, 06 Nov 2018 16:59:34 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Putnam17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sosp/LiRXLXPCZ17,
author = {Bojie Li and
Zhenyuan Ruan and
Wencong Xiao and
Yuanwei Lu and
Yongqiang Xiong and
Andrew Putnam and
Enhong Chen and
Lintao Zhang},
title = {KV-Direct: High-Performance In-Memory Key-Value Store with Programmable
{NIC}},
booktitle = {Proceedings of the 26th Symposium on Operating Systems Principles,
Shanghai, China, October 28-31, 2017},
pages = {137--152},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3132747.3132756},
doi = {10.1145/3132747.3132756},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sosp/LiRXLXPCZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/PutnamCCCCDEFGG16,
author = {Andrew Putnam and
Adrian M. Caulfield and
Eric S. Chung and
Derek Chiou and
Kypros Constantinides and
John Demme and
Hadi Esmaeilzadeh and
Jeremy Fowers and
Gopi Prashanth Gopal and
Jan Gray and
Michael Haselman and
Scott Hauck and
Stephen Heil and
Amir Hormati and
Joo{-}Young Kim and
Sitaram Lanka and
James R. Larus and
Eric Peterson and
Simon Pope and
Aaron Smith and
Jason Thong and
Phillip Yi Xiao and
Doug Burger},
title = {A reconfigurable fabric for accelerating large-scale datacenter services},
journal = {Commun. {ACM}},
volume = {59},
number = {11},
pages = {114--122},
year = {2016},
url = {https://doi.org/10.1145/2996868},
doi = {10.1145/2996868},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/PutnamCCCCDEFGG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AlkalayACCFHHHH16,
author = {Shlomi Alkalay and
Hari Angepat and
Adrian M. Caulfield and
Eric S. Chung and
Oren Firestein and
Michael Haselman and
Stephen Heil and
Kyle Holohan and
Matt Humphrey and
Tam{\'{a}}s Juh{\'{a}}sz and
Puneet Kaur and
Sitaram Lanka and
Daniel Lo and
Todd Massengill and
Kalin Ovtcharov and
Michael Papamichael and
Andrew Putnam and
Raja Seera and
Rimon Tadros and
Jason Thong and
Lisa Woods and
Derek Chiou and
Doug Burger},
editor = {Deming Chen and
Jonathan W. Greene},
title = {Agile Co-Design for a Reconfigurable Datacenter},
booktitle = {Proceedings of the 2016 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Monterey, CA, USA, February 21-23, 2016},
pages = {15},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2847263.2847287},
doi = {10.1145/2847263.2847287},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/AlkalayACCFHHHH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/Putnam16,
author = {Andrew Putnam},
editor = {Yuchen Song and
Shaojun Wang and
Brent Nelson and
Junbao Li and
Yu Peng},
title = {The configurable cloud - accelerating hyperscale datacenter services
with FPGAs},
booktitle = {2016 International Conference on Field-Programmable Technology, {FPT}
2016, Xi'an, China, December 7-9, 2016},
pages = {2},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FPT.2016.7929178},
doi = {10.1109/FPT.2016.7929178},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/Putnam16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CaulfieldCPAFHH16,
author = {Adrian M. Caulfield and
Eric S. Chung and
Andrew Putnam and
Hari Angepat and
Jeremy Fowers and
Michael Haselman and
Stephen Heil and
Matt Humphrey and
Puneet Kaur and
Joo{-}Young Kim and
Daniel Lo and
Todd Massengill and
Kalin Ovtcharov and
Michael Papamichael and
Lisa Woods and
Sitaram Lanka and
Derek Chiou and
Doug Burger},
title = {A cloud-scale acceleration architecture},
booktitle = {49th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2016, Taipei, Taiwan, October 15-19, 2016},
pages = {7:1--7:13},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/MICRO.2016.7783710},
doi = {10.1109/MICRO.2016.7783710},
timestamp = {Tue, 31 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/CaulfieldCPAFHH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/PutnamCCCCDEFGG15,
author = {Andrew Putnam and
Adrian M. Caulfield and
Eric S. Chung and
Derek Chiou and
Kypros Constantinides and
John Demme and
Hadi Esmaeilzadeh and
Jeremy Fowers and
Gopi Prashanth Gopal and
Jan Gray and
Michael Haselman and
Scott Hauck and
Stephen Heil and
Amir Hormati and
Joo{-}Young Kim and
Sitaram Lanka and
James R. Larus and
Eric Peterson and
Simon Pope and
Aaron Smith and
Jason Thong and
Phillip Yi Xiao and
Doug Burger},
title = {A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services},
journal = {{IEEE} Micro},
volume = {35},
number = {3},
pages = {10--22},
year = {2015},
url = {https://doi.org/10.1109/MM.2015.42},
doi = {10.1109/MM.2015.42},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/PutnamCCCCDEFGG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ches/PoppelmannNPM15,
author = {Thomas P{\"{o}}ppelmann and
Michael Naehrig and
Andrew Putnam and
Adri{\'{a}}n Mac{\'{\i}}as},
editor = {Tim G{\"{u}}neysu and
Helena Handschuh},
title = {Accelerating Homomorphic Evaluation on Reconfigurable Hardware},
booktitle = {Cryptographic Hardware and Embedded Systems - {CHES} 2015 - 17th International
Workshop, Saint-Malo, France, September 13-16, 2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9293},
pages = {143--163},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-662-48324-4\_8},
doi = {10.1007/978-3-662-48324-4\_8},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ches/PoppelmannNPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iacr/PoppelmannNPM15,
author = {Thomas P{\"{o}}ppelmann and
Michael Naehrig and
Andrew Putnam and
Adri{\'{a}}n Mac{\'{\i}}as},
title = {Accelerating Homomorphic Evaluation on Reconfigurable Hardware},
journal = {{IACR} Cryptol. ePrint Arch.},
pages = {631},
year = {2015},
url = {http://eprint.iacr.org/2015/631},
timestamp = {Mon, 11 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iacr/PoppelmannNPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PutnamCCCCDEFGGHHHHKLLPPSTXB14,
author = {Andrew Putnam and
Adrian M. Caulfield and
Eric S. Chung and
Derek Chiou and
Kypros Constantinides and
John Demme and
Hadi Esmaeilzadeh and
Jeremy Fowers and
Gopi Prashanth Gopal and
Jan Gray and
Michael Haselman and
Scott Hauck and
Stephen Heil and
Amir Hormati and
Joo{-}Young Kim and
Sitaram Lanka and
James R. Larus and
Eric Peterson and
Simon Pope and
Aaron Smith and
Jason Thong and
Phillip Yi Xiao and
Doug Burger},
title = {A reconfigurable fabric for accelerating large-scale datacenter services},
booktitle = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
{ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
pages = {13--24},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISCA.2014.6853195},
doi = {10.1109/ISCA.2014.6853195},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PutnamCCCCDEFGGHHHHKLLPPSTXB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/ValamehrCKPSVS13,
author = {Jonathan Kaveh Valamehr and
Melissa Chase and
Seny Kamara and
Andrew Putnam and
Daniel Shumow and
Vinod Vaikuntanathan and
Timothy Sherwood},
title = {Inspection-Resistant Memory Architectures},
journal = {{IEEE} Micro},
volume = {33},
number = {3},
pages = {48--56},
year = {2013},
url = {https://doi.org/10.1109/MM.2013.27},
doi = {10.1109/MM.2013.27},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/ValamehrCKPSVS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RobatmiliLEGSPBK13,
author = {Behnam Robatmili and
Dong Li and
Hadi Esmaeilzadeh and
Madhu Saravana Sibi Govindan and
Aaron Smith and
Andrew Putnam and
Doug Burger and
Stephen W. Keckler},
title = {How to implement effective prediction and forwarding for fusable dynamic
multicore architectures},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {460--471},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522341},
doi = {10.1109/HPCA.2013.6522341},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RobatmiliLEGSPBK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ValamehrCKPSVS12,
author = {Jonathan Valamehr and
Melissa Chase and
Seny Kamara and
Andrew Putnam and
Daniel Shumow and
Vinod Vaikuntanathan and
Timothy Sherwood},
title = {Inspection resistant memory: Architectural support for security from
physical examination},
booktitle = {39th International Symposium on Computer Architecture {(ISCA} 2012),
June 9-13, 2012, Portland, OR, {USA}},
pages = {130--141},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISCA.2012.6237012},
doi = {10.1109/ISCA.2012.6237012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ValamehrCKPSVS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/PutnamSB10,
author = {Andrew Putnam and
Aaron Smith and
Doug Burger},
title = {Dynamic vectorization in the {E2} dynamic multicore architecture},
journal = {{SIGARCH} Comput. Archit. News},
volume = {38},
number = {4},
pages = {27--32},
year = {2010},
url = {https://doi.org/10.1145/1926367.1926373},
doi = {10.1145/1926367.1926373},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/PutnamSB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/SaldanaPMNWCWSP10,
author = {Manuel Salda{\~{n}}a and
Arun Patel and
Christopher A. Madill and
Daniel Nunes and
Danyao Wang and
Paul Chow and
Ralph Wittig and
Henry Styles and
Andrew Putnam},
title = {{MPI} as a Programming Model for High-Performance Reconfigurable Computers},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {3},
number = {4},
pages = {22:1--22:29},
year = {2010},
url = {https://doi.org/10.1145/1862648.1862652},
doi = {10.1145/1862648.1862652},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/SaldanaPMNWCWSP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PutnamEBDMSSW09,
author = {Andrew Putnam and
Susan J. Eggers and
Dave Bennett and
Eric Dellinger and
Jeff Mason and
Henry Styles and
Prasanna Sundararajan and
Ralph Wittig},
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {Performance and power of cache-based reconfigurable computing},
booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
pages = {281},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128.1508189},
doi = {10.1145/1508128.1508189},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PutnamEBDMSSW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PutnamEBDMSSW09,
author = {Andrew Putnam and
Susan J. Eggers and
Dave Bennett and
Eric Dellinger and
Jeff Mason and
Henry Styles and
Prasanna Sundararajan and
Ralph Wittig},
editor = {Stephen W. Keckler and
Luiz Andr{\'{e}} Barroso},
title = {Performance and power of cache-based reconfigurable computing},
booktitle = {36th International Symposium on Computer Architecture {(ISCA} 2009),
June 20-24, 2009, Austin, TX, {USA}},
pages = {395--405},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1555754.1555804},
doi = {10.1145/1555754.1555804},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/PutnamEBDMSSW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PutnamBDMS08,
author = {Andrew Putnam and
Dave Bennett and
Eric Dellinger and
Jeff Mason and
Prasanna Sundararajan},
editor = {Mike Hutton and
Paul Chow},
title = {CHiMPS: a high-level compilation flow for hybrid {CPU-FPGA} architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 16th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2008, Monterey, California, USA,
February 24-26, 2008},
pages = {261},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1344671.1344720},
doi = {10.1145/1344671.1344720},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/PutnamBDMS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/PutnamBDMSE08,
author = {Andrew Putnam and
Dave Bennett and
Eric Dellinger and
Jeff Mason and
Prasanna Sundararajan and
Susan J. Eggers},
title = {CHiMPS: {A} C-level compilation flow for hybrid {CPU-FPGA} architectures},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {173--178},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4629927},
doi = {10.1109/FPL.2008.4629927},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/PutnamBDMSE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/SaldanaPMNWSPWC08,
author = {Manuel Salda{\~{n}}a and
Arun Patel and
Christopher A. Madill and
Daniel Nunes and
Danyao Wang and
Henry Styles and
Andrew Putnam and
Ralph Wittig and
Paul Chow},
title = {{MPI} as an abstraction for software-hardware interaction for HPRCs},
booktitle = {2008 Second International Workshop on High-Performance Reconfigurable
Computing Technology and Applications, HPRCTA@SC 2008, Austin, TX,
USA, November 17, 2008},
pages = {1--10},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/HPRCTA.2008.4745682},
doi = {10.1109/HPRCTA.2008.4745682},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/SaldanaPMNWSPWC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/SwansonSMPPMOE07,
author = {Steven Swanson and
Andrew Schwerin and
Martha Mercaldi and
Andrew Petersen and
Andrew Putnam and
Ken Michelson and
Mark Oskin and
Susan J. Eggers},
title = {The WaveScalar architecture},
journal = {{ACM} Trans. Comput. Syst.},
volume = {25},
number = {2},
pages = {4:1--4:54},
year = {2007},
url = {https://doi.org/10.1145/1233307.1233308},
doi = {10.1145/1233307.1233308},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tocs/SwansonSMPPMOE07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/PetersenPMSESO06,
author = {Andrew Petersen and
Andrew Putnam and
Martha Mercaldi and
Andrew Schwerin and
Susan J. Eggers and
Steven Swanson and
Mark Oskin},
editor = {Erik R. Altman and
Kevin Skadron and
Benjamin G. Zorn},
title = {Reducing control overhead in dataflow architectures},
booktitle = {15th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2006), Seattle, Washington, USA, September 16-20,
2006},
pages = {182--191},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1152154.1152184},
doi = {10.1145/1152154.1152184},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEpact/PetersenPMSESO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/MercaldiSPPSOE06,
author = {Martha Mercaldi and
Steven Swanson and
Andrew Petersen and
Andrew Putnam and
Andrew Schwerin and
Mark Oskin and
Susan J. Eggers},
editor = {John Paul Shen and
Margaret Martonosi},
title = {Instruction scheduling for a tiled dataflow architecture},
booktitle = {Proceedings of the 12th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2006, San Jose, CA, USA, October 21-25, 2006},
pages = {141--150},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1168857.1168876},
doi = {10.1145/1168857.1168876},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asplos/MercaldiSPPSOE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SwansonPMMMPSOE06,
author = {Steven Swanson and
Andrew Putnam and
Martha Mercaldi and
Ken Michelson and
Andrew Petersen and
Andrew Schwerin and
Mark Oskin and
Susan J. Eggers},
title = {Area-Performance Trade-offs in Tiled Dataflow Architectures},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {314--326},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.10},
doi = {10.1109/ISCA.2006.10},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/SwansonPMMMPSOE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/MercaldiSPPSOE06,
author = {Martha Mercaldi and
Steven Swanson and
Andrew Petersen and
Andrew Putnam and
Andrew Schwerin and
Mark Oskin and
Susan J. Eggers},
editor = {Phillip B. Gibbons and
Uzi Vishkin},
title = {Modeling instruction placement on a spatial architecture},
booktitle = {{SPAA} 2006: Proceedings of the 18th Annual {ACM} Symposium on Parallelism
in Algorithms and Architectures, Cambridge, Massachusetts, USA, July
30 - August 2, 2006},
pages = {158--169},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1148109.1148137},
doi = {10.1145/1148109.1148137},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spaa/MercaldiSPPSOE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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