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ORCIDBibTeX records: Youn-Long Lin
@inproceedings{DBLP:conf/cvpr/ChenWYCLCL23,
author = {Yu{-}Hsi Chen and
Chien{-}Yao Wang and
Cheng{-}Yun Yang and
Hung{-}Shuo Chang and
Youn{-}Long Lin and
Yung{-}Yu Chuang and
Hong{-}Yuan Mark Liao},
title = {NeighborTrack: Single Object Tracking by Bipartite Matching with Neighbor
Tracklets and Its Applications to Sports},
booktitle = {{IEEE/CVF} Conference on Computer Vision and Pattern Recognition,
{CVPR} 2023 - Workshops, Vancouver, BC, Canada, June 17-24, 2023},
pages = {5139--5148},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/CVPRW59228.2023.00542},
doi = {10.1109/CVPRW59228.2023.00542},
timestamp = {Wed, 23 Aug 2023 16:23:26 +0200},
biburl = {https://dblp.org/rec/conf/cvpr/ChenWYCLCL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bmvc/TsaiTWLLC22,
author = {Zhong{-}Min Tsai and
Yu{-}Ju Tsai and
Chien{-}Yao Wang and
Hong{-}Yuan Mark Liao and
Youn{-}Long Lin and
Yung{-}Yu Chuang},
title = {SearchTrack: Multiple Object Tracking with Object-Customized Search
and Motion-Aware Features},
booktitle = {33rd British Machine Vision Conference 2022, {BMVC} 2022, London,
UK, November 21-24, 2022},
pages = {55},
publisher = {{BMVA} Press},
year = {2022},
url = {https://bmvc2022.mpi-inf.mpg.de/55/},
timestamp = {Thu, 16 Feb 2023 16:15:04 +0100},
biburl = {https://dblp.org/rec/conf/bmvc/TsaiTWLLC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/miccai/LiaoYLLSL22,
author = {Ting{-}Yu Liao and
Ching{-}Hui Yang and
Yu{-}Wen Lo and
Kuan{-}Ying Lai and
Po{-}Huai Shen and
Youn{-}Long Lin},
editor = {Moi Hoon Yap and
Connah Kendrick and
Bill Cassidy},
title = {HarDNet-DFUS: Enhancing Backbone and Decoder of HarDNet-MSEG for Diabetic
Foot Ulcer Image Segmentation},
booktitle = {Diabetic Foot Ulcers Grand Challenge - Third Challenge, {DFUC} 2022,
Held in Conjunction with {MICCAI} 2022, Singapore, September 22, 2022,
Proceedings},
series = {Lecture Notes in Computer Science},
volume = {13797},
pages = {21--30},
publisher = {Springer},
year = {2022},
url = {https://doi.org/10.1007/978-3-031-26354-5\_2},
doi = {10.1007/978-3-031-26354-5\_2},
timestamp = {Sat, 25 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/miccai/LiaoYLLSL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2209-07313,
author = {Ting{-}Yu Liao and
Ching{-}Hui Yang and
Yu{-}Wen Lo and
Kuan{-}Ying Lai and
Po{-}Huai Shen and
Youn{-}Long Lin},
title = {HarDNet-DFUS: An Enhanced Harmonically-Connected Network for Diabetic
Foot Ulcer Image Segmentation and Colonoscopy Polyp Segmentation},
journal = {CoRR},
volume = {abs/2209.07313},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2209.07313},
doi = {10.48550/ARXIV.2209.07313},
eprinttype = {arXiv},
eprint = {2209.07313},
timestamp = {Thu, 29 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2209-07313.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2210-16572,
author = {Zhong{-}Min Tsai and
Yu{-}Ju Tsai and
Chien{-}Yao Wang and
Hong{-}Yuan Mark Liao and
Youn{-}Long Lin and
Yung{-}Yu Chuang},
title = {SearchTrack: Multiple Object Tracking with Object-Customized Search
and Motion-Aware Features},
journal = {CoRR},
volume = {abs/2210.16572},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2210.16572},
doi = {10.48550/ARXIV.2210.16572},
eprinttype = {arXiv},
eprint = {2210.16572},
timestamp = {Wed, 02 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2210-16572.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2211-06663,
author = {Yu{-}Hsi Chen and
Chien{-}Yao Wang and
Cheng{-}Yun Yang and
Hung{-}Shuo Chang and
Youn{-}Long Lin and
Yung{-}Yu Chuang and
Hong{-}Yuan Mark Liao},
title = {NeighborTrack: Improving Single Object Tracking by Bipartite Matching
with Neighbor Tracklets},
journal = {CoRR},
volume = {abs/2211.06663},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2211.06663},
doi = {10.48550/ARXIV.2211.06663},
eprinttype = {arXiv},
eprint = {2211.06663},
timestamp = {Tue, 15 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2211-06663.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/brainles-ws/WuL21,
author = {Hung{-}Yu Wu and
Youn{-}Long Lin},
editor = {Alessandro Crimi and
Spyridon Bakas},
title = {HarDNet-BTS: {A} Harmonic Shortcut Network for Brain Tumor Segmentation},
booktitle = {Brainlesion: Glioma, Multiple Sclerosis, Stroke and Traumatic Brain
Injuries - 7th International Workshop, BrainLes 2021, Held in Conjunction
with {MICCAI} 2021, Virtual Event, September 27, 2021, Revised Selected
Papers, Part {I}},
series = {Lecture Notes in Computer Science},
volume = {12962},
pages = {261--271},
publisher = {Springer},
year = {2021},
url = {https://doi.org/10.1007/978-3-031-08999-2\_21},
doi = {10.1007/978-3-031-08999-2\_21},
timestamp = {Thu, 28 Jul 2022 13:13:15 +0200},
biburl = {https://dblp.org/rec/conf/brainles-ws/WuL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccvw/WangLYCL21,
author = {Chien{-}Yao Wang and
Hong{-}Yuan Mark Liao and
I{-}Hau Yeh and
Yung{-}Yu Chuang and
Youn{-}Long Lin},
title = {Exploring the power of lightweight YOLOv4},
booktitle = {{IEEE/CVF} International Conference on Computer Vision Workshops,
{ICCVW} 2021, Montreal, BC, Canada, October 11-17, 2021},
pages = {779--788},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICCVW54120.2021.00092},
doi = {10.1109/ICCVW54120.2021.00092},
timestamp = {Fri, 03 Dec 2021 17:37:22 +0100},
biburl = {https://dblp.org/rec/conf/iccvw/WangLYCL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2101-07172,
author = {Chien{-}Hsiang Huang and
Hung{-}Yu Wu and
Youn{-}Long Lin},
title = {HarDNet-MSEG: {A} Simple Encoder-Decoder Polyp Segmentation Neural
Network that Achieves over 0.9 Mean Dice and 86 {FPS}},
journal = {CoRR},
volume = {abs/2101.07172},
year = {2021},
url = {https://arxiv.org/abs/2101.07172},
eprinttype = {arXiv},
eprint = {2101.07172},
timestamp = {Fri, 22 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2101-07172.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2010-13311,
author = {Chao{-}Yang Kao and
Huang{-}Chih Kuo and
Jian{-}Wen Chen and
Chiung{-}Liang Lin and
Pin{-}Han Chen and
Youn{-}Long Lin},
title = {RNNAccel: {A} Fusion Recurrent Neural Network Accelerator for Edge
Intelligence},
journal = {CoRR},
volume = {abs/2010.13311},
year = {2020},
url = {https://arxiv.org/abs/2010.13311},
eprinttype = {arXiv},
eprint = {2010.13311},
timestamp = {Mon, 02 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2010-13311.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccv/ChaoKRHL19,
author = {Ping Chao and
Chao{-}Yang Kao and
Yu{-}Shan Ruan and
Chien{-}Hsiang Huang and
Youn{-}Long Lin},
title = {HarDNet: {A} Low Memory Traffic Network},
booktitle = {2019 {IEEE/CVF} International Conference on Computer Vision, {ICCV}
2019, Seoul, Korea (South), October 27 - November 2, 2019},
pages = {3551--3560},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICCV.2019.00365},
doi = {10.1109/ICCV.2019.00365},
timestamp = {Thu, 05 Mar 2020 10:01:04 +0100},
biburl = {https://dblp.org/rec/conf/iccv/ChaoKRHL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1909-00948,
author = {Ping Chao and
Chao{-}Yang Kao and
Yu{-}Shan Ruan and
Chien{-}Hsiang Huang and
Youn{-}Long Lin},
title = {HarDNet: {A} Low Memory Traffic Network},
journal = {CoRR},
volume = {abs/1909.00948},
year = {2019},
url = {http://arxiv.org/abs/1909.00948},
eprinttype = {arXiv},
eprint = {1909.00948},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-1909-00948.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/ChenLLCCC13,
author = {Wen{-}Tsuen Chen and
Youn{-}Long Lin and
Chen{-}Yi Lee and
Jeng{-}Long Chiang and
Meng{-}Fan Chang and
Shih{-}Chieh Chang},
title = {Strengthening Modern Electronics Industry Through the National Program
for Intelligent Electronics in Taiwan},
journal = {{IEEE} Access},
volume = {1},
pages = {123--130},
year = {2013},
url = {https://doi.org/10.1109/ACCESS.2013.2260591},
doi = {10.1109/ACCESS.2013.2260591},
timestamp = {Wed, 04 Jul 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/ChenLLCCC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ipsj/KuoL13,
author = {Huang{-}Chih Kuo and
Youn{-}Long Lin},
title = {{VLSI} Architecture Design for {H.264/AVC} Intra-frame Video Encoding},
journal = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
volume = {6},
pages = {76--93},
year = {2013},
url = {https://doi.org/10.2197/ipsjtsldm.6.76},
doi = {10.2197/IPSJTSLDM.6.76},
timestamp = {Tue, 29 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ipsj/KuoL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChenLC13,
author = {Shi{-}Hao Chen and
Youn{-}Long Lin and
Mango Chia{-}Tso Chao},
title = {Power-Up Sequence Control for {MTCMOS} Designs},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {21},
number = {3},
pages = {413--423},
year = {2013},
url = {https://doi.org/10.1109/TVLSI.2012.2187689},
doi = {10.1109/TVLSI.2012.2187689},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChenLC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmm/KuoL12,
author = {Huang{-}Chih Kuo and
Youn{-}Long Lin},
title = {A Hybrid Algorithm for Effective Lossless Compression of Video Display
Frames},
journal = {{IEEE} Trans. Multim.},
volume = {14},
number = {3-1},
pages = {500--509},
year = {2012},
url = {https://doi.org/10.1109/TMM.2012.2191945},
doi = {10.1109/TMM.2012.2191945},
timestamp = {Thu, 01 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmm/KuoL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/HungL11,
author = {Chia{-}Ming Hung and
Youn{-}Long Lin},
title = {Three-dimensional integrated circuits implementation of multiple applications
emphasising manufacture reuse},
journal = {{IET} Comput. Digit. Tech.},
volume = {5},
number = {3},
pages = {179--185},
year = {2011},
url = {https://doi.org/10.1049/iet-cdt.2009.0118},
doi = {10.1049/IET-CDT.2009.0118},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/HungL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/KuoL11,
author = {Huang{-}Chih Kuo and
Youn{-}Long Lin},
title = {A simple and effective lossless compression algorithm for video display
frames},
booktitle = {Proceedings of the 2011 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2011, 11-15 July, 2011, Barcelona, Catalonia, Spain},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICME.2011.6012034},
doi = {10.1109/ICME.2011.6012034},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/KuoL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/ChenWLL10,
author = {Jian{-}Wen Chen and
Li{-}Cian Wu and
Po{-}Sheng Liu and
Youn{-}Long Lin},
title = {A high-throughput fully hardwired {CABAC} encoder for {QFHD} {H.264/AVC}
main profile video},
journal = {{IEEE} Trans. Consumer Electron.},
volume = {56},
number = {4},
pages = {2529--2536},
year = {2010},
url = {https://doi.org/10.1109/TCE.2010.5681137},
doi = {10.1109/TCE.2010.5681137},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tce/ChenWLL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/PengL10,
author = {Huan{-}Kai Peng and
Youn{-}Long Lin},
title = {An optimal warning-zone-length assignment algorithm for real-time
and multiple-QoS on-chip bus arbitration},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {9},
number = {4},
pages = {35:1--35:39},
year = {2010},
url = {https://doi.org/10.1145/1721695.1721701},
doi = {10.1145/1721695.1721701},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/PengL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KaoWL10,
author = {Chao{-}Yang Kao and
Cheng{-}Long Wu and
Youn{-}Long Lin},
title = {A High-Performance Three-Engine Architecture for {H.264/AVC} Fractional
Motion Estimation},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {4},
pages = {662--666},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2013629},
doi = {10.1109/TVLSI.2009.2013629},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/KaoWL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/KaoL10,
author = {Chao{-}Yang Kao and
Youn{-}Long Lin},
title = {A Memory-Efficient and Highly Parallel Architecture for Variable Block
Size Integer Motion Estimation in {H.264/AVC}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {6},
pages = {866--874},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2017122},
doi = {10.1109/TVLSI.2009.2017122},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/KaoL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/ZhangWFCLSXSDXCL10,
author = {Tao Zhang and
Kui Wang and
Yi Feng and
Yan Chen and
Qun Li and
Bing Shao and
Jing Xie and
Xiaodi Song and
Lian Duan and
Yuan Xie and
Xu Cheng and
Youn{-}Long Lin},
title = {A 3D SoC design for {H.264} application with on-chip {DRAM} stacking},
booktitle = {{IEEE} International Conference on 3D System Integration, 3DIC 2010,
Munich, Germany, 16-18 November 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/3DIC.2010.5751446},
doi = {10.1109/3DIC.2010.5751446},
timestamp = {Fri, 07 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/3dic/ZhangWFCLSXSDXCL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/ZhangWFSDXCL10,
author = {Tao Zhang and
Kui Wang and
Yi Feng and
Xiaodi Song and
Lian Duan and
Yuan Xie and
Xu Cheng and
Youn{-}Long Lin},
editor = {Jacqueline Snyder and
Rakesh Patel and
Tom Andre},
title = {A customized design of {DRAM} controller for on-chip 3D {DRAM} stacking},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2010, San Jose,
California, USA, 19-22 September, 2010, Proceedings},
pages = {1--4},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/CICC.2010.5617465},
doi = {10.1109/CICC.2010.5617465},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/ZhangWFSDXCL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/ChaoL10,
author = {Ping Chao and
Youn{-}Long Lin},
editor = {Tony Givargis and
Adam Donlin},
title = {An elastic software cache with fast prefetching for motion compensation
in video decoding},
booktitle = {Proceedings of the 8th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2010, part of ESWeek '10
Sixth Embedded Systems Week, Scottsdale, AZ, USA, October 24-28, 2010},
pages = {23--32},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1878961.1878967},
doi = {10.1145/1878961.1878967},
timestamp = {Mon, 26 Nov 2018 12:14:45 +0100},
biburl = {https://dblp.org/rec/conf/codes/ChaoL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tce/ChenL09,
author = {Jian{-}Wen Chen and
Youn{-}Long Lin},
title = {A high-performance hardwired {CABAC} decoder for ultra-high resolution
video},
journal = {{IEEE} Trans. Consumer Electron.},
volume = {55},
number = {3},
pages = {1614--1622},
year = {2009},
url = {https://doi.org/10.1109/TCE.2009.5278034},
doi = {10.1109/TCE.2009.5278034},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tce/ChenL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/LinL09,
author = {Yuan{-}Chun Lin and
Youn{-}Long Lin},
title = {A Two-Result-per-Cycle Deblocking Filter Architecture for {QFHD} {H.264/AVC}
Decoder},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {17},
number = {6},
pages = {838--843},
year = {2009},
url = {https://doi.org/10.1109/TVLSI.2008.2008456},
doi = {10.1109/TVLSI.2008.2008456},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/LinL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/estimedia/KuoCL09,
author = {Huang{-}Chih Kuo and
Jian{-}Wen Chen and
Youn{-}Long Lin},
editor = {Andy D. Pimentel and
Naehyuck Chang},
title = {A high-performance low-power {H.264/AVC} video decoder accelerator
for embedded systems},
booktitle = {Proceedings of the 7th {IEEE/ACM/IFIP} Workshop on Embedded Systems
for Real-Time Multimedia, ESTIMedia 2009, Grenoble, France, 15-16
October 2009},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ESTMED.2009.5336823},
doi = {10.1109/ESTMED.2009.5336823},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/estimedia/KuoCL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/estimedia/YangCKL09,
author = {Hui{-}Ting Yang and
Jian{-}Wen Chen and
Huang{-}Chih Kuo and
Youn{-}Long Lin},
editor = {Andy D. Pimentel and
Naehyuck Chang},
title = {An effective dictionary-based display frame compressor},
booktitle = {Proceedings of the 7th {IEEE/ACM/IFIP} Workshop on Embedded Systems
for Real-Time Multimedia, ESTIMedia 2009, Grenoble, France, 15-16
October 2009},
pages = {28--34},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ESTMED.2009.5336820},
doi = {10.1109/ESTMED.2009.5336820},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/estimedia/YangCKL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuL09,
author = {Li{-}Cian Wu and
Youn{-}Long Lin},
title = {A High throughput {CABAC} Encoder for Ultra High Resolution Video},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
May 2009, Taipei, Taiwan},
pages = {1048--1051},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISCAS.2009.5117939},
doi = {10.1109/ISCAS.2009.5117939},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/WuKL08,
author = {Cheng{-}Long Wu and
Chao{-}Yang Kao and
Youn{-}Long Lin},
title = {A high performance three-engine architecture for {H.264/AVC} fractional
motion estimation},
booktitle = {Proceedings of the 2008 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2008, June 23-26 2008, Hannover, Germany},
pages = {133--136},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICME.2008.4607389},
doi = {10.1109/ICME.2008.4607389},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/WuKL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/KaoL08,
author = {Chao{-}Yang Kao and
Youn{-}Long Lin},
title = {A high-performance and memory-efficient architecture for {H.264/AVC}
motion estimation},
booktitle = {Proceedings of the 2008 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2008, June 23-26 2008, Hannover, Germany},
pages = {141--144},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICME.2008.4607391},
doi = {10.1109/ICME.2008.4607391},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/KaoL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/KuoL08,
author = {Huang{-}Chih Kuo and
Youn{-}Long Lin},
title = {An {H.264/AVC} full-mode intra-frame encoder for 1080HD video},
booktitle = {Proceedings of the 2008 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2008, June 23-26 2008, Hannover, Germany},
pages = {1037--1040},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICME.2008.4607615},
doi = {10.1109/ICME.2008.4607615},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/KuoL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/ChaoL08,
author = {Ping Chao and
Youn{-}Long Lin},
title = {Reference frame access optimization for ultra high resolution {H.264/AVC}
decoding},
booktitle = {Proceedings of the 2008 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2008, June 23-26 2008, Hannover, Germany},
pages = {1441--1444},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ICME.2008.4607716},
doi = {10.1109/ICME.2008.4607716},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/ChaoL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChaoL08,
author = {Ping Chao and
Youn{-}Long Lin},
title = {A motion compensation system with a high efficiency reference frame
pre-fetch scheme for {QFHD} {H.264/AVC} decoding},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {256--259},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4541403},
doi = {10.1109/ISCAS.2008.4541403},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChaoL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/ChenL07,
author = {Jian{-}Wen Chen and
Youn{-}Long Lin},
title = {A High-Performance Hardwired {CABAC} Decoder},
booktitle = {Proceedings of the {IEEE} International Conference on Acoustics, Speech,
and Signal Processing, {ICASSP} 2007, Honolulu, Hawaii, USA, April
15-20, 2007},
pages = {37--40},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ICASSP.2007.366166},
doi = {10.1109/ICASSP.2007.366166},
timestamp = {Mon, 22 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icassp/ChenL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4667,
author = {Chien{-}Liang Chen and
Jiing{-}Yuan Lin and
Youn{-}Long Lin},
title = {Integration, Verification and Layout of a Complex Multimedia {SOC}},
journal = {CoRR},
volume = {abs/0710.4667},
year = {2007},
url = {http://arxiv.org/abs/0710.4667},
eprinttype = {arXiv},
eprint = {0710.4667},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4667.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/apccas/KaoKLHLHL06,
author = {Yu{-}Chien Kao and
Huang{-}Chih Kuo and
Yin{-}Tzu Lin and
Chia{-}Wen Hou and
Yi{-}Hsien Li and
Hao{-}Tin Huang and
Youn{-}Long Lin},
title = {A High-Performance {VLSI} Architecture for Intra Prediction and Mode
Decision in {H.264/AVC} Video Encoding},
booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
2006, Singapore, 4-7 December 2006},
pages = {562--565},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/APCCAS.2006.342532},
doi = {10.1109/APCCAS.2006.342532},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/apccas/KaoKLHLHL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ShihCL06,
author = {Shen{-}Yu Shih and
Cheng{-}Ru Chang and
Youn{-}Long Lin},
editor = {Fumiyasu Hirose},
title = {A near optimal deblocking filter for {H.264} advanced video coding},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
{ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
pages = {170--175},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ASPDAC.2006.1594677},
doi = {10.1109/ASPDAC.2006.1594677},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ShihCL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChenKL06a,
author = {Jian{-}Wen Chen and
Chao{-}Yang Kao and
Youn{-}Long Lin},
editor = {Fumiyasu Hirose},
title = {Introduction to {H.264} advanced video coding},
booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation:
{ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006},
pages = {736--741},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ASPDAC.2006.1594774},
doi = {10.1109/ASPDAC.2006.1594774},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ChenKL06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/KaoKL06,
author = {Chao{-}Yang Kao and
Huang{-}Chih Kuo and
Youn{-}Long Lin},
title = {High Performance Fractional Motion Estimation and Mode Decision for
{H.264/AVC}},
booktitle = {Proceedings of the 2006 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2006, July 9-12 2006, Toronto, Ontario, Canada},
pages = {1241--1244},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ICME.2006.262762},
doi = {10.1109/ICME.2006.262762},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/KaoKL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijes/JanFKYL05,
author = {Kai{-}Yuan Jan and
Chih{-}Bin Fan and
An{-}Chao Kuo and
Wen{-}Chi Yen and
Youn{-}Long Lin},
title = {A platform based {SOC} design methodology and its application in image
compression},
journal = {Int. J. Embed. Syst.},
volume = {1},
number = {1/2},
pages = {23--32},
year = {2005},
url = {https://doi.org/10.1504/IJES.2005.008806},
doi = {10.1504/IJES.2005.008806},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijes/JanFKYL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChenLL05,
author = {Chien{-}Liang Chen and
Jiing{-}Yuan Lin and
Youn{-}Long Lin},
title = {Integration, Verification and Layout of a Complex Multimedia {SOC}},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1116--1117},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.188},
doi = {10.1109/DATE.2005.188},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ChenLL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ChenCL05,
author = {Jian{-}Wen Chen and
Cheng{-}Ru Chang and
Youn{-}Long Lin},
title = {A hardware accelerator for context-based adaptive binary arithmetic
decoding in {H.264/AVC}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {4525--4528},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465638},
doi = {10.1109/ISCAS.2005.1465638},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ChenCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ShihCL05,
author = {Sheng{-}Yu Shih and
Cheng{-}Ru Chang and
Youn{-}Long Lin},
title = {An AMBA-compliant deblocking filter {IP} for {H.264/AVC}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {4529--4532},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465639},
doi = {10.1109/ISCAS.2005.1465639},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ShihCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/estimedia/HsiehL04,
author = {Tien{-}Wei Hsieh and
Youn{-}Long Lin},
editor = {Miguel Miranda and
Radu Marculescu},
title = {A hardware accelerator {IP} for {EBCOT} Tier-1 coding in {JPEG2000}
Standard},
booktitle = {Proceedings of the 2nd Workshop on Embedded Systems for Real-Time
Multimedia, ESTIMedia 2004, Stockholm, Sweden, September 6-7, 2004},
pages = {87--90},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ESTMED.2004.1359713},
doi = {10.1109/ESTMED.2004.1359713},
timestamp = {Thu, 17 Feb 2022 09:36:05 +0100},
biburl = {https://dblp.org/rec/conf/estimedia/HsiehL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChouL02,
author = {Yih{-}Chih Chou and
Youn{-}Long Lin},
title = {Effective enforcement of path-delay constraints inperformance-driven
placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {21},
number = {1},
pages = {15--22},
year = {2002},
url = {https://doi.org/10.1109/43.974133},
doi = {10.1109/43.974133},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChouL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/WangHLCHWL02,
author = {Chih{-}Wea Wang and
Jing{-}Reng Huang and
Yen{-}Fu Lin and
Kuo{-}Liang Cheng and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Youn{-}Long Lin},
title = {Test Scheduling of BISTed Memory Cores for {SOC}},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {356},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181737},
doi = {10.1109/ATS.2002.1181737},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/WangHLCHWL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/HsuHCWHWL02,
author = {Huan{-}Shan Hsu and
Jing{-}Reng Huang and
Kuo{-}Liang Cheng and
Chih{-}Wea Wang and
Chih{-}Tsun Huang and
Cheng{-}Wen Wu and
Youn{-}Long Lin},
title = {Test Scheduling and Test Access Architecture Optimization for System-on-Chip},
booktitle = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
{USA}},
pages = {411},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ATS.2002.1181746},
doi = {10.1109/ATS.2002.1181746},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ats/HsuHCWHWL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChouL01,
author = {Yih{-}Chih Chou and
Youn{-}Long Lin},
editor = {Satoshi Goto},
title = {A 3-step approach for performance-driven whole-chip routing},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {187--191},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370319},
doi = {10.1145/370155.370319},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/ChouL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/ChouL01,
author = {Yih{-}Chih Chou and
Youn{-}Long Lin},
editor = {Sachin S. Sapatnekar and
Manfred Wiesel},
title = {A performance-driven standard-cell placer based on a modified force-directed
algorithm},
booktitle = {Proceedings of the 2001 International Symposium on Physical Design,
{ISPD} 2001, Sonoma County, CA, USA, April 1-4, 2001},
pages = {24--29},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/369691.369722},
doi = {10.1145/369691.369722},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/ChouL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isss/WenLL01,
author = {Hung{-}Pin Wen and
Chien{-}Yu Lin and
Youn{-}Long Lin},
editor = {Rom{\'{a}}n Hermida and
El Mostapha Aboulhamid},
title = {Concurrent-simulation-based remote {IP} evaluation over the internet
for system-on-a-chip design},
booktitle = {Proceedings of the 14th International Symposium on Systems Synthesis,
{ISSS} 2001, Montr{\'{e}}l, Qu{\'{e}}bec, Canada, September
30 - October 3, 2001},
pages = {233--238},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ISSS.2001.957947},
doi = {10.1109/ISSS.2001.957947},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/WenLL01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LinL00,
author = {Michael C.{-}J. Lin and
Youn{-}Long Lin},
title = {A {VLSI} implementation of the blowfish encryption/decryption algorithm},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {1--2},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368449},
doi = {10.1145/368434.368449},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LinL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/TienL00,
author = {Tzu{-}Chieh Tien and
Youn{-}Long Lin},
title = {Performance-optimal clustering with retiming for sequential circuits},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {409--414},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368716},
doi = {10.1145/368434.368716},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/TienL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/ChangL00,
author = {Hong{-}Kai Chang and
Youn{-}Long Lin},
title = {Array allocation taking into account {SDRAM} characteristics},
booktitle = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
Conference 2000, Yokohama, Japan},
pages = {497--502},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/368434.368769},
doi = {10.1145/368434.368769},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/ChangL00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SuWL99,
author = {Hsiao{-}Pin Su and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {A timing-driven soft-macro placement and resynthesis method in interaction
with chip floorplanning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {18},
number = {4},
pages = {475--483},
year = {1999},
url = {https://doi.org/10.1109/43.752930},
doi = {10.1109/43.752930},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SuWL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/ChengL99,
author = {Wei{-}Kai Cheng and
Youn{-}Long Lin},
title = {Code generation of nested loops for {DSP} processors with heterogeneous
registers and structural pipelining},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {4},
number = {3},
pages = {231--256},
year = {1999},
url = {https://doi.org/10.1145/315773.315776},
doi = {10.1145/315773.315776},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/ChengL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LianL99,
author = {Yun{-}Yin Lian and
Youn{-}Long Lin},
title = {Layout-based Logic Decomposition for Timing Optimization},
booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation,
Wanchai, Hong Kong, China, January 18-21, 1999},
pages = {229--232},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ASPDAC.1999.760002},
doi = {10.1109/ASPDAC.1999.760002},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/LianL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SuWL99,
author = {Hsiao{-}Pin Su and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
editor = {Mary Jane Irwin},
title = {A Timing-Driven Soft-Macro Resynthesis Method in Interaction with
Chip Floorplanning},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {262--267},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.309926},
doi = {10.1145/309847.309926},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/SuWL99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/TienSTCL98,
author = {Tzu{-}Chieh Tien and
Hsiao{-}Pin Su and
Yu{-}Wen Tsay and
Yih{-}Chih Chou and
Youn{-}Long Lin},
editor = {Hiroto Yasuura},
title = {Integrating logic retiming and register placement},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {136--139},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.288591},
doi = {10.1145/288548.288591},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/TienSTCL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChouL98,
author = {Yih{-}Chih Chou and
Youn{-}Long Lin},
editor = {Hiroto Yasuura},
title = {A graph-partitioning-based approach for multi-layer constrained via
minimization},
booktitle = {Proceedings of the 1998 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1998, San Jose, CA, USA, November 8-12, 1998},
pages = {426--429},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/288548.289065},
doi = {10.1145/288548.289065},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChouL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/SuWL98,
author = {Hsiao{-}Pin Su and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
editor = {Majid Sarrafzadeh},
title = {Performance-driven soft-macro clustering and placement by preserving
{HDL} design hierarchy},
booktitle = {Proceedings of the 1998 International Symposium on Physical Design,
{ISPD} 1998, Monterey, CA, USA, April 6-8, 1998},
pages = {12--17},
publisher = {{ACM}},
year = {1998},
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doi = {10.1145/274535.274537},
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author = {Wei{-}Kai Cheng and
Youn{-}Long Lin},
editor = {Francky Catthoor},
title = {Addressing Optimization for Loop Execution Targeting {DSP} with Auto-Increment/Decrement
Architecture},
booktitle = {Proceedings of the 11th International Symposium on System Synthesis,
{ISSS} '98, Hsinchu, Taiwan, December 2-4, 1998},
pages = {15--22},
publisher = {{ACM} / {IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ISSS.1998.730591},
doi = {10.1109/ISSS.1998.730591},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isss/ChengL98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Hsiao{-}Pin Su and
Youn{-}Long Lin},
title = {A phase assignment method for virtual-wire-based hardware emulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
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number = {7},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Youn{-}Long Lin},
title = {Recent developments in high-level synthesis},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {2},
number = {1},
pages = {2--21},
year = {1997},
url = {https://doi.org/10.1145/250243.250245},
doi = {10.1145/250243.250245},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/aspdac/Lin97,
author = {Youn{-}Long Lin},
title = {Computing brokerage and its application in {VLSI} design},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {65--69},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600060},
doi = {10.1109/ASPDAC.1997.600060},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Lin97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yu{-}Wen Tsay and
Wen{-}Jong Fang and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
editor = {Andrew B. Kahng and
Majid Sarrafzadeh},
title = {Preserving {HDL} synthesis hierarchy for cell placement},
booktitle = {Proceedings of the 1997 International Symposium on Physical Design,
{ISPD} 1997, Napa Valley, California, USA, April 14-16, 1997},
pages = {169--174},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/267665.267709},
doi = {10.1145/267665.267709},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/TsayFWL97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Tsung{-}Yi Wu and
Youn{-}Long Lin},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Youn{-}Long Lin and
Tsung{-}Yi Wu},
editor = {Graham Symonds and
Wolfgang Nebel},
title = {Storage optimization by replacing some flip-flops with latches},
booktitle = {Proceedings of the conference on European design automation, {EURO-DAC}
'96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996},
pages = {296--301},
publisher = {{IEEE} Computer Society Press},
year = {1996},
url = {https://doi.org/10.1109/EURDAC.1996.558220},
doi = {10.1109/EURDAC.1996.558220},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
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author = {Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {High-Level Synthesis -A Tutorial},
journal = {{IEICE} Trans. Inf. Syst.},
volume = {78-D},
number = {3},
pages = {209--218},
year = {1995},
url = {http://search.ieice.org/bin/summary.php?id=e78-d\_3\_209},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
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author = {Ching{-}Dong Chen and
Yuh{-}Sheng Lee and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {TRACER-fpga: a router for RAM-based FPGA's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {14},
number = {3},
pages = {371--374},
year = {1995},
url = {https://doi.org/10.1109/43.365127},
doi = {10.1109/43.365127},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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@article{DBLP:journals/tcad/TsayL95,
author = {Yu{-}Wen Tsay and
Youn{-}Long Lin},
title = {A row-based cell placement method that utilizes circuit structural
properties},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {14},
number = {3},
pages = {393--397},
year = {1995},
url = {https://doi.org/10.1109/43.365130},
doi = {10.1109/43.365130},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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author = {Chau{-}Shen Chen and
Yu{-}Wen Tsay and
TingTing Hwang and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {Combining technology mapping and placement for delay-minimization
in {FPGA} designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {14},
number = {9},
pages = {1076--1084},
year = {1995},
url = {https://doi.org/10.1109/43.406709},
doi = {10.1109/43.406709},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenTHWL95.bib},
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author = {Wei{-}Kai Cheng and
Youn{-}Long Lin},
editor = {Bryan Preas},
title = {A Transformation-Based Approach for Storage Optimization},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {158--163},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217523},
doi = {10.1145/217474.217523},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ChengL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/dac/WuL95,
author = {Tsung{-}Yi Wu and
Youn{-}Long Lin},
editor = {Bryan Preas},
title = {Register Minimization beyond Sharing among Variables},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {164--169},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217524},
doi = {10.1145/217474.217524},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/WuL95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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author = {Yi{-}Min Jiang and
Tsing{-}Fa Lee and
TingTing Hwang and
Youn{-}Long Lin},
title = {Performance-driven interconnection optimization for microarchitecture
synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {2},
pages = {137--149},
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url = {https://doi.org/10.1109/43.259938},
doi = {10.1109/43.259938},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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author = {Tsing{-}Fa Lee and
Allen C.{-}H. Wu and
Youn{-}Long Lin and
Daniel D. Gajski},
title = {A transformation-based method for loop folding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {4},
pages = {439--450},
year = {1994},
url = {https://doi.org/10.1109/43.275354},
doi = {10.1109/43.275354},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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author = {Tsung{-}Yi Wu and
Tzu{-}Chieh Tien and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
editor = {Robert Werner},
title = {A Synthesis Method for Mixed Synchronous / Asynchronous Behavior},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {277--281},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326864},
doi = {10.1109/EDTC.1994.326864},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/WuTWL94.bib},
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author = {Kuo{-}Hua Wang and
Wen{-}Sing Wang and
TingTing Hwang and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {State Assignment for Power and Area Minimization},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {250--254},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331899},
doi = {10.1109/ICCD.1994.331899},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WangWHWL94.bib},
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author = {Wei{-}Kai Cheng and
Youn{-}Long Lin},
editor = {Pierre G. Paulin},
title = {Code generation for a {DSP} processor},
booktitle = {Proceedings of the 7th International Symposium on High Level Synthesis,
HLSS'94, Niagra-on-the-Lake, ON, Canada, May 18-20, 1994},
pages = {82--87},
publisher = {{ACM}},
year = {1994},
url = {https://doi.org/10.1109/ISHLS.1994.302337},
doi = {10.1109/ISHLS.1994.302337},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isss/ChengL94.bib},
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author = {Chi{-}Yi Hwang and
Yung{-}Ching Hsieh and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {An efficient layout style for two-metal {CMOS} leaf cells and its
automatic synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {3},
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year = {1993},
url = {https://doi.org/10.1109/43.215003},
doi = {10.1109/43.215003},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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author = {Cheng{-}Tsung Hwang and
Yu{-}Chin Hsu and
Youn{-}Long Lin},
title = {{PLS:} a scheduler for pipeline synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {9},
pages = {1279--1286},
year = {1993},
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timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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author = {Chau{-}Shen Chen and
Yu{-}Wen Tsay and
TingTing Hwang and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Combining technology mapping and placement for delay-optimization
in {FPGA} designs},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {123--127},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580042},
doi = {10.1109/ICCAD.1993.580042},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChenTHWL93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yirng{-}An Chen and
Youn{-}Long Lin and
Long{-}Wen Chang},
title = {A Systolic Algorithm for the k-Nearest Neighbors Problem},
journal = {{IEEE} Trans. Computers},
volume = {41},
number = {1},
pages = {103--108},
year = {1992},
url = {https://doi.org/10.1109/12.123385},
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timestamp = {Sat, 20 May 2017 01:00:00 +0200},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Tsing{-}Fa Lee and
Allen C.{-}H. Wu and
Daniel Gajski and
Youn{-}Long Lin},
editor = {Louise Trevillyan and
Michael R. Lightner},
title = {An effective methodology for functional pipelining},
booktitle = {1992 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of
Technical Papers},
pages = {230--233},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1992},
url = {https://doi.org/10.1109/ICCAD.1992.279369},
doi = {10.1109/ICCAD.1992.279369},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LeeWGL92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Ta{-}Yung Liu and
Youn{-}Long Lin},
title = {{FLORA:} {A} data path allocator based on branch-and-bound search},
journal = {Integr.},
volume = {11},
number = {1},
pages = {43--66},
year = {1991},
url = {https://doi.org/10.1016/0167-9260(91)90006-7},
doi = {10.1016/0167-9260(91)90006-7},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/LiuL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yu{-}Chin Hsu and
Youn{-}Long Lin and
Hang{-}Ching Hsieh and
Ting{-}Hai Chao},
title = {Combining Logic Minimization and Folding for PLA's},
journal = {{IEEE} Trans. Computers},
volume = {40},
number = {6},
pages = {706--713},
year = {1991},
url = {https://doi.org/10.1109/12.90249},
doi = {10.1109/12.90249},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HsuLHC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Yung{-}Ching Hsieh and
Chi{-}Yi Hwang and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {LiB: a {CMOS} cell compiler},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {994--1005},
year = {1991},
url = {https://doi.org/10.1109/43.85737},
doi = {10.1109/43.85737},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiehHLH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Min{-}Siang Lin and
Hourng{-}Wern Perng and
Chi{-}Yi Hwang and
Youn{-}Long Lin},
title = {Channel density reduction by routing over the cells},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1067--1071},
year = {1991},
url = {https://doi.org/10.1109/43.85743},
doi = {10.1109/43.85743},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinPHL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/dac/LinPHL91,
author = {Min{-}Siang Lin and
Hourng{-}Wern Perng and
Chi{-}Yi Hwang and
Youn{-}Long Lin},
editor = {A. Richard Newton},
title = {Channel Density Reduction by Routing Over The Cells},
booktitle = {Proceedings of the 28th Design Automation Conference, San Francisco,
California, USA, June 17-21, 1991},
pages = {120--125},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/127601.127640},
doi = {10.1145/127601.127640},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LinPHL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/dac/HwangHLH91,
author = {Chi{-}Yi Hwang and
Yung{-}Ching Hsieh and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
editor = {A. Richard Newton},
title = {An Efficient Layout Style for 2-Metal {CMOS} Leaf Cells And Their
Automatic Generation},
booktitle = {Proceedings of the 28th Design Automation Conference, San Francisco,
California, USA, June 17-21, 1991},
pages = {481--486},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/127601.127716},
doi = {10.1145/127601.127716},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HwangHLH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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@inproceedings{DBLP:conf/dac/HwangHL91,
author = {Cheng{-}Tsung Hwang and
Yu{-}Chin Hsu and
Youn{-}Long Lin},
editor = {A. Richard Newton},
title = {Scheduling for Functional Pipelining and Loop Winding},
booktitle = {Proceedings of the 28th Design Automation Conference, San Francisco,
California, USA, June 17-21, 1991},
pages = {764--769},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/127601.127766},
doi = {10.1145/127601.127766},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HwangHL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {A new algorithm for tile generation},
journal = {Integr.},
volume = {9},
number = {3},
pages = {259--269},
year = {1990},
url = {https://doi.org/10.1016/0167-9260(90)90019-W},
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author = {Youn{-}Long Lin and
Yu{-}Chin Hsu and
Fur{-}Shing Tsai},
title = {Hybrid routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {9},
number = {2},
pages = {151--157},
year = {1990},
url = {https://doi.org/10.1109/43.46781},
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timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
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bibsource = {dblp computer science bibliography, https://dblp.org}
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author = {Chi{-}Yi Hwang and
Yung{-}Chin Hsieh and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {A fast transistor-chaining algorithm for {CMOS} cell layout},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {9},
number = {7},
pages = {781--786},
year = {1990},
url = {https://doi.org/10.1109/43.55207},
doi = {10.1109/43.55207},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangHLH90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HwangHL90,
author = {Cheng{-}Tsung Hwang and
Yu{-}Chin Hsu and
Youn{-}Long Lin},
editor = {Richard C. Smith},
title = {Optimum and Heuristic Data Path Scheduling Under Resource Constraints},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {65--70},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123228},
doi = {10.1145/123186.123228},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HwangHL90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HsiehHLH90,
author = {Yung{-}Ching Hsieh and
Chi{-}Yi Hwang and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
editor = {Richard C. Smith},
title = {LiB: {A} Cell Layout Generator},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {474--479},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123343},
doi = {10.1145/123186.123343},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HsiehHLH90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HuangCLH90,
author = {Chu{-}Yi Huang and
Yen{-}Shen Chen and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
editor = {Richard C. Smith},
title = {Data Path Allocation Based on Bipartite Weighted Matching},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {499--504},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123350},
doi = {10.1145/123186.123350},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HuangCLH90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinHT89,
author = {Youn{-}Long Lin and
Yu{-}Chin Hsu and
Fur{-}Shing Tsai},
title = {{SILK:} a simulated evolution router},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {8},
number = {10},
pages = {1108--1114},
year = {1989},
url = {https://doi.org/10.1109/43.39072},
doi = {10.1109/43.39072},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinHT89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LeeHL89,
author = {Jiahn{-}Humg Lee and
Yu{-}Chin Hsu and
Youn{-}Long Lin},
title = {A new integer linear programming formulation for the scheduling problem
in data path synthesis},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {20--23},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.76896},
doi = {10.1109/ICCAD.1989.76896},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LeeHL89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HwangHLH89,
author = {Chi{-}Yi Hwang and
Yung{-}Ching Hsieh and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {An optimal transistor-chaining algorithm for {CMOS} cell layout},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {344--347},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.76967},
doi = {10.1109/ICCAD.1989.76967},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HwangHLH89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LinHT89,
author = {Youn{-}Long Lin and
Yu{-}Chin Hsu and
Fur{-}Shing Tsai},
title = {Routing using a pyramid data structure},
booktitle = {1989 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical
Papers},
pages = {436--439},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/ICCAD.1989.76986},
doi = {10.1109/ICCAD.1989.76986},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LinHT89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinG88,
author = {Youn{-}Long Lin and
Daniel D. Gajski},
title = {{LES:} a layout expert system},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {7},
number = {8},
pages = {868--876},
year = {1988},
url = {https://doi.org/10.1109/43.3218},
doi = {10.1109/43.3218},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinG88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LinHT88,
author = {Youn{-}Long Lin and
Yu{-}Chin Hsu and
Fur{-}Shing Tsai},
title = {A detailed router based on simulated evolution},
booktitle = {1988 {IEEE} International Conference on Computer-Aided Design, {ICCAD}
1988, Santa Clara, CA, USA, November 7-10, 1988. Digest of Technical
Papers},
pages = {38--41},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/ICCAD.1988.122458},
doi = {10.1109/ICCAD.1988.122458},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LinHT88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LinG87,
author = {Youn{-}Long Lin and
Daniel Gajski},
editor = {A. O'Neill and
D. Thomas},
title = {{LES:} {A} Layout Expert System},
booktitle = {Proceedings of the 24th {ACM/IEEE} Design Automation Conference. Miami
Beach, FL, USA, June 28 - July 1, 1987},
pages = {672--678},
publisher = {{IEEE} Computer Society Press / {ACM}},
year = {1987},
url = {https://doi.org/10.1145/37888.37996},
doi = {10.1145/37888.37996},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/LinG87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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